Changeset c743b48 in rtems
- Timestamp:
- 02/25/05 05:19:43 (19 years ago)
- Branches:
- 4.10, 4.11, 4.8, 4.9, 5, master
- Children:
- 6a184ff
- Parents:
- 74fb4e1f
- Location:
- c/src/lib/libcpu/arm
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libcpu/arm/ChangeLog
r74fb4e1f rc743b48 1 2005-02-24 Jay Monkman <jtm@lopingdog.com> 2 3 * at91rm9200/include/at91rm9200_emac.h: Cleanup. 4 1 5 2005-01-07 Ralf Corsepius <ralf.corsepius@rtems.org> 2 6 -
c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_emac.h
r74fb4e1f rc743b48 84 84 #define EMAC_CFG_CLK_32 (2 << 10) // MII Clock = HCLK divided by 32 85 85 #define EMAC_CFG_CLK_64 (3 << 10) // MII Clock = HCLK divided by 64 86 #define EMAC_CFG_CLK_MASK (3 << 10) // MII Clock mask 86 87 #define EMAC_CFG_RTY BIT12 // Retry Test Mode - Must be 0 87 88 #define EMAC_CFG_RMII BIT13 // Reduced MII Mode Enable … … 129 130 // PHY Maintenance Register, EMAC_MAN, Offset 0x34 130 131 #define EMAC_MAN_DATA(_x_) ((_x_ & 0xFFFF) << 0) // PHY data register 131 #define EMAC_MAN_CODE (0x 3 << 6)// IEEE Code132 #define EMAC_MAN_CODE (0x2 << 16) // IEEE Code 132 133 #define EMAC_MAN_REGA(_x_) ((_x_ & 0x1F) << 18) // PHY register address 133 134 #define EMAC_MAN_PHYA(_x_) ((_x_ & 0x1F) << 23) // PHY address … … 135 136 #define EMAC_MAN_READ (0x2 << 28) // Transfer is a read 136 137 #define EMAC_MAN_HIGH BIT30 // Must be set 138 #define EMAC_MAN_LOW BIT31 137 139 138 140 // Bit assignments for Receive Buffer Descriptor
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