Changeset c6fb8e90 in rtems
- Timestamp:
- 08/01/95 15:33:39 (29 years ago)
- Branches:
- 4.10, 4.11, 4.8, 4.9, 5, master
- Children:
- 4f90134
- Parents:
- 4a6e64d
- Location:
- c/src/lib/libbsp/m68k/mvme162
- Files:
-
- 8 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libbsp/m68k/mvme162/README
r4a6e64d rc6fb8e90 37 37 ---------------- 38 38 The port was done using already existing ports to the M68020 boards, 39 DMV152 and MVME136. 39 DMV152 and MVME136. 40 40 41 41 The host system was SUN/Solaris 2.3, and the cross-development … … 75 75 76 76 was made to point to the power-up location of MVME162 interrupt vector 77 table. 78 77 table. 78 79 79 - The shutdown is a temporary solution. To exit cleanly, it has to disable 80 80 all enabled interrupts and restore the board to its power-up status. … … 113 113 - to FSF and Cygnus Support for great free software; 114 114 115 115 What's new 116 ---------- 117 - 28.07.95 BSP adjusted to rtems-3.2.0. 118 - Now console driver uses interrupts on receive (ring buffer 119 code lifted with thanks from the IDP BSP next door (../idp)) 120 - both front-panel serial interfaces are supported 121 - serious bug in timer interrupts fixed 122 - interrupt test tm27 now supported 123 116 124 +----------------------------------+-------------------------------+ 117 125 | Dr. Mikhail (Misha) Savitski | Voice : +46-980-79162 | -
c/src/lib/libbsp/m68k/mvme162/clock/ckinit.c
r4a6e64d rc6fb8e90 33 33 34 34 #define MS_COUNT 1000 /* T2's countdown constant (1 ms) */ 35 #define CLOCK_INT_LEVEL 6 35 #define CLOCK_INT_LEVEL 6 /* T2's interrupt level */ 36 36 37 rtems_unsigned32 Clock_isrs; /* ISRs until next tick */ 38 volatile rtems_unsigned32 Clock_driver_ticks; 39 /* ticks since initialization */ 37 rtems_unsigned32 Clock_isrs; /* ISRs until next tick */ 38 volatile rtems_unsigned32 Clock_driver_ticks; /* ticks since initialization */ 40 39 rtems_isr_entry Old_ticker; 41 40 42 rtems_device_driver Clock_initialize( 41 rtems_device_driver Clock_initialize( 43 42 rtems_device_major_number major, 44 43 rtems_device_minor_number minor, … … 51 50 } 52 51 53 void ReInstall_clock( clock_isr ) 54 rtems_isr_entry clock_isr; 52 void ReInstall_clock(rtems_isr_entry clock_isr) 55 53 { 56 54 rtems_unsigned32 isrlevel; 57 55 58 56 rtems_interrupt_disable( isrlevel ); 59 (void) set_vector( clock_isr, (VECTOR_BASE >> 28)* 0x10 + 0x9, 1 );57 (void) set_vector( clock_isr, VBR0 * 0x10 + 0x9, 1 ); 60 58 rtems_interrupt_enable( isrlevel ); 61 59 } 62 60 63 void Install_clock( clock_isr ) 64 rtems_isr_entry clock_isr; 61 void Install_clock(rtems_isr_entry clock_isr ) 65 62 { 66 63 … … 69 66 70 67 if ( BSP_Configuration.ticks_per_timeslice ) { 71 Old_ticker = (rtems_isr_entry) 72 set_vector( clock_isr, (VECTOR_BASE >> 28) * 0x10 + 0x9, 1 ); 68 Old_ticker = 69 (rtems_isr_entry) set_vector( clock_isr, VBR0 * 0x10 + 0x9, 1 ); 70 lcsr->vector_base |= MASK_INT; /* unmask VMEchip2 interrupts */ 71 lcsr->to_ctl = 0xE7; /* prescaler to 1 MHz (see Appendix A1) */ 72 lcsr->timer_cmp_2 = MS_COUNT; 73 lcsr->timer_cnt_2 = 0; /* clear counter */ 74 lcsr->board_ctl |= 0x700; /* increment, reset-on-compare, and */ 75 /* clear-overflow-cnt */ 73 76 74 lcsr->vector_base = 0x67800000; /* set vb, enable interrupts */ 75 lcsr->to_ctl = 0xE7; /* prescaler to 1 MHz (see Appendix A1) */ 76 lcsr->timer_cmp_2 = MS_COUNT; 77 lcsr->timer_cnt_2 = 0; /* clear counter */ 78 lcsr->board_ctl |= 0x700; /* increment, reset-on-compare, clear-ovfl-cnt */ 79 80 lcsr->intr_level[0] |= CLOCK_INT_LEVEL * 0x10; /* set int level */ 81 lcsr->intr_ena |= 0x02000000; /* enable tick timer 2 interrupt */ 77 lcsr->intr_level[0] |= CLOCK_INT_LEVEL * 0x10; /* set int level */ 78 lcsr->intr_ena |= 0x02000000; /* enable tick timer 2 interrupt */ 82 79 83 80 atexit( Clock_exit ); 84 } 81 } 85 82 86 83 } -
c/src/lib/libbsp/m68k/mvme162/console/console.c
r4a6e64d rc6fb8e90 25 25 #include "console.h" 26 26 #include "bsp.h" 27 #include "ringbuf.h" 27 28 28 /* console_initialize 29 * 30 * This routine initializes the console IO driver. 31 * 32 * Input parameters: NONE 33 * 34 * Output parameters: NONE 35 * 36 * Return values: 29 Ring_buffer_t Buffer[2]; 30 31 /* 32 * Interrupt handler for receiver interrupts 37 33 */ 34 35 rtems_isr C_Receive_ISR(rtems_vector_number vector) 36 { 37 register int ipend, port; 38 39 ZWRITE0(1, 0x38); /* reset highest IUS */ 40 41 ipend = ZREAD(1, 3); /* read int pending from A side */ 42 43 if (ipend == 0x04) port = 0; /* channel B intr pending */ 44 else if (ipend == 0x20) port = 1; /* channel A intr pending */ 45 else return; 46 47 Ring_buffer_Add_character(&Buffer[port], ZREADD(port)); 48 49 if (ZREAD(port, 1) & 0x70) { /* check error stat */ 50 ZWRITE0(port, 0x30); /* reset error */ 51 } 52 } 38 53 39 54 rtems_device_driver console_initialize( … … 45 60 ) 46 61 { 62 int i; 63 64 /* 65 * Initialise receiver interrupts on both ports 66 */ 67 68 for (i = 0; i <= 1; i++) { 69 Ring_buffer_Initialize( &Buffer[i] ); 70 ZWRITE(i, 2, SCC_VECTOR); 71 ZWRITE(i, 10, 0); 72 ZWRITE(i, 1, 0x10); /* int on all Rx chars or special condition */ 73 ZWRITE(i, 9, 8); /* master interrupt enable */ 74 } 75 76 set_vector(C_Receive_ISR, SCC_VECTOR, 1); /* install ISR for ports A and B */ 77 78 mcchip->vector_base = 0; 79 mcchip->gen_control = 2; /* MIEN */ 80 mcchip->SCC_int_ctl = 0x13; /* SCC IEN, IPL3 */ 81 47 82 *status = RTEMS_SUCCESSFUL; 48 83 } 49 84 50 51 /* is_character_ready 52 * 53 * This routine returns TRUE if a character is available. 54 * 55 * Input parameters: NONE 56 * 57 * Output parameters: NONE 58 * 59 * Return values: 85 /* 86 * Non-blocking char input 60 87 */ 61 88 62 rtems_boolean is_character_ready( 63 char *ch 64 ) 89 rtems_boolean char_ready(int port, char *ch) 65 90 { 66 rtems_unsigned8 rr_0; 91 if ( Ring_buffer_Is_empty( &Buffer[port] ) ) 92 return FALSE; 67 93 68 Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 ); 69 if ( !(rr_0 & RR_0_RX_DATA_AVAILABLE) ) 70 return( FALSE ); 71 72 Z8x30_READ_DATA( CONSOLE_DATA, *ch ); 73 74 return(TRUE); 75 } 76 77 /* inbyte 78 * 79 * This routine reads a character from the SCC. 80 * 81 * Input parameters: NONE 82 * 83 * Output parameters: NONE 84 * 85 * Return values: 86 * character read from SCC 87 */ 88 89 char inbyte( void ) 90 { 91 rtems_unsigned8 rr_0; 92 char ch; 93 94 while ( 1 ) { 95 Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 ); 96 if ( (rr_0 & RR_0_RX_DATA_AVAILABLE) != 0 ) 97 break; 98 } 99 100 Z8x30_READ_DATA( CONSOLE_DATA, ch ); 101 return ch; 102 } 103 104 105 /* outbyte 106 * 107 * This routine transmits a character out the SCC. It supports 108 * XON/XOFF flow control. 109 * 110 * Input parameters: 111 * ch - character to be transmitted 112 * 113 * Output parameters: NONE 114 */ 115 116 void outbyte( 117 char ch 118 ) 119 { 120 rtems_unsigned8 rr_0; 121 char flow_control; 122 123 while ( 1 ) { 124 Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 ); 125 if ( (rr_0 & RR_0_TX_BUFFER_EMPTY) != 0 ) 126 break; 127 } 128 129 while ( 1 ) { 130 Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 ); 131 if ( (rr_0 & RR_0_RX_DATA_AVAILABLE) == 0 ) 132 break; 133 134 Z8x30_READ_DATA( CONSOLE_DATA, flow_control ); 135 136 if ( flow_control == XOFF ) 137 do { 138 do { 139 Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 ); 140 } while ( (rr_0 & RR_0_RX_DATA_AVAILABLE) == 0 ); 141 Z8x30_READ_DATA( CONSOLE_DATA, flow_control ); 142 } while ( flow_control != XON ); 143 } 144 145 Z8x30_WRITE_DATA( CONSOLE_DATA, ch ); 94 Ring_buffer_Remove_character( &Buffer[port], *ch ); 95 96 return TRUE; 146 97 } 147 98 148 99 /* 149 * __read -- read bytes from the serial port. Ignore fd, since 150 * we only have stdin. 100 * Block on char input 151 101 */ 152 102 153 int __read( 154 int fd, 155 char *buf, 156 int nbytes 157 ) 103 char char_wait(int port) 158 104 { 159 int i = 0; 105 unsigned char tmp_char; 106 107 while ( !char_ready(port, &tmp_char) ); 108 return tmp_char; 109 } 110 111 /* 112 * This routine transmits a character out the SCC. It no longer supports 113 * XON/XOFF flow control. 114 */ 115 116 void char_put(int port, char ch) 117 { 118 while (1) { 119 if (ZREAD0(port) & TX_BUFFER_EMPTY) break; 120 } 121 ZWRITED(port, ch); 122 } 123 124 /* 125 * Map port A (1) to stdin, stdout, and stderr. 126 * Map everything else to port B (0). 127 */ 128 129 int __read(int fd, char *buf, int nbytes) 130 { 131 int i, port; 132 133 if ( fd <= 2 ) port = 1; 134 else port = 0; 160 135 161 136 for (i = 0; i < nbytes; i++) { 162 *(buf + i) = inbyte();137 *(buf + i) = char_wait(port); 163 138 if ((*(buf + i) == '\n') || (*(buf + i) == '\r')) { 164 139 (*(buf + i++)) = '\n'; … … 171 146 172 147 /* 173 * __write -- write bytes to the serial port. Ignore fd, since 174 * stdout and stderr are the same. Since we have no filesystem, 175 * open will only return an error. 148 * Map port A (1) to stdin, stdout, and stderr. 149 * Map everything else to port B (0). 176 150 */ 177 151 178 int __write( 179 int fd, 180 char *buf, 181 int nbytes 182 ) 152 int __write(int fd, char *buf, int nbytes) 183 153 { 184 int i; 185 154 int i, port; 155 156 if ( fd <= 2 ) port = 1; 157 else port = 0; 158 186 159 for (i = 0; i < nbytes; i++) { 187 160 if (*(buf + i) == '\n') { 188 outbyte ('\r');161 char_put (port, '\r'); 189 162 } 190 outbyte (*(buf + i));163 char_put (port, *(buf + i)); 191 164 } 192 165 return (nbytes); -
c/src/lib/libbsp/m68k/mvme162/include/bsp.h
r4a6e64d rc6fb8e90 30 30 #include <rtems.h> 31 31 #include <iosupp.h> 32 #include <z8530.h> 33 34 /* 35 // Following defines must reflect the setup of the particular MVME162 36 //----------------------------------- 37 */ 32 33 /* 34 * Following defines must reflect the setup of the particular MVME162 35 */ 36 38 37 #define GROUP_BASE_ADDRESS 0x0000F200 39 #define BOARD_BASE_ADDRESS 0x00000000 38 #define BOARD_BASE_ADDRESS 0xFFFF0000 39 40 40 /* Base for local interrupters' vectors (with enable bit set) */ 41 #define VECTOR_BASE 0x67800000 41 42 #define MASK_INT 0x00800000 43 #define VBR0 0x6 44 #define VBR1 0x7 45 42 46 /* RAM limits */ 47 43 48 #define RAM_START 0x00100000 44 49 #define RAM_END 0x00200000 45 /* 46 //----------------------------------- 47 */ 48 static volatile struct lcsr { 50 51 /* 52 * ---------------------------------- 53 */ 54 55 typedef volatile struct lcsr_regs { 49 56 unsigned long slave_adr[2]; 50 57 unsigned long slave_trn[2]; … … 74 81 unsigned long intr_level[4]; 75 82 unsigned long vector_base; 76 } *lcsr = (void *) 0xFFF40000; 77 78 #define USE_CHANNEL_A 1 /* 1 = use channel A for console */ 79 #define USE_CHANNEL_B 0 /* 1 = use channel B for console */ 80 81 /* Constants */ 82 83 #if (USE_CHANNEL_A == 1) 84 #define CONSOLE_CONTROL 0xFFF45005 85 #define CONSOLE_DATA 0xFFF45007 86 #elif (USE_CHANNEL_B == 1) 87 #define CONSOLE_CONTROL 0xFFF45001 88 #define CONSOLE_DATA 0xFFF45003 89 #endif 90 91 /* 92 // The following registers are located in the VMEbus short 93 // IO space and respond to address modifier codes $29 and $2D. 94 // On FORCE SPARC CPU use address gcsr_vme and device /dev/vme16d32. 83 } lcsr_regs; 84 85 #define lcsr ((lcsr_regs * const) 0xFFF40000) 86 87 typedef volatile struct mcchip_regs { 88 89 unsigned char chipID; 90 unsigned char chipREV; 91 unsigned char gen_control; 92 unsigned char vector_base; 93 94 unsigned long timer_cmp_1; 95 unsigned long timer_cnt_1; 96 unsigned long timer_cmp_2; 97 unsigned long timer_cnt_2; 98 99 unsigned char LSB_prescaler_count; 100 unsigned char prescaler_clock_adjust; 101 unsigned char time_ctl_2; 102 unsigned char time_ctl_1; 103 104 unsigned char time_int_ctl_4; 105 unsigned char time_int_ctl_3; 106 unsigned char time_int_ctl_2; 107 unsigned char time_int_ctl_1; 108 109 unsigned char dram_err_int_ctl; 110 unsigned char SCC_int_ctl; 111 unsigned char time_ctl_4; 112 unsigned char time_ctl_3; 113 114 unsigned short DRAM_space_base; 115 unsigned short SRAM_space_base; 116 117 unsigned char DRAM_size; 118 unsigned char DRAM_SRAM_opt; 119 unsigned char SRAM_size; 120 unsigned char reserved; 121 122 unsigned char LANC_error; 123 unsigned char reserved1; 124 unsigned char LANC_int_ctl; 125 unsigned char LANC_berr_ctl; 126 127 unsigned char SCSI_error; 128 unsigned char general_inputs; 129 unsigned char MVME_162_version; 130 unsigned char SCSI_int_ctl; 131 132 unsigned long timer_cmp_3; 133 unsigned long timer_cnt_3; 134 unsigned long timer_cmp_4; 135 unsigned long timer_cnt_4; 136 137 unsigned char bus_clk; 138 unsigned char PROM_acc_time_ctl; 139 unsigned char FLASH_acc_time_ctl; 140 unsigned char ABORT_int_ctl; 141 142 unsigned char RESET_ctl; 143 unsigned char watchdog_timer_ctl; 144 unsigned char acc_watchdog_time_base_sel; 145 unsigned char reserved2; 146 147 unsigned char DRAM_ctl; 148 unsigned char reserved4; 149 unsigned char MPU_status; 150 unsigned char reserved3; 151 152 unsigned long prescaler_count; 153 154 } mcchip_regs; 155 156 #define mcchip ((mcchip_regs * const) 0xFFF42000) 157 158 /*----------------------------------------------------------------*/ 159 160 /* 161 * SCC Z8523(0) defines and macros 162 * ------------------------------- 163 * Prototypes for the low-level serial io are also included here, 164 * because such stuff is bsp-specific (yet). The function bodies 165 * are in console.c 166 */ 167 168 enum {portB, portA}; 169 170 rtems_boolean char_ready(int port, char *ch); 171 char char_wait(int port); 172 void char_put(int port, char ch); 173 174 #define TX_BUFFER_EMPTY 0x04 175 #define RX_DATA_AVAILABLE 0x01 176 #define SCC_VECTOR 0x40 177 178 typedef volatile struct scc_regs { 179 unsigned char pad1; 180 volatile unsigned char csr; 181 unsigned char pad2; 182 volatile unsigned char buf; 183 } scc_regs; 184 185 #define scc ((scc_regs * const) 0xFFF45000) 186 187 #define ZWRITE0(port, v) (scc[port].csr = (unsigned char)(v)) 188 #define ZREAD0(port) (scc[port].csr) 189 190 #define ZREAD(port, n) (ZWRITE0(port, n), (scc[port].csr)) 191 #define ZREADD(port) (scc[port].buf) 192 193 #define ZWRITE(port, n, v) (ZWRITE0(port, n), ZWRITE0(port, v)) 194 #define ZWRITED(port, v) (scc[port].buf = (unsigned char)(v)) 195 /*----------------------------------------------------------------*/ 196 197 /* 198 * The following registers are located in the VMEbus short 199 * IO space and respond to address modifier codes $29 and $2D. 200 * On FORCE CPU use address gcsr_vme and device /dev/vme16d32. 95 201 */ 96 static volatile struct gcsr{202 typedef volatile struct gcsr_regs { 97 203 unsigned char chip_revision; 98 204 unsigned char chip_id; … … 100 206 unsigned char board_scr; 101 207 unsigned short gpr[6]; 102 } *gcsr_vme = (void *) (GROUP_BASE_ADDRESS + BOARD_BASE_ADDRESS), 103 *gcsr = (void *) 0xFFF40100; 104 105 static volatile unsigned short *ipio[6] = { (unsigned short *) 0xFFF58000, 106 (unsigned short *) 0xFFF58100, 107 (unsigned short *) 0xFFF58200, 108 (unsigned short *) 0xFFF58300, 109 (unsigned short *) 0xFFF58400, 110 (unsigned short *) 0xFFF58500 111 }; 112 113 static volatile unsigned short *ipid[6] = { (unsigned short *) 0xFFF58080, 114 (unsigned short *) 0xFFF58180, 115 (unsigned short *) 0xFFF58280, 116 (unsigned short *) 0xFFF58380, 117 (unsigned short *) 0xFFF58080, 118 (unsigned short *) 0xFFF58280 119 }; 120 121 static volatile struct ipic_space { 122 struct sing { 123 unsigned short io_space[64]; 124 unsigned short id_space[32]; 125 unsigned short id_reptd[32]; 126 } single[4]; 127 struct twin { 128 unsigned short io_space[128]; 129 unsigned short io_reptd[128]; 130 } twin[2]; 131 } *ipic_space = (void *) 0xFFF58000; 132 133 static volatile struct ipic_csr { 134 unsigned char chip_id; 135 unsigned char chip_rev; 136 unsigned char res[2]; 137 unsigned short a_31_16_base; 138 unsigned short b_31_16_base; 139 unsigned short c_31_16_base; 140 unsigned short d_31_16_base; 141 unsigned char a_23_16_size; 142 unsigned char b_23_16_size; 143 unsigned char c_23_16_size; 144 unsigned char d_23_16_size; 145 unsigned short a_intr_cnt; 146 unsigned short b_intr_cnt; 147 unsigned short c_intr_cnt; 148 unsigned short d_intr_cnt; 149 } *ipic_csr = (void *) 0xFFFBC000; 208 } gcsr_regs; 209 210 #define gcsr_vme ((gcsr_regs * const) (GROUP_BASE_ADDRESS + BOARD_BASE_ADDRESS)) 211 #define gcsr ((gcsr_regs * const) 0xFFF40100) 150 212 151 213 /* … … 161 223 162 224 /* 163 * Define the interrupt mechanism for Time Test 27 164 * 165 * NOTE: Not implemented225 * Define the interrupt mechanism for Time Test 27 226 * 227 * NOTE: We use software interrupt 0 166 228 */ 167 229 168 230 #define MUST_WAIT_FOR_INTERRUPT 0 169 231 170 #define Install_tm27_vector( handler ) 171 172 #define Cause_tm27_intr() 173 174 #define Clear_tm27_intr() 232 #define Install_tm27_vector( handler ) \ 233 set_vector( (handler), VBR1 * 0x10 + 0x8, 1 ); \ 234 lcsr->intr_level[2] |= 3; \ 235 lcsr->intr_ena |= 0x100; 236 237 #define Cause_tm27_intr() lcsr->intr_soft_set |= 0x100 238 239 #define Clear_tm27_intr() lcsr->intr_clear |= 0x100 175 240 176 241 #define Lower_tm27_intr() 177 242 178 /* 179 * Simple spin delay in microsecond units for device drivers. 180 * This is very dependent on the clock speed of the target. 181 */ 182 183 #define delay( microseconds ) \ 184 { register rtems_unsigned32 _delay=(microseconds); \ 185 register rtems_unsigned32 _tmp=123; \ 186 asm volatile( "0: \ 187 nbcd %0 ; \ 188 nbcd %0 ; \ 189 dbf %1,0b" \ 190 : "=d" (_tmp), "=d" (_delay) \ 191 : "0" (_tmp), "1" (_delay) ); \ 192 } 193 194 /* Constants */ 195 196 #ifdef 1626_INIT 243 #ifdef M162_INIT 197 244 #undef EXTERN 198 245 #define EXTERN -
c/src/lib/libbsp/m68k/mvme162/startup/bspstart.c
r4a6e64d rc6fb8e90 104 104 105 105 /* 106 * You may wish to make VME accessround-robin here, currently106 * You may wish to make the VME arbitration round-robin here, currently 107 107 * we leave it as it is. 108 108 */ 109 109 110 lcsr->vector_base = VECTOR_BASE; /* set the vector base register */ 110 /* set the Interrupt Base Vectors */ 111 112 lcsr->vector_base = (VBR0 << 28) | (VBR1 << 24); 111 113 112 114 m68k_enable_caching(); -
c/src/lib/libbsp/m68k/mvme162/timer/timer.c
r4a6e64d rc6fb8e90 32 32 */ 33 33 34 35 34 #include <rtems.h> 36 35 #include <bsp.h> 37 36 38 37 /* Periodic tick interval */ 39 #define TICK_INTERVAL 0x1000040 #define TIMER_INT_LEVEL 38 #define TICK_INTERVAL 0x10000U 39 #define TIMER_INT_LEVEL 6 41 40 42 intTtimer_val;43 rtems_boolean Timer_driver_Find_average_overhead;41 rtems_unsigned32 Ttimer_val; 42 rtems_boolean Timer_driver_Find_average_overhead; 44 43 45 44 rtems_isr timerisr(); … … 47 46 void Timer_initialize() 48 47 { 49 (void) set_vector( timerisr, (VECTOR_BASE >> 28) * 0x10 + 0x8, 0 ); 50 51 Ttimer_val = 0; /* clear timer ISR count */ 52 lcsr->vector_base = 0x67800000; /* set vb, enable interrupts */ 48 (void) set_vector( timerisr, VBR0 * 0x10 + 0x8, 0 ); 49 50 Ttimer_val = 0; /* clear timer ISR count */ 51 lcsr->vector_base |= MASK_INT; /* unmask VMEchip2 interrupts */ 52 lcsr->intr_clear |= 0x01000000; /* clear pending interrupt */ 53 53 lcsr->to_ctl = 0xE7; /* prescaler to 1 MHz (see Appendix A1) */ 54 54 lcsr->timer_cmp_1 = TICK_INTERVAL; 55 lcsr->timer_cnt_1 = 0; /* clear counter */ 56 lcsr->board_ctl |= 7; /* increment, reset-on-compare, clear-ovfl-cnt */ 55 lcsr->timer_cnt_1 = 0; /* clear counter */ 56 lcsr->board_ctl |= 7; /* increment, reset-on-compare, */ 57 /* and clear-overflow-cnt */ 57 58 58 lcsr->intr_level[0] |= TIMER_INT_LEVEL; 59 lcsr->intr_ena |= 0x01000000; 59 lcsr->intr_level[0] |= TIMER_INT_LEVEL; /* set int level */ 60 lcsr->intr_ena |= 0x01000000; /* enable tick timer 1 interrupt */ 60 61 } 61 62 62 #define AVG_OVERHEAD 6/* It typically takes 3.0 microseconds */63 /* (6countdowns) to start/stop the timer. */64 #define LEAST_VALID 10 /* Don't trust a value lower than this */63 #define AVG_OVERHEAD 3U /* It typically takes 3.0 microseconds */ 64 /* (3 countdowns) to start/stop the timer. */ 65 #define LEAST_VALID 10U /* Don't trust a value lower than this */ 65 66 66 int Read_timer() 67 int Read_timer() 67 68 { 68 unsigned longtotal;69 rtems_unsigned32 total; 69 70 70 71 total = (Ttimer_val * TICK_INTERVAL) + lcsr->timer_cnt_1; … … 76 77 return 0; /* below timer resolution */ 77 78 78 return (total-AVG_OVERHEAD) ; /* in musec units */79 return (total-AVG_OVERHEAD) >> 1; 79 80 } 81 80 82 81 83 rtems_status_code Empty_function( void ) -
c/src/lib/libbsp/m68k/mvme162/timer/timerisr.s
r4a6e64d rc6fb8e90 34 34 .set RELOAD, 0x01000000 | clear tick 1 interrupt 35 35 36 PUBLIC (Ttimer_val) 36 37 PUBLIC (timerisr) 37 38 SYM (timerisr): -
c/src/lib/libbsp/m68k/mvme162/tools/sload.c
r4a6e64d rc6fb8e90 54 54 55 55 unsigned int ahdtoi(unsigned char digit) 56 /* 57 * 58 * 59 * : 0..15 = result60 * : -1 = char is not a digit56 /* converts a hexadecimal char to an integer 57 * 58 * entry : digit = character to convert 59 * : 0..15 = result 60 * : -1 = char is not a digit 61 61 */ 62 62 { 63 63 /* check digit */ 64 65 66 67 68 69 70 71 72 73 74 75 64 if (!isxdigit(digit)) 65 return(-1); 66 67 switch (toupper(digit)) { 68 case 'A' : return(0xA); 69 case 'B' : return(0xB); 70 case 'C' : return(0xC); 71 case 'D' : return(0xD); 72 case 'E' : return(0xE); 73 case 'F' : return(0xF); 74 default : return(digit - 0x30); 75 } 76 76 } 77 77 78 78 int issrec(char *str) 79 /* 80 * 81 * 82 * 83 * 84 * 79 /* attempts to identify the type of Srecord string passed 80 * 81 * entry : str = pointer to null terminated string 82 * returns : 0,1,2,3,5,7,8,9 for S0..S9 except S6 & S4 83 * : -1 = invalid header or header not found 84 * : -2 = invalid header number 85 85 */ 86 86 { 87 87 /* Check first character for S */ 88 if ((isupper(str[0]) && (str[0] == 'S')) || 89 (islower(str[0]) && (str[0] == 's'))) 90 { 91 /* check for valid header number */ 92 switch (str[1]) { 93 case '0' : return 0; /* header record */ 94 case '1' : return 1; /* data record, 2byte addr */ 95 case '2' : return 2; /* " " , 3byte addr */ 96 case '3' : return 3; /* " " , 4byte addr */ 97 case '5' : return 5; /* number of S1,S2,S3 blocks */ 98 case '7' : return 7; /* S3 terminator */ 99 case '8' : return 8; /* S2 terminator */ 100 case '9' : return 9; /* S1 terminator */ 101 default : return -2; /* all others are invalid */ 102 } 103 } 104 return(-1); 88 if ((isupper(str[0]) && (str[0] == 'S')) || (islower(str[0]) && (str[0] == 's'))) 89 { 90 /* check for valid header number */ 91 switch (str[1]) { 92 case '0' : return 0; /* header record */ 93 case '1' : return 1; /* data record, 2byte addr */ 94 case '2' : return 2; /* " " , 3byte addr */ 95 case '3' : return 3; /* " " , 4byte addr */ 96 case '5' : return 5; /* number of S1,S2,S3 blocks */ 97 case '7' : return 7; /* S3 terminator */ 98 case '8' : return 8; /* S2 terminator */ 99 case '9' : return 9; /* S1 terminator */ 100 default : return -2; /* all others are invalid */ 101 } 102 } 103 return(-1); 105 104 } 106 105 107 106 int validrec(char *str) 108 /* 109 * 110 * 111 * 112 * 113 * 114 * 115 * 116 */ 117 { 118 intcn = 1, rlen=0;119 intmchksum=0, rchksum=0;107 /* Tests for a valid srecord. tests checksum & for nondigit characters 108 * doesn't rely on any other srecord routines. 109 * 110 * entry : str = pointer to null terminated string 111 * returns : -1 = srecord contains invalid characters 112 * : -2 = srecord checksum is invalid 113 * : -3 = srecord record length is invalid 114 * : 0 = srecord is valid 115 */ 116 { 117 int cn = 1, rlen=0; 118 int mchksum=0, rchksum=0; 120 119 121 120 /* first check if there are any non-digit characters except S */ 122 123 124 121 while (str[cn]!=0) 122 if (!isxdigit(str[cn++])) 123 return(-1); 125 124 126 125 /* test number of data bytes */ 127 128 126 rlen = ahdtoi(str[2])* 0x10 + ahdtoi(str[3]); 127 if (((strlen(str)-4)/2U) != rlen) return(-3); 129 128 130 129 /* get checksum from string */ 131 rchksum = ahdtoi(str[rlen*2+2])*0x10 + ahdtoi(str[rlen*2+3]); 132 /* string chksum */ 130 rchksum = ahdtoi(str[rlen*2+2])*0x10 + ahdtoi(str[rlen*2+3]); /* string chksum */ 133 131 134 132 /* now calculate my own checksum */ 135 136 137 138 133 for (cn=2; cn <= rlen*2; ) 134 mchksum += ahdtoi(str[cn++])*0x10 + ahdtoi(str[cn++]); 135 mchksum = ~mchksum & 0xFF; 136 if (mchksum != rchksum) return(-2); /* return -2 in not equal */ 139 137 140 138 /* return OK if we didn't fail any of these tests */ 141 139 return(0); 142 140 } 143 141 144 142 void hdr2str(char *sstr, char *pstr) 145 /* 146 * 147 * 148 * 149 * (caller must allocate enough space for string)150 */ 151 { 152 intrlen, cn, pn=0;153 154 155 156 157 143 /* converts header record (S0) string into a plain string 144 * 145 * entry : sstr = pointer to S0 string record 146 * exit : pstr = pointer to string long enough to hold string 147 * (caller must allocate enough space for string) 148 */ 149 { 150 int rlen, cn, pn=0; 151 152 rlen = ahdtoi(sstr[2])*0x10 + ahdtoi(sstr[3]); 153 for (cn=8; cn <= rlen*2; ) 154 pstr[pn++] = ahdtoi(sstr[cn++])*0x10 + ahdtoi(sstr[cn++]); 155 pstr[pn]=0; 158 156 } 159 157 160 158 unsigned long getaddr(char *str) 161 /* returns the address of the srecord in str. assumes record is valid. 162 * 163 * entry : str = pointer to srecord string 164 * exit : address of data, word or long. 165 */ 166 { 167 unsigned long addr=0; 168 169 switch (issrec(str)) { 170 case 0 : 171 case 1 : 172 case 5 : 173 case 9 : 174 addr = ahdtoi(str[4])*0x1000 + ahdtoi(str[5])*0x100 175 + ahdtoi(str[6])*0x10 + ahdtoi(str[7]); 176 return(addr); 177 case 2 : 178 case 8 : 179 addr = ahdtoi(str[4])*0x100000 + ahdtoi(str[5])*0x10000 180 + ahdtoi(str[6])*0x1000 + ahdtoi(str[7])*0x100 181 + ahdtoi(str[8])*0x10 + ahdtoi(str[9]); 182 return(addr); 183 case 3 : 184 case 7 : 185 addr = ahdtoi(str[4])*0x10000000 + ahdtoi(str[5])*0x1000000 186 + ahdtoi(str[6])*0x100000 + ahdtoi(str[7])*0x10000 187 + ahdtoi(str[8])*0x1000 + ahdtoi(str[9])*0x100 188 + ahdtoi(str[10])*0x10 + ahdtoi(str[11]); 189 return(addr); 190 default : return(-1); 191 } 159 /* returns the address of the srecord in str. assumes record is valid. 160 * 161 * entry : str = pointer to srecord string 162 * exit : address of data, word or long. 163 */ 164 { 165 unsigned long addr=0; 166 167 switch (issrec(str)) { 168 case 0 : 169 case 1 : 170 case 5 : 171 case 9 : addr = ahdtoi(str[4])*0x1000 + ahdtoi(str[5])*0x100 172 + ahdtoi(str[6])*0x10 + ahdtoi(str[7]); 173 return(addr); 174 case 2 : 175 case 8 : addr = ahdtoi(str[4])*0x100000 + ahdtoi(str[5])*0x10000 176 + ahdtoi(str[6])*0x1000 + ahdtoi(str[7])*0x100 177 + ahdtoi(str[8])*0x10 + ahdtoi(str[9]); 178 return(addr); 179 case 3 : 180 case 7 : addr = ahdtoi(str[4])*0x10000000 + ahdtoi(str[5])*0x1000000 181 + ahdtoi(str[6])*0x100000 + ahdtoi(str[7])*0x10000 182 + ahdtoi(str[8])*0x1000 + ahdtoi(str[9])*0x100 183 + ahdtoi(str[10])*0x10 + ahdtoi(str[11]); 184 return(addr); 185 default : return(-1); 186 } 192 187 } 193 188 194 189 unsigned int datasize(char *str) 195 190 /* 196 * 197 * 198 * 199 * 200 */ 201 { 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 191 * returns the number of data bytes in the srecord. assumes record is valid. 192 * 193 * entry : str = pointer to srecord string 194 * exit : number of bytes of data in the data field. 195 */ 196 { 197 unsigned int size=0; 198 199 switch (issrec(str)) { 200 case 0 : 201 case 1 : 202 case 5 : 203 case 7 : 204 case 8 : 205 case 9 : size = ahdtoi(str[2])*0x10 + ahdtoi(str[3]); 206 return(size-3); 207 case 2 : size = ahdtoi(str[2])*0x10 + ahdtoi(str[3]); 208 return(size-4); 209 case 3 : size = ahdtoi(str[2])*0x10 + ahdtoi(str[3]); 210 return(size-5); 211 default : return(-1); 212 } 218 213 } 219 214 220 215 void usage (void) 221 216 /* 222 * 223 */ 224 { 225 226 227 228 229 217 * prints correct usage on stdout 218 */ 219 { 220 printf("\nUSAGE : sload [-v][-g][-r] [file]\n"); 221 printf(" file is an s-record file\n"); 222 printf(" -v for verbose summary of s-records loaded\n"); 223 printf(" -g to start execution\n"); 224 printf(" -r to reset MVME162\n\n"); 230 225 } 231 226 232 227 int MVMEControl(u_long entry, int reset, int go) 233 /* 228 /* Controls MVME-162 from other VME master: 234 229 * if entry != 0, loads it as start address 235 * if go != 0, starts program execution from entry236 * if reset != 0, resets mvme162's local bus230 * if go != 0, starts program execution from entry 231 * if reset != 0, resets mvme162's local bus 237 232 * Depends upon #define'ed GROUP_BASE_ADDRESS and BOARD_BASE_ADDRESS 238 * 239 */ 240 { 241 intvme;242 char vmedev[32] = "/dev/vme16d32";/* d32 is important !!! */243 u_longpagesize;244 245 246 pagesize = sysconf(_SC_PAGESIZE);/* mmap likes to be page-aligned */247 248 249 250 251 252 233 * which in turn are set by the 162-BUG's ENV command. 234 */ 235 { 236 int vme; 237 char vmedev[32] = "/dev/vme16d32"; /* d32 is important !!! */ 238 u_long pagesize; 239 struct gcsr *gcsr_map; 240 241 pagesize = sysconf(_SC_PAGESIZE); /* mmap likes to be page-aligned */ 242 243 if ((vme = open(vmedev, O_RDWR)) == -1) { 244 perror("open"); 245 fprintf(stderr, "Cannot open vme as %s to access GCSR\n", vmedev); 246 return 1; 247 } 253 248 254 249 /* "MAP_SHARED" is important here */ 255 gcsr_map = (struct gcsr *) 256 mmap(0, 0x1000, PROT_WRITE|PROT_READ, MAP_SHARED, 257 vme, (u_long)gcsr_vme / pagesize * pagesize); 258 if (gcsr_map == (struct gcsr *) - 1) { 259 perror("mmap"); 260 fprintf(stderr, "Cannot mmap() to remote bus address 0x%08X\n", 261 (u_long)gcsr_vme / pagesize * pagesize); 262 return 1; 263 } 250 gcsr_map = (struct gcsr *) mmap(0, 0x1000, PROT_WRITE|PROT_READ, MAP_SHARED, 251 vme, (u_long)gcsr_vme / pagesize * pagesize); 252 if (gcsr_map == (struct gcsr *) - 1) { 253 perror("mmap"); 254 fprintf(stderr, "Cannot mmap() to remote bus address 0x%08X\n", 255 (u_long)gcsr_vme / pagesize * pagesize); 256 return 1; 257 } 264 258 265 259 /* 266 260 * use GCSR to start execution in MVME162 267 * adjust pointer to compensate for page alignement 268 */ 269 gcsr_map = (struct gcsr *)((u_long)gcsr_map + 270 (u_long)gcsr_vme % pagesize); 271 272 if (reset) { /* reset the local bus... */ 273 gcsr_map->board_scr |= 0x80; 274 } 275 if (entry) { /* ...load start address... */ 276 gcsr_map->gpr[0] = entry >> 16U; 277 gcsr_map->gpr[1] = entry & 0x0000FFFF; 278 } 279 if (go) { /* ... and kick it in the ass! */ 280 gcsr_map->lmsig = 0x1; 281 } 261 * adjust pointer to compensate for page alignement 262 */ 263 gcsr_map = (struct gcsr *)((u_long)gcsr_map + (u_long)gcsr_vme % pagesize); 264 265 if (reset) { /* reset the local bus... */ 266 gcsr_map->board_scr |= 0x80; 267 } 268 if (entry) { /* ...load start address... */ 269 gcsr_map->gpr[0] = entry >> 16U; 270 gcsr_map->gpr[1] = entry & 0x0000FFFF; 271 } 272 if (go) { /* ... and kick it in the ass! */ 273 gcsr_map->lmsig = 0x1; 274 } 282 275 } 283 276 … … 285 278 main(int argc, char *argv[]) 286 279 { 287 charinpstr[256];288 u_charimage[256];289 charhdrstr[64];290 inti, j, k, result, size, line=0, lastrec=0;291 longaddr, tsize=0, naddr=0, blksize=0, blknum=1;292 FILE*in;293 char infile[256] = "";294 char vmedev[32] = "/dev/vme32d32";/* Assume "/dev/vme32d32" */295 intvme, verbose = 0, go = 0, reset = 0, havefile = 0;296 297 /* 280 char inpstr[256]; 281 u_char image[256]; 282 char hdrstr[64]; 283 int i, j, k, result, size, line=0, lastrec=0; 284 long addr, tsize=0, naddr=0, blksize=0, blknum=1; 285 FILE *in; 286 char infile[256] = ""; 287 char vmedev[32] = "/dev/vme32d32"; /* Assume "/dev/vme32d32" */ 288 int vme, verbose = 0, go = 0, reset = 0, havefile = 0; 289 290 /* Parse the command line */ 298 291 299 292 --argc; 300 293 301 294 while (argv++, argc--) { 302 303 304 295 if (**argv != '-') { 296 strcpy(infile, *argv); 297 havefile = 1; 305 298 } else if (!strcmp(*argv, "-v")) { 306 299 verbose = 1; … … 326 319 if (!havefile) { 327 320 if (!reset && !go) { 328 usage();321 usage(); 329 322 } 330 323 else { … … 333 326 exit(0); 334 327 } 335 328 336 329 if ((in = fopen(infile, "r")) == NULL) { 337 330 perror("open"); 338 331 fprintf(stderr, "Cannot open input file %s\n", infile); 339 exit(1); 332 exit(1); 340 333 } 341 334 … … 348 341 if (validrec(inpstr) == 0) { 349 342 switch (issrec(inpstr)) { 350 case 0 : 351 hdr2str(inpstr, hdrstr); 352 if (verbose) printf("HEADER string = `%s'\n", hdrstr); 353 lastrec=HEADER; 354 break; 355 case 1 : 356 addr = getaddr(inpstr); 357 size = datasize(inpstr); 358 if (blksize == 0) { 359 blksize+=size; 360 naddr=addr+size; 361 if (verbose) printf("DATA\tS19\t$%04lX", addr); 362 lastrec=DATA19; 343 case 0 : 344 hdr2str(inpstr, hdrstr); 345 if (verbose) printf("HEADER string = `%s'\n", hdrstr); 346 lastrec=HEADER; 347 break; 348 case 1 : 349 addr = getaddr(inpstr); 350 size = datasize(inpstr); 351 if (blksize == 0) { 352 blksize+=size; 353 naddr=addr+size; 354 if (verbose) printf("DATA\tS19\t$%04lX", addr); 355 lastrec=DATA19; 356 } 357 else if ((blksize!=0) && (addr==naddr)) { 358 blksize+=size; 359 naddr=addr+size; 360 } 361 else { 362 if (verbose) printf("\t$%04lX\t%lu", naddr-1, blksize); 363 if (verbose) printf("\t%d\n", blknum); 364 blknum+=1; 365 naddr=addr+size; 366 blksize=size; 367 if (verbose) printf("DATA\tS19\t$%04lX", addr); 368 lastrec=DATA19; 369 } 370 tsize += size; 371 if (vme == -1) break; 372 for (i = 0, j = 8, k = size; k-- > 0; i += 1, j += 2) { 373 image[i] = ahdtoi(inpstr[j])*0x10 + ahdtoi(inpstr[j+1]); 374 } 375 if (lseek(vme, addr, SEEK_SET) == -1) { 376 fprintf(stderr, "lseek() to vme address %08X failed\n", addr); 377 } 378 else { 379 if (write(vme, (u_char *)image, size) != size) { 380 fprintf(stderr, "Write to vme address %08X failed\n", addr); 363 381 } 364 else if ((blksize!=0) && (addr==naddr)) { 365 blksize+=size; 366 naddr=addr+size; 382 } 383 break; 384 case 2 : 385 addr = getaddr(inpstr); 386 size = datasize(inpstr); 387 if (blksize == 0) { 388 blksize+=size; 389 naddr=addr+size; 390 if (verbose) printf("DATA\tS28\t$%06lX",addr); 391 lastrec=DATA28; 392 } 393 else if ((blksize!=0) && (addr==naddr)) { 394 blksize+=size; 395 naddr=addr+size; 396 } 397 else { 398 if (verbose) printf("\t$%06lX\t%lu",naddr-1,blksize); 399 if (verbose) printf("\t%d\n",blknum); 400 blknum+=1; 401 naddr=addr+size; 402 blksize=size; 403 if (verbose) printf("DATA\tS28\t$%06lX",addr); 404 lastrec=DATA28; 405 } 406 tsize += size; 407 if (vme == -1) break; 408 for (i = 0, j = 10, k = size; k-- > 0; i += 1, j += 2) { 409 image[i] = ahdtoi(inpstr[j])*0x10 + ahdtoi(inpstr[j+1]); 410 } 411 if (lseek(vme, addr, SEEK_SET) == -1) { 412 fprintf(stderr, "lseek() to vme address %08X failed\n", addr); 413 } 414 else { 415 if (write(vme, (u_char *)image, size) != size) { 416 fprintf(stderr, "Write to vme address %08X failed\n", addr); 367 417 } 368 else { 369 if (verbose) printf("\t$%04lX\t%lu", naddr-1, blksize); 370 if (verbose) printf("\t%d\n", blknum); 371 blknum+=1; 372 naddr=addr+size; 373 blksize=size; 374 if (verbose) printf("DATA\tS19\t$%04lX", addr); 375 lastrec=DATA19; 418 } 419 break; 420 case 3 : 421 addr = getaddr(inpstr); 422 size = datasize(inpstr); 423 if (blksize == 0) { 424 blksize+=size; 425 naddr=addr+size; 426 if (verbose) printf("DATA\tS37\t$%08lX",addr); 427 lastrec=DATA37; 428 } 429 else if ((blksize!=0) && (addr==naddr)) { 430 blksize+=size; 431 naddr=addr+size; 432 } 433 else { 434 if (verbose) printf("\t$%08lX\t%lu",naddr-1,blksize); 435 if (verbose) printf("\t%d\n",blknum); 436 blknum+=1; 437 naddr=addr+size; 438 blksize=size; 439 if (verbose) printf("DATA\tS37\t$%08lX",addr); 440 lastrec=DATA37; 441 } 442 tsize += size; 443 if (vme == -1) break; 444 for (i = 0, j = 12, k = size; k-- > 0; i += 1, j += 2) { 445 image[i] = ahdtoi(inpstr[j])*0x10 + ahdtoi(inpstr[j+1]); 446 } 447 if (lseek(vme, addr, SEEK_SET) == -1) { 448 fprintf(stderr, "lseek() to vme address %08X failed\n", addr); 449 } 450 else { 451 if (write(vme, (u_char *)image, size) != size) { 452 fprintf(stderr, "Write to vme address %08X failed\n", addr); 376 453 } 377 tsize += size; 378 if (vme == -1) break; 379 for (i = 0, j = 8, k = size; k-- > 0; i += 1, j += 2) { 380 image[i] = ahdtoi(inpstr[j])*0x10 + ahdtoi(inpstr[j+1]); 381 } 382 if (lseek(vme, addr, SEEK_SET) == -1) { 383 fprintf(stderr, "lseek() to vme address %08X failed\n", addr); 384 } 385 else { 386 if (write(vme, (u_char *)image, size) != size) { 387 fprintf(stderr, "Write to vme address %08X failed\n", addr); 388 } 389 } 390 break; 391 case 2 : 392 addr = getaddr(inpstr); 393 size = datasize(inpstr); 394 if (blksize == 0) { 395 blksize+=size; 396 naddr=addr+size; 397 if (verbose) printf("DATA\tS28\t$%06lX",addr); 398 lastrec=DATA28; 399 } 400 else if ((blksize!=0) && (addr==naddr)) { 401 blksize+=size; 402 naddr=addr+size; 403 } 404 else { 405 if (verbose) printf("\t$%06lX\t%lu",naddr-1,blksize); 406 if (verbose) printf("\t%d\n",blknum); 407 blknum+=1; 408 naddr=addr+size; 409 blksize=size; 410 if (verbose) printf("DATA\tS28\t$%06lX",addr); 411 lastrec=DATA28; 412 } 413 tsize += size; 414 if (vme == -1) break; 415 for (i = 0, j = 10, k = size; k-- > 0; i += 1, j += 2) { 416 image[i] = ahdtoi(inpstr[j])*0x10 + ahdtoi(inpstr[j+1]); 417 } 418 if (lseek(vme, addr, SEEK_SET) == -1) { 419 fprintf(stderr, "lseek() to vme address %08X failed\n", addr); 420 } 421 else { 422 if (write(vme, (u_char *)image, size) != size) { 423 fprintf(stderr, "Write to vme address %08X failed\n", addr); 424 } 425 } 426 break; 427 case 3 : 428 addr = getaddr(inpstr); 429 size = datasize(inpstr); 430 if (blksize == 0) { 431 blksize+=size; 432 naddr=addr+size; 433 if (verbose) printf("DATA\tS37\t$%08lX",addr); 434 lastrec=DATA37; 435 } 436 else if ((blksize!=0) && (addr==naddr)) { 437 blksize+=size; 438 naddr=addr+size; 439 } 440 else { 441 if (verbose) printf("\t$%08lX\t%lu",naddr-1,blksize); 442 if (verbose) printf("\t%d\n",blknum); 443 blknum+=1; 444 naddr=addr+size; 445 blksize=size; 446 if (verbose) printf("DATA\tS37\t$%08lX",addr); 447 lastrec=DATA37; 448 } 449 tsize += size; 450 if (vme == -1) break; 451 for (i = 0, j = 12, k = size; k-- > 0; i += 1, j += 2) { 452 image[i] = ahdtoi(inpstr[j])*0x10 + ahdtoi(inpstr[j+1]); 453 } 454 if (lseek(vme, addr, SEEK_SET) == -1) { 455 fprintf(stderr, "lseek() to vme address %08X failed\n", addr); 456 } 457 else { 458 if (write(vme, (u_char *)image, size) != size) { 459 fprintf(stderr, "Write to vme address %08X failed\n", addr); 460 } 461 } 462 break; 463 case 7 : 464 if (lastrec==DATA19){ 465 if (verbose) printf("\t$%04lX\t%lu",naddr-1,blksize); 466 } 467 if (lastrec==DATA28){ 468 if (verbose) printf("\t$%06lX\t%lu",naddr-1,blksize); 469 } 470 if (lastrec==DATA37){ 471 if (verbose) printf("\t$%08lX\t%lu",naddr-1,blksize); 472 } 473 if (verbose) printf("\t%d\n",blknum); 474 addr = getaddr(inpstr); 475 if (verbose) printf("TERM\tS37"); 476 printf("\nExecution address = $%08lX\n", addr); 477 lastrec=TERMINATOR; 478 break; 479 case 8 : 480 if (lastrec==DATA19){ 481 if (verbose) printf("\t$%04lX\t%lu",naddr-1,blksize); 482 } 483 if (lastrec==DATA28){ 484 if (verbose) printf("\t$%06lX\t%lu",naddr-1,blksize); 485 } 486 if (lastrec==DATA37){ 487 if (verbose) printf("\t$%08lX\t%lu",naddr-1,blksize); 488 } 489 if (verbose) printf("\t%d\n",blknum); 490 addr = getaddr(inpstr); 491 if (verbose) printf("TERM\tS28"); 492 printf("\nExecution address = $%06lX\n", addr); 493 lastrec=TERMINATOR; 494 break; 495 case 9 : 496 if (lastrec==DATA19){ 497 if (verbose) printf("\t$%04lX\t%lu",naddr-1,blksize); 498 } 499 if (lastrec==DATA28){ 500 if (verbose) printf("\t$%06lX\t%lu",naddr-1,blksize); 501 } 502 if (lastrec==DATA37){ 503 if (verbose) printf("\t$%08lX\t%lu",naddr-1,blksize); 504 } 505 if (verbose) printf("\t%d\n",blknum); 506 addr = getaddr(inpstr); 507 if (verbose) printf("TERM\tS19"); 508 printf("\nExecution address = $%04lX\n", addr); 509 lastrec=TERMINATOR; 510 break; 511 } 454 } 455 break; 456 case 7 : 457 if (lastrec==DATA19){if (verbose) printf("\t$%04lX\t%lu",naddr-1,blksize);} 458 if (lastrec==DATA28){if (verbose) printf("\t$%06lX\t%lu",naddr-1,blksize);} 459 if (lastrec==DATA37){if (verbose) printf("\t$%08lX\t%lu",naddr-1,blksize);} 460 if (verbose) printf("\t%d\n",blknum); 461 addr = getaddr(inpstr); 462 if (verbose) printf("TERM\tS37"); 463 printf("\nExecution address = $%08lX\n", addr); 464 lastrec=TERMINATOR; 465 break; 466 case 8 : 467 if (lastrec==DATA19){if (verbose) printf("\t$%04lX\t%lu",naddr-1,blksize);} 468 if (lastrec==DATA28){if (verbose) printf("\t$%06lX\t%lu",naddr-1,blksize);} 469 if (lastrec==DATA37){if (verbose) printf("\t$%08lX\t%lu",naddr-1,blksize);} 470 if (verbose) printf("\t%d\n",blknum); 471 addr = getaddr(inpstr); 472 if (verbose) printf("TERM\tS28"); 473 printf("\nExecution address = $%06lX\n", addr); 474 lastrec=TERMINATOR; 475 break; 476 case 9 : 477 if (lastrec==DATA19){if (verbose) printf("\t$%04lX\t%lu",naddr-1,blksize);} 478 if (lastrec==DATA28){if (verbose) printf("\t$%06lX\t%lu",naddr-1,blksize);} 479 if (lastrec==DATA37){if (verbose) printf("\t$%08lX\t%lu",naddr-1,blksize);} 480 if (verbose) printf("\t%d\n",blknum); 481 addr = getaddr(inpstr); 482 if (verbose) printf("TERM\tS19"); 483 printf("\nExecution address = $%04lX\n", addr); 484 lastrec=TERMINATOR; 485 break; 512 486 } 513 else { 514 printf("\nError on line %d. ",line); 515 switch (validrec(inpstr)) { 516 case -1 : {printf("SRecord contains invalid characters.\n"); break; } 517 case -2 : {printf("SRecord checksum is invalid.\n"); break;} 518 case -3 : {printf("SRecord length is invalid.\n"); break;} 519 } 520 exit(1); 521 } 522 } 523 524 if ((lastrec==DATA19) || (lastrec==DATA28) || (lastrec==DATA37)) { 525 if (lastrec==DATA19){ 526 if (verbose) printf("\t$%04lX\t%lu",naddr-1,blksize); 527 } 528 if (lastrec==DATA28){ 529 if (verbose) printf("\t$%06lX\t%lu",naddr-1,blksize); 530 } 531 if (lastrec==DATA37){ 532 if (verbose) printf("\t$%08lX\t%lu",naddr-1,blksize); 533 } 534 if (verbose) printf("\t%d\n",blknum); 535 printf("ERROR: terminator record not found.\n"); 536 } 537 else { 538 for (i = 0x000FFFF; i-- > 0;) ; /* mystique delay... */ 539 MVMEControl(addr, reset, go); 540 } 541 if (verbose) printf("total data size = %lu bytes\n", tsize); 542 } 487 } 488 else { 489 printf("\nError on line %d. ",line); 490 switch (validrec(inpstr)) { 491 case -1 : {printf("SRecord contains invalid characters.\n"); break; } 492 case -2 : {printf("SRecord checksum is invalid.\n"); break;} 493 case -3 : {printf("SRecord length is invalid.\n"); break;} 494 } 495 exit(1); 496 } 497 } 498 499 if ((lastrec==DATA19) || (lastrec==DATA28) || (lastrec==DATA37)) { 500 if (lastrec==DATA19){if (verbose) printf("\t$%04lX\t%lu",naddr-1,blksize);} 501 if (lastrec==DATA28){if (verbose) printf("\t$%06lX\t%lu",naddr-1,blksize);} 502 if (lastrec==DATA37){if (verbose) printf("\t$%08lX\t%lu",naddr-1,blksize);} 503 if (verbose) printf("\t%d\n",blknum); 504 printf("ERROR: terminator record not found.\n"); 505 } 506 else { 507 for (i = 0x000FFFF; i-- > 0;) ; /* mystique delay... */ 508 MVMEControl(addr, reset, go); 509 } 510 if (verbose) printf("total data size = %lu bytes\n", tsize); 511 }
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