Changeset c6f76392 in rtems
- Timestamp:
- 03/07/17 06:50:12 (7 years ago)
- Branches:
- 5, master
- Children:
- a11e1ff5
- Parents:
- 696b5b1e
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libcpu/powerpc/mpc6xx/altivec/vec_sup_asm.S
r696b5b1e rc6f76392 77 77 .set r6, 6 78 78 .set r7, 7 79 79 .set r9, 9 80 80 .set r10, 10 81 81 .set r11, 11 82 .set r12, 1282 /* Do not use r12, since this is used by _CPU_Context_switch() */ 83 83 84 84 .set cr5, 5 … … 576 576 * when testing if we really should do the load/store operation. 577 577 */ 578 mfcr r 12578 mfcr r9 579 579 #endif 580 580 … … 591 591 #ifndef IGNORE_VRSAVE 592 592 /* Restore CRC */ 593 mtcr r 12593 mtcr r9 594 594 #endif 595 595 blr … … 604 604 * when testing if we really should do the load/store operation. 605 605 */ 606 mfcr r 12606 mfcr r9 607 607 #endif 608 608 … … 620 620 621 621 #ifndef IGNORE_VRSAVE 622 mtcr r 12622 mtcr r9 623 623 #endif 624 624 blr … … 650 650 * when testing if we really should do the load/store operation. 651 651 */ 652 mfcr r 12652 mfcr r9 653 653 #endif 654 654 … … 686 686 687 687 #ifndef IGNORE_VRSAVE 688 mtcr r 12688 mtcr r9 689 689 #endif 690 690 blr … … 762 762 * when testing if we really should do the load/store operation. 763 763 */ 764 mfcr r 12764 mfcr r9 765 765 #endif 766 766 … … 778 778 779 779 #ifndef IGNORE_VRSAVE 780 mtcr r 12780 mtcr r9 781 781 #endif 782 782 blr … … 792 792 * when testing if we really should do the load/store operation. 793 793 */ 794 mfcr r 12794 mfcr r9 795 795 #endif 796 796 … … 807 807 #ifndef IGNORE_VRSAVE 808 808 /* Restore CRC */ 809 mtcr r 12809 mtcr r9 810 810 #endif 811 811 blr
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