Changeset c64e4ed4 in rtems for c/src/exec


Ignore:
Timestamp:
01/15/96 21:50:28 (27 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
a625ccd
Parents:
5c491aef
Message:

updates from Tony Bennett for PA and UNIX ports

Location:
c/src/exec
Files:
24 edited

Legend:

Unmodified
Added
Removed

  • c/src/exec/libcsupport/include/rtems/assoc.h

    r5c491aef rc64e4ed4  
    11/*
    2  *      @(#)assoc.h     1.2 - 95/06/28
     2 *      @(#)assoc.h     1.4 - 95/10/25
    33 *     
    44 *
    … …  
    1414
    1515typedef struct {
    16     char *name;
     16    const char  *name;
    1717    unsigned32   local_value;
    1818    unsigned32   remote_value;
    … …  
    2525#define RTEMS_ASSOC_DEFAULT_NAME "(default)"
    2626
    27 rtems_assoc_t *rtems_assoc_ptr_by_name(rtems_assoc_t *, char *);
    28 rtems_assoc_t *rtems_assoc_ptr_by_value(rtems_assoc_t *, unsigned32);
    29 rtems_assoc_t *rtems_assoc_ptr_by_remote(rtems_assoc_t *, unsigned32);
     27const rtems_assoc_t *rtems_assoc_ptr_by_name(const rtems_assoc_t *, const char *);
     28const rtems_assoc_t *rtems_assoc_ptr_by_value(const rtems_assoc_t *, unsigned32);
     29const rtems_assoc_t *rtems_assoc_ptr_by_remote(const rtems_assoc_t *, unsigned32);
    3030
    31 unsigned32   rtems_assoc_remote_by_local(rtems_assoc_t *, unsigned32);
    32 unsigned32   rtems_assoc_local_by_remote(rtems_assoc_t *, unsigned32);
    33 unsigned32   rtems_assoc_remote_by_name(rtems_assoc_t *, char *);
    34 unsigned32   rtems_assoc_local_by_name(rtems_assoc_t *, char *);
    35 char        *rtems_assoc_name_by_local(rtems_assoc_t *, unsigned32);
    36 char        *rtems_assoc_name_by_remote(rtems_assoc_t *, unsigned32);
     31unsigned32   rtems_assoc_remote_by_local(const rtems_assoc_t *, unsigned32);
     32unsigned32   rtems_assoc_local_by_remote(const rtems_assoc_t *, unsigned32);
     33unsigned32   rtems_assoc_remote_by_name(const rtems_assoc_t *, const char *);
     34unsigned32   rtems_assoc_local_by_name(const rtems_assoc_t *, const char *);
     35const char  *rtems_assoc_name_by_local(const rtems_assoc_t *, unsigned32);
     36const char  *rtems_assoc_name_by_remote(const rtems_assoc_t *, unsigned32);
    3737
    38 unsigned32   rtems_assoc_remote_by_local_bitfield(rtems_assoc_t *, unsigned32);
    39 char        *rtems_assoc_name_by_local_bitfield(rtems_assoc_t *, unsigned32, char *);
    40 char        *rtems_assoc_name_by_remote_bitfield(rtems_assoc_t *, unsigned32, char *);
    41 unsigned32   rtems_assoc_local_by_remote_bitfield(rtems_assoc_t *ap, unsigned32);
     38unsigned32   rtems_assoc_remote_by_local_bitfield(const rtems_assoc_t *, unsigned32);
     39char  *rtems_assoc_name_by_local_bitfield(const rtems_assoc_t *, unsigned32, char *);
     40char  *rtems_assoc_name_by_remote_bitfield(const rtems_assoc_t *, unsigned32, char *);
     41unsigned32   rtems_assoc_local_by_remote_bitfield(const rtems_assoc_t *, unsigned32);
    4242
    4343

  • c/src/exec/libcsupport/include/rtems/error.h

    r5c491aef rc64e4ed4  
     1
    12/*
    2  *      @(#)error.h     1.1 - 95/08/02
     3 *      @(#)error.h     1.3 - 95/10/25
    34 *     
    45 *
    … …  
    78 *  $Id$
    89 */
     10
     11#ifndef __RTEMS_ERROR_h
     12#define __RTEMS_ERROR_h
    913
    1014/*
    … …  
    1923                             RTEMS_ERROR_PANIC) /* all */
    2024
    21 char *rtems_status_text(rtems_status_code);
    22 int   rtems_error(int error_code, char *printf_format, ...);
    23 void  rtems_panic(char *printf_format, ...);
     25const char *rtems_status_text(rtems_status_code);
     26int   rtems_error(int error_code, const char *printf_format, ...);
     27void  rtems_panic(const char *printf_format, ...);
    2428
    2529extern int rtems_panic_in_progress;
    2630
     31#endif
     32/* end of include file */

  • c/src/exec/libcsupport/include/rtems/libcsupport.h

    r5c491aef rc64e4ed4  
    3030);
    3131
     32extern void malloc_dump(void);
    3233extern void libc_init(int reentrant);
     34extern int  host_errno(void);
     35extern void fix_syscall_errno(void);
    3336
    3437#ifdef __cplusplus
    … …  
    3639#endif
    3740
    38 extern int  host_errno(void);
    39 extern void fix_syscall_errno(void);
    40 
    4141#endif
    4242/* end of include file */

  • c/src/exec/libcsupport/src/assoc.c

    r5c491aef rc64e4ed4  
    11/*
    2  *      @(#)assoc.c     1.4 - 95/08/02
    3  *     
     2 *      @(#)assoc.c     1.6 - 95/10/25
     3 *
    44 *
    55 * assoc.c
    … …  
    99 */
    1010
    11 
    1211#include <rtems.h>
    1312#include "assoc.h"
    … …  
    1918#define rtems_assoc_is_default(ap)  ((ap)->name && STREQ(ap->name, RTEMS_ASSOC_DEFAULT_NAME))
    2019
    21 rtems_assoc_t *
     20const rtems_assoc_t *
    2221rtems_assoc_ptr_by_name(
    23     rtems_assoc_t *ap,
    24     char *name
    25   )
    26 {
    27     rtems_assoc_t *default_ap = 0;
     22    const rtems_assoc_t *ap,
     23    const char *name
     24  )
     25{
     26    const rtems_assoc_t *default_ap = 0;
    2827
    2928    if (rtems_assoc_is_default(ap))
    … …  
    3736}
    3837
    39 rtems_assoc_t *
     38const rtems_assoc_t *
    4039rtems_assoc_ptr_by_local(
    41     rtems_assoc_t *ap,
    42     unsigned32     local_value
    43   )
    44 {
    45     rtems_assoc_t *default_ap = 0;
     40    const rtems_assoc_t *ap,
     41    unsigned32     local_value
     42  )
     43{
     44    const rtems_assoc_t *default_ap = 0;
    4645
    4746    if (rtems_assoc_is_default(ap))
    … …  
    5655
    5756
    58 rtems_assoc_t *
     57const rtems_assoc_t *
    5958rtems_assoc_ptr_by_remote(
    60     rtems_assoc_t *ap,
    61     unsigned32     remote_value
    62   )
    63 {
    64     rtems_assoc_t *default_ap = 0;
     59    const rtems_assoc_t *ap,
     60    unsigned32     remote_value
     61  )
     62{
     63    const rtems_assoc_t *default_ap = 0;
    6564
    6665    if (rtems_assoc_is_default(ap))
    … …  
    8180unsigned32
    8281rtems_assoc_remote_by_local(
    83     rtems_assoc_t *ap,
    84     unsigned32     local_value
    85   )
    86 {
    87     rtems_assoc_t *nap;
     82    const rtems_assoc_t *ap,
     83    unsigned32     local_value
     84  )
     85{
     86    const rtems_assoc_t *nap;
    8887    nap = rtems_assoc_ptr_by_local(ap, local_value);
    8988    if (nap)
    … …  
    9594unsigned32
    9695rtems_assoc_local_by_remote(
    97     rtems_assoc_t *ap,
    98     unsigned32     remote_value
    99   )
    100 {
    101     rtems_assoc_t *nap;
     96    const rtems_assoc_t *ap,
     97    unsigned32     remote_value
     98  )
     99{
     100    const rtems_assoc_t *nap;
    102101    nap = rtems_assoc_ptr_by_remote(ap, remote_value);
    103102    if (nap)
    … …  
    109108unsigned32
    110109rtems_assoc_remote_by_name(
    111     rtems_assoc_t *ap,
    112     char          *name
    113   )
    114 {
    115     rtems_assoc_t *nap;
     110    const rtems_assoc_t *ap,
     111    const char          *name
     112  )
     113{
     114    const rtems_assoc_t *nap;
    116115    nap = rtems_assoc_ptr_by_name(ap, name);
    117116    if (nap)
    … …  
    123122unsigned32
    124123rtems_assoc_local_by_name(
    125     rtems_assoc_t *ap,
    126     char          *name
    127   )
    128 {
    129     rtems_assoc_t *nap;
     124    const rtems_assoc_t *ap,
     125    const char          *name
     126  )
     127{
     128    const rtems_assoc_t *nap;
    130129    nap = rtems_assoc_ptr_by_name(ap, name);
    131130    if (nap)
    … …  
    140139 */
    141140
    142 char *
     141const char *
    143142rtems_assoc_name_bad(
    144143    unsigned32 bad_value
    145144)
    146145{
     146#ifdef RTEMS_DEBUG
    147147    static char bad_buffer[32];
    148148
    149149    sprintf(bad_buffer, "< %d [0x%x] >", bad_value, bad_value);
     150#else
     151    static char bad_buffer[32] = "<assoc.c: BAD NAME>";
     152#endif
    150153    return bad_buffer;
    151154}
    152155
    153156
    154 char *
     157const char *
    155158rtems_assoc_name_by_local(
    156     rtems_assoc_t *ap,
    157     unsigned32     local_value
    158   )
    159 {
    160     rtems_assoc_t *nap;
     159    const rtems_assoc_t *ap,
     160    unsigned32     local_value
     161  )
     162{
     163    const rtems_assoc_t *nap;
    161164    nap = rtems_assoc_ptr_by_local(ap, local_value);
    162165    if (nap)
    … …  
    166169}
    167170
    168 char *
     171const char *
    169172rtems_assoc_name_by_remote(
    170     rtems_assoc_t *ap,
    171     unsigned32     remote_value
    172   )
    173 {
    174     rtems_assoc_t *nap;
     173    const rtems_assoc_t *ap,
     174    unsigned32     remote_value
     175  )
     176{
     177    const rtems_assoc_t *nap;
    175178    nap = rtems_assoc_ptr_by_remote(ap, remote_value);
    176179    if (nap)
    … …  
    186189
    187190unsigned32 rtems_assoc_remote_by_local_bitfield(
    188     rtems_assoc_t *ap,
     191    const rtems_assoc_t *ap,
    189192    unsigned32     local_value
    190193  )
    … …  
    202205
    203206unsigned32 rtems_assoc_local_by_remote_bitfield(
    204     rtems_assoc_t *ap,
     207    const rtems_assoc_t *ap,
    205208    unsigned32     remote_value
    206209  )
    … …  
    216219}
    217220
    218 char *rtems_assoc_name_by_remote_bitfield(
    219     rtems_assoc_t *ap,
     221char *
     222rtems_assoc_name_by_remote_bitfield(
     223    const rtems_assoc_t *ap,
    220224    unsigned32     value,
    221225    char          *buffer
    … …  
    237241}
    238242
    239 char *rtems_assoc_name_by_local_bitfield(
    240     rtems_assoc_t *ap,
     243char *
     244rtems_assoc_name_by_local_bitfield(
     245    const rtems_assoc_t *ap,
    241246    unsigned32     value,
    242247    char          *buffer

  • c/src/exec/libcsupport/src/error.c

    r5c491aef rc64e4ed4  
    11/*
    2  *      @(#)error.c     1.2 - 95/08/02
     2 *      @(#)error.c     1.6 - 95/12/12
    33 *     
    44 *
    5  * report errors and panics to RTEMS' stderr.
    6  * Currently just used by RTEMS monitor.
    7  *
     5 *  report errors and panics to RTEMS' stderr.
     6 *  Currently just used by RTEMS monitor.
    87 *
    98 *  $Id$
    … …  
    9897
    9998
    100 char *
     99const char *
    101100rtems_status_text(
    102101    rtems_status_code status
    … …  
    109108static int rtems_verror(
    110109    unsigned32   error_flag,
    111     char        *printf_format,
     110    const char   *printf_format,
    112111    va_list      arglist
    113112)
    … …  
    182181int rtems_error(
    183182    int   error_flag,
    184     char *printf_format,
     183    const char *printf_format,
    185184    ...
    186185  )
    … …  
    201200
    202201void rtems_panic(
    203     char *printf_format,
     202    const char *printf_format,
    204203    ...
    205204  )

  • c/src/exec/libcsupport/src/libio.c

    r5c491aef rc64e4ed4  
    1616#include <stdio.h>                      /* O_RDONLY, et.al. */
    1717#include <fcntl.h>                      /* O_RDONLY, et.al. */
    18 #include <sys/fcntl.h>                      /* O_RDONLY, et.al. */
     18
    1919#if defined(solaris2)
    2020#define O_NDELAY O_NONBLOCK
    … …  
    2222#define O_NDELAY _FNBIO
    2323#endif
     24
    2425#include <errno.h>
    2526#include <string.h>                     /* strcmp */
    … …  
    209210            rc = rtems_semaphore_create(
    210211              RTEMS_LIBIO_IOP_SEM(iop - rtems_libio_iops),
    211               1, 
     212              1,
    212213              RTEMS_BINARY_SEMAPHORE | RTEMS_INHERIT_PRIORITY | RTEMS_PRIORITY,
    213214              RTEMS_NO_PRIORITY,

  • c/src/exec/libcsupport/src/no_libc.c

    r5c491aef rc64e4ed4  
    1 #if  !defined(RTEMS_LIBC) && !defined(RTEMS_NEWLIB) && !defined(RTEMS_UNIX)
     1#if  !defined(RTEMS_NEWLIB) && !defined(RTEMS_UNIX)
    22
    33/*  no_libc.h

  • c/src/exec/rtems/headers/types.h

    r5c491aef rc64e4ed4  
    3434typedef unsigned16      rtems_unsigned16; /* unsigned 16-bit value */
    3535typedef unsigned32      rtems_unsigned32; /* unsigned 32-bit value */
    36 typedef unsigned64      rtems_unsigned64; /* unsigned 64-bit value */
    3736
    3837typedef signed8         rtems_signed8;    /* signed 8-bit value  */
    3938typedef signed16        rtems_signed16;   /* signed 16-bit value */
    4039typedef signed32        rtems_signed32;   /* signed 32-bit value */
     40
     41/*
     42 * some C++ compilers (eg: HP's) don't do 'long long'
     43 */
     44#if defined(__GNUC__)
     45typedef unsigned64      rtems_unsigned64; /* unsigned 64-bit value */
    4146typedef signed64        rtems_signed64;   /* signed 64-bit value */
     47#endif
    4248
    4349typedef single_precision rtems_single;    /* single precision float */

  • c/src/exec/rtems/include/rtems/rtems/types.h

    r5c491aef rc64e4ed4  
    3434typedef unsigned16      rtems_unsigned16; /* unsigned 16-bit value */
    3535typedef unsigned32      rtems_unsigned32; /* unsigned 32-bit value */
    36 typedef unsigned64      rtems_unsigned64; /* unsigned 64-bit value */
    3736
    3837typedef signed8         rtems_signed8;    /* signed 8-bit value  */
    3938typedef signed16        rtems_signed16;   /* signed 16-bit value */
    4039typedef signed32        rtems_signed32;   /* signed 32-bit value */
     40
     41/*
     42 * some C++ compilers (eg: HP's) don't do 'long long'
     43 */
     44#if defined(__GNUC__)
     45typedef unsigned64      rtems_unsigned64; /* unsigned 64-bit value */
    4146typedef signed64        rtems_signed64;   /* signed 64-bit value */
     47#endif
    4248
    4349typedef single_precision rtems_single;    /* single precision float */

  • c/src/exec/score/cpu/hppa1.1/cpu.c

    r5c491aef rc64e4ed4  
    2525void hppa_external_interrupt_disable(unsigned32);
    2626void hppa_external_interrupt(unsigned32, CPU_Interrupt_frame *);
    27 
    28 /*
    29  * Our interrupt handlers take a 2nd argument:
    30  *   a pointer to a CPU_Interrupt_frame
    31  * So we use our own prototype instead of rtems_isr_entry
    32  */
    33 
    34 typedef void ( *hppa_rtems_isr_entry )(
    35     ISR_Vector_number,
    36     CPU_Interrupt_frame *
    37  );
    38 
    39 
    40 /*
    41  * who are we?  cpu number
    42  * Not used by executive proper, just kept (or not) as a convenience
    43  * for libcpu and libbsp stuff that wants it.
    44  *
    45  * Defaults to 0.  If the BSP doesn't like it, it can change it.
    46  */
    47 
    48 int cpu_number;                 /* from 0; cpu number in a multi cpu system */
    49 
     27void hppa_cpu_halt(unsigned32);
     28
     29/*
     30 * The first level interrupt handler for first 32 interrupts/traps.
     31 * Indexed by vector; generally each entry is _Generic_ISR_Handler.
     32 * Some TLB traps may have their own first level handler.
     33 */
     34
     35extern void _Generic_ISR_Handler(void);
     36unsigned32 HPPA_first_level_interrupt_handler[HPPA_INTERNAL_INTERRUPTS];
    5037
    5138/*  _CPU_Initialize
    … …  
    8774
    8875    /*
     76     * Init the first level interrupt handlers
     77     */
     78
     79    for (i=0; i <= HPPA_INTERNAL_INTERRUPTS; i++)
     80        HPPA_first_level_interrupt_handler[i] = (unsigned32) _Generic_ISR_Handler;
     81
     82    /*
     83     * Init the 2nd level interrupt handlers
     84     */
     85
     86    for (i=0; i <= CPU_INTERRUPT_NUMBER_OF_VECTORS; i++)
     87        _ISR_Vector_table[i] = (ISR_Handler_entry) hppa_cpu_halt;
     88
     89    /*
    8990     * Stabilize the interrupt stuff
    9091     */
    … …  
    9798
    9899    iva_table = (unsigned32) IVA_Table;
     100#if defined(hppa1_1)
     101    /*
     102     * HACK:  (from PA72000 TRM, page 4-19)
     103     * "The hardware TLB miss handler will never attempt to service
     104     *  a non-access TLB miss or a TLB protection violation.  It
     105     *  will only attempt to service TLB accesses that would cause
     106     *  Trap Numbers 6 (Instruction TLB miss) and 15 (Data TLB miss)."
     107     *
     108     * The LPA instruction is used to translate a virtual address to
     109     * a physical address, however, if the requested virtual address
     110     * is not currently resident in the TLB, the hardware TLB miss
     111     * handler will NOT insert it.  In this situation Trap Number
     112     * #17 is invoked (Non-access Data TLB miss fault).
     113     *
     114     * To work around this, a dummy data access is first performed
     115     * to the virtual address prior to the LPA.  The dummy access
     116     * causes the TLB entry to be inserted (if not already present)
     117     * and then the following LPA instruction will not generate
     118     * a non-access data TLB miss fault.
     119     *
     120     * It is unclear whether or not this behaves the same way for
     121     * the PA8000.
     122     *
     123     */
     124    iva = *(volatile unsigned32 *)iva_table;  /* dummy access */
     125#endif
     126
    99127    HPPA_ASM_LPA(0, iva_table, iva);
    100128    set_iva(iva);
    … …  
    113141    HPPA_ASM_SSM(0, level);     /* change no bits; just get copy */
    114142    if (level & HPPA_PSW_I)
    115         return 1;
    116     return 0;
     143        return 0;
     144    return 1;
    117145}
    118146
    … …  
    185213 *
    186214 *  TODO:
    187  *    delete interrupt.c etc.
    188215 *    Count interrupts
    189216 *    make sure interrupts disabled properly
    190  *    should handler check again for more interrupts before exit?
    191  *    How to enable interrupts from an interrupt handler?
    192  *    Make sure there is an entry for everything in ISR_Vector_Table
    193217 */
    194218
    … …  
    209233
    210234    /* mark them all unused */
    211 
    212235    DISABLE(~0);
    213236    DISMISS(~0);
    214237
    215238    /* install the external interrupt handler */
    216   _CPU_ISR_install_vector(
    217     HPPA_INTERRUPT_EXTERNAL_INTERRUPT,
    218     (proc_ptr)hppa_external_interrupt,
    219     &ignore
    220   );
     239    _CPU_ISR_install_vector(
     240        HPPA_INTERRUPT_EXTERNAL_INTERRUPT,
     241        (proc_ptr)hppa_external_interrupt, &ignore
     242);
    221243}
    222244
    … …  
    257279       vector, iframe->Interrupt.pcoqfront);
    258280*/
    259     DISMISS(VECTOR_TO_MASK(vector));
    260     DISABLE(VECTOR_TO_MASK(vector));
    261 }
    262 
    263 void
    264 hppa_external_interrupt_report_spurious(unsigned32           spurious,
     281}
     282
     283void
     284hppa_external_interrupt_report_spurious(unsigned32           spurious_mask,
    265285                                        CPU_Interrupt_frame *iframe)
    266286{
    267287    int v;
    268288    for (v=0; v < HPPA_EXTERNAL_INTERRUPTS; v++)
    269         if (VECTOR_TO_MASK(v) & spurious)
     289        if (VECTOR_TO_MASK(v) & spurious_mask)
     290        {
     291            DISMISS(VECTOR_TO_MASK(v));
     292            DISABLE(VECTOR_TO_MASK(v));
    270293            hppa_external_interrupt_spurious_handler(v, iframe);
    271     DISMISS(spurious);
     294        }
     295    DISMISS(spurious_mask);
    272296}
    273297
    … …  
    305329                DISMISS(m);
    306330                mask &= ~m;
    307                 (*handler)(global_vector, iframe);
     331                handler(global_vector, iframe);
    308332            }
    309333        }
    … …  
    311335        if (mask != 0) {
    312336            if ( _CPU_Table.spurious_handler )
    313               (*((hppa_rtems_isr_entry) _CPU_Table.spurious_handler))(
    314                   mask,
    315                   iframe
    316                 );
     337            {
     338                handler = (hppa_rtems_isr_entry) _CPU_Table.spurious_handler;
     339                handler(mask, iframe);
     340            }
    317341            else
    318               hppa_external_interrupt_report_spurious(mask, iframe);
     342                hppa_external_interrupt_report_spurious(mask, iframe);
    319343        }
    320344    }
    … …  
    331355
    332356void
    333 hppa_cpu_halt(unsigned32 type_of_halt,
    334               unsigned32 the_error)
     357hppa_cpu_halt(unsigned32 the_error)
    335358{
    336359    unsigned32 isrlevel;
    … …  
    338361    _CPU_ISR_Disable(isrlevel);
    339362
    340     asm volatile( "copy %0,%%r1" : : "r" (the_error) );
     363    HPPA_ASM_LABEL("_hppa_cpu_halt");
    341364    HPPA_ASM_BREAK(1, 0);
    342365}

  • c/src/exec/score/cpu/hppa1.1/cpu.h

    r5c491aef rc64e4ed4  
    197197
    198198/*
     199 * Our interrupt handlers take a 2nd argument:
     200 *   a pointer to a CPU_Interrupt_frame
     201 * So we use our own prototype instead of rtems_isr_entry
     202 */
     203
     204typedef void ( *hppa_rtems_isr_entry )(
     205    unsigned32,
     206    CPU_Interrupt_frame *
     207 );
     208
     209/*
    199210 * The following table contains the information required to configure
    200211 * the HPPA specific parameters.
    … …  
    227238  unsigned32   external_interrupt[HPPA_EXTERNAL_INTERRUPTS];
    228239
    229   void       (*spurious_handler)( unsigned32 mask, CPU_Interrupt_frame *);
     240  hppa_rtems_isr_entry spurious_handler;
    230241
    231242  unsigned32   itimer_clicks_per_microsecond; /* for use by Clock driver */
    … …  
    239250EXTERN void               *_CPU_Interrupt_stack_high;
    240251
     252/* entry points */
     253void hppa_external_interrupt_spurious_handler(unsigned32, CPU_Interrupt_frame *);
     254
    241255#endif          /* ! ASM */
    242256
    243257/*
    244  *  context size area for floating point
     258 *  context sizes
    245259 */
    246260
    247261#ifndef ASM
    248 #define CPU_CONTEXT_FP_SIZE sizeof( Context_Control_fp )
     262#define CPU_CONTEXT_SIZE     sizeof( Context_Control )
     263#define CPU_CONTEXT_FP_SIZE  sizeof( Context_Control_fp )
    249264#endif
    250265
    … …  
    440455 */
    441456
    442 void    hppa_cpu_halt(unsigned32 type_of_halt, unsigned32 the_error);
     457void    hppa_cpu_halt(unsigned32 the_error);
    443458#define _CPU_Fatal_halt( _error ) \
    444     hppa_cpu_halt(0, _error)
     459    hppa_cpu_halt(_error)
    445460
    446461/* end of Fatal Error manager macros */

  • c/src/exec/score/cpu/hppa1.1/cpu_asm.s

    r5c491aef rc64e4ed4  
    5050isr_arg0           .reg    %cr24
    5151isr_r9             .reg    %cr25
     52isr_r8             .reg    %cr26
    5253
    5354#
    … …  
    106107#  The following macro and the 32 instantiations of the macro
    107108#  are necessary to determine which interrupt vector occurred.
    108 #  The following macro allows a unique entry point to be defined
    109 #  for each vector.
    110 #
    111 # r9 was loaded with the vector before branching here
    112 #   scratch registers available:   gr1, gr8, gr9, gr16, gr17, gr24
    113 #
    114 # NOTE:
    115 #  .align 32   doesn not seem to work in the continuation below
    116 #  so just have to count 8 instructions
    117 #
    118 # NOTE:
    119 #    this whole scheme needs to be rethought for TLB traps which
    120 #    have requirements about what tlb faults they can incur.
    121 #    ref:  TLB Operation Requirements in 1.1 arch book
     109#
     110#  r9 is loaded with the vector number and then we jump to
     111#    the first level interrupt handler.  In most cases this
     112#    is _Generic_ISR_Handler.  In a few cases (such as TLB misc)
     113#    it may be to some other entry point.
     114#
     115
     116# table for first level interrupt handlers
     117        .import   HPPA_first_level_interrupt_handler, data
    122118
    123119#define THANDLER(vector) \
    124         mtctl   %r9,  isr_r9 !         \
    125         b       _Generic_ISR_Handler!        \
    126         ldi     vector, %r9!      \
    127         nop ! \
    128         nop ! \
    129         nop ! \
    130         nop ! \
    131         nop
     120        mtctl   %r9,  isr_r9 ! \
     121        mtctl   %r8,  isr_r8 ! \
     122        ldi     vector, %r9  ! \
     123        ldil    L%HPPA_first_level_interrupt_handler,%r8 ! \
     124        ldo     R%HPPA_first_level_interrupt_handler(%r8),%r8 ! \
     125        ldwx,s  %r9(%r8),%r8 ! \
     126        bv      0(%r8) ! \
     127        mfctl   isr_r8, %r8
    132128
    133129        .align 4096
    … …  
    211207        .ENTRY
    212208
    213 # Turn on the D bit in psw so we can start saving stuff on stack
    214 # (interrupt context pieces that need to be saved before the RFI)
    215 
    216         ssm       HPPA_PSW_D, %r0
    217209        mtctl     arg0, isr_arg0
    218210
    … …  
    236228        mfctl     %sar, arg0
    237229        stw       arg0, SAR_OFFSET(sp)
    238 
    239 # Prepare to re-enter virtual mode
    240 # We need Q in case the interrupt handler enables interrupts
    241 #
    242 
    243         ldil      L%CPU_PSW_DEFAULT, arg0
    244         ldo       R%CPU_PSW_DEFAULT(arg0), arg0
    245         mtctl     arg0, ipsw
    246 
    247 # Now jump to "rest_of_isr_handler" with the rfi
    248 # We are assuming the space queues are all correct already
    249 
    250         ldil      L%rest_of_isr_handler, arg0
    251         ldo       R%rest_of_isr_handler(arg0), arg0
    252         mtctl     arg0, pcoq
    253         ldo       4(arg0), arg0
    254         mtctl     arg0, pcoq
    255 
    256         rfi
    257         nop
    258 
    259 # At this point we are back in virtual mode and all our
    260 #  normal addressing is once again ok.
    261 
    262 rest_of_isr_handler:
    263230
    264231#
    … …  
    282249        stw         %r7,R7_OFFSET(sp)
    283250        stw         %r8,R8_OFFSET(sp)
    284         stw         %r9,R9_OFFSET(sp)
     251# skip r9
    285252        stw         %r10,R10_OFFSET(sp)
    286253        stw         %r11,R11_OFFSET(sp)
    … …  
    299266        stw         %r24,R24_OFFSET(sp)
    300267        stw         %r25,R25_OFFSET(sp)
    301         stw         %r26,R26_OFFSET(sp)
     268# skip arg0
    302269        stw         %r27,R27_OFFSET(sp)
    303270        stw         %r28,R28_OFFSET(sp)
    … …  
    325292# At this point we are done with isr_arg0, and isr_r9 control registers
    326293#
    327 
     294# Prepare to re-enter virtual mode
     295# We need Q in case the interrupt handler enables interrupts
     296#
     297
     298        ldil      L%CPU_PSW_DEFAULT, arg0
     299        ldo       R%CPU_PSW_DEFAULT(arg0), arg0
     300        mtctl     arg0, ipsw
     301
     302# Now jump to "rest_of_isr_handler" with the rfi
     303# We are assuming the space queues are all correct already
     304
     305        ldil      L%rest_of_isr_handler, arg0
     306        ldo       R%rest_of_isr_handler(arg0), arg0
     307        mtctl     arg0, pcoq
     308        ldo       4(arg0), arg0
     309        mtctl     arg0, pcoq
     310
     311        rfi
     312        nop
     313
     314# At this point we are back in virtual mode and all our
     315#  normal addressing is once again ok.
     316#
     317#  It is now ok to take an exception or trap
     318#
     319
     320rest_of_isr_handler:
    328321
    329322# Point to beginning of float context and
    … …  
    409402# (_ISR_Nest_level == 0)
    410403
    411         rsm        HPPA_PSW_I, %r0
     404        rsm        HPPA_PSW_I + HPPA_PSW_R, %r0
    412405        ldw        -4(sp), sp
    413406
    … …  
    449442        comibt,=,n 0,%r8,isr_restore
    450443
     444
    451445# OK, something happened while in ISR and we need to switch to a task
    452446# other than the one which was interrupted or the
    … …  
    466460        ldo        -128(sp),sp
    467461
    468         rsm        HPPA_PSW_I, %r0
    469 
    470462isr_restore:
     463
     464# enable interrupts during most of restore
     465        ssm        HPPA_PSW_I, %r0
    471466
    472467# Get a pointer to beginning of our stack frame
    … …  
    489484        .EXPORT _CPU_Context_restore
    490485_CPU_Context_restore:
    491 
    492 # Turn off Q & I so we can write pcoq
    493         rsm        HPPA_PSW_Q + HPPA_PSW_I, %r0
    494 
    495         ldw        IPSW_OFFSET(arg0), %r8
    496         mtctl      %r8, ipsw
    497 
    498         ldw        SAR_OFFSET(arg0), %r9
    499         mtctl      %r9, sar
    500 
    501         ldw        PCOQFRONT_OFFSET(arg0), %r10
    502         mtctl      %r10, pcoq
    503 
    504         ldw        PCOQBACK_OFFSET(arg0), %r11
    505         mtctl      %r11, pcoq
    506486
    507487#
    … …  
    532512        ldw         R23_OFFSET(arg0),%r23
    533513        ldw         R24_OFFSET(arg0),%r24
    534         ldw         R25_OFFSET(arg0),%r25
    535 # skipping r26 (aka arg0) until we are done with it
     514# skipping r25; used as scratch register below
     515# skipping r26 (arg0) until we are done with it
    536516        ldw         R27_OFFSET(arg0),%r27
    537517        ldw         R28_OFFSET(arg0),%r28
    … …  
    540520        ldw         R31_OFFSET(arg0),%r31
    541521
    542 # Must load r26 last since it is arg0
     522# Turn off Q & R & I so we can write interrupt control registers
     523        rsm        HPPA_PSW_Q + HPPA_PSW_R + HPPA_PSW_I, %r0
     524
     525        ldw        IPSW_OFFSET(arg0), %r25
     526        mtctl      %r25, ipsw
     527
     528        ldw        SAR_OFFSET(arg0), %r25
     529        mtctl      %r25, sar
     530
     531        ldw        PCOQFRONT_OFFSET(arg0), %r25
     532        mtctl      %r25, pcoq
     533
     534        ldw        PCOQBACK_OFFSET(arg0), %r25
     535        mtctl      %r25, pcoq
     536
     537# Load r25 with interrupts off
     538        ldw         R25_OFFSET(arg0),%r25
     539# Must load r26 (arg0) last
    543540        ldw         R26_OFFSET(arg0),%r26
    544541

  • c/src/exec/score/cpu/hppa1.1/hppa.h

    r5c491aef rc64e4ed4  
    11/*
    2  *      @(#)hppa.h      1.13 - 95/09/21
    3  *     
     2 * @(#)hppa.h   1.17 - 95/12/13
     3 * 
    44 *
    55 *  Description:
    … …  
    210210#define HPPA_INTERRUPT_EXTERNAL_INTERVAL_TIMER         HPPA_INTERRUPT_EXTERNAL_0
    211211#define HPPA_EXTERNAL_INTERRUPTS                       32
     212#define HPPA_INTERNAL_INTERRUPTS                       32
    212213
    213214/* BSP defined interrupts begin here */
    … …  
    647648
    648649
    649 #ifndef ASM
     650/*
     651 * this won't work in ASM or non-GNU compilers
     652 */
     653
     654#if !defined(ASM) && defined(__GNUC__)
    650655
    651656/*
    … …  
    700705EMIT_CONTROLS(tr7, HPPA_CR31);               /* CR31 */
    701706
     707#endif /* ASM and GNU */
     708
    702709/*
    703710 * If and How to invoke the debugger (a ROM debugger generally)
    704711 */
    705 
    706 #ifdef SIMHPPA_ROM
    707 /* invoke the pflow debugger */
    708 #define CPU_INVOKE_DEBUGGER  \
     712#define CPU_INVOKE_DEBUGGER \
    709713    do { \
    710         extern void debugger_break(void); \
    711         debugger_break(); \
     714        HPPA_ASM_BREAK(1,1); \
    712715    } while (0)
    713 #endif
    714 
    715 
    716 #endif /* ASM */
    717716
    718717#ifdef __cplusplus

  • c/src/exec/score/cpu/unix/cpu.c

    r5c491aef rc64e4ed4  
    8888
    8989  sigemptyset(&posix_empty_mask);
    90  
     90
    9191  /*
    9292   * Block all the signals except SIGTRAP for the debugger
    … …  
    603603  extern boolean     _Context_Switch_necessary;
    604604
    605 
    606605  if (_ISR_Nest_level++ == 0) {
    607606      /* switch to interrupt stack */
    … …  
    636635void _CPU_Stray_signal(int sig_num)
    637636{
    638   char buffer[ 4 ];   
    639 
    640   /*
    641    *  We avoid using the stdio section of the library.
    642    *  The following is generally safe.
    643    */
    644 
    645   buffer[ 0 ] = (sig_num >> 4) + 0x30;
    646   buffer[ 1 ] = (sig_num & 0xf) + 0x30;
    647   buffer[ 2 ] = '\n';
    648 
    649   write( 2, "Stray signal 0x", 12 );
    650   write( 2, buffer, 3 );
     637  char buffer[ 4 ];
     638 
     639  /*
     640   * print "stray" msg about ones which that might mean something
     641   * Avoid using the stdio section of the library.
     642   * The following is generally safe.
     643   */
     644 
     645  switch (sig_num)
     646  {
     647      case SIGCLD:
     648          break;
     649 
     650      default:
     651      {
     652          /*
     653           *  We avoid using the stdio section of the library.
     654           *  The following is generally safe.
     655           */
     656 
     657          buffer[ 0 ] = (sig_num >> 4) + 0x30;
     658          buffer[ 1 ] = (sig_num & 0xf) + 0x30;
     659          buffer[ 2 ] = '\n';
     660 
     661          write( 2, "Stray signal 0x", 12 );
     662          write( 2, buffer, 3 );
     663      }
     664  }
    651665 
    652666  /*

  • c/src/exec/score/cpu/unix/cpu.h

    r5c491aef rc64e4ed4  
    279279 */
    280280
     281#ifdef __GNUC__
    281282#define CPU_STRUCTURE_ALIGNMENT          __attribute__ ((aligned (32)))
     283#else
     284#define CPU_STRUCTURE_ALIGNMENT
     285#endif
    282286
    283287/*

  • c/src/exec/score/cpu/unix/unixtypes.h

    r5c491aef rc64e4ed4  
    2525
    2626/*
     27 * some C++ compilers (eg: HP's) don't do 'signed' or 'volatile'
     28 */
     29#if defined(__cplusplus) && !defined(__GNUC__)
     30#define signed
     31#define volatile
     32#endif
     33
     34/*
    2735 *  This section defines the basic types for this processor.
    2836 */
    … …  
    3139typedef unsigned short unsigned16;     /* unsigned 16-bit integer */
    3240typedef unsigned int   unsigned32;     /* unsigned 32-bit integer */
    33 typedef unsigned long long unsigned64; /* unsigned 64-bit integer */
    3441
    3542typedef unsigned16     Priority_Bit_map_control;
    … …  
    3845typedef signed short     signed16;     /* 16-bit signed integer */
    3946typedef signed int       signed32;     /* 32-bit signed integer */
     47
     48/*
     49 * some C++ compilers (eg: HP's) don't do 'long long'
     50 */
     51#if defined(__GNUC__)
     52typedef unsigned long long unsigned64; /* unsigned 64-bit integer */
    4053typedef signed long long signed64;     /* 64 bit signed integer */
     54#endif
    4155
    4256typedef unsigned32 boolean;     /* Boolean value   */

  • c/src/exec/score/headers/system.h

    r5c491aef rc64e4ed4  
    5757
    5858#ifdef USE_INLINES
    59 #define STATIC static
    60 #define INLINE __inline__
     59# define STATIC static
     60# ifdef __GNUC__
     61#  define INLINE __inline__
     62# else
     63#  define INLINE inline
     64# endif
    6165#else
    62 /*
    63 #error Only the GNU C compiler is currently supported!!!
    64 */
    65 #define STATIC
    66 #define INLINE
     66# define STATIC
     67# define INLINE
    6768#endif
    6869

  • c/src/exec/score/include/rtems/system.h

    r5c491aef rc64e4ed4  
    5757
    5858#ifdef USE_INLINES
    59 #define STATIC static
    60 #define INLINE __inline__
     59# define STATIC static
     60# ifdef __GNUC__
     61#  define INLINE __inline__
     62# else
     63#  define INLINE inline
     64# endif
    6165#else
    62 /*
    63 #error Only the GNU C compiler is currently supported!!!
    64 */
    65 #define STATIC
    66 #define INLINE
     66# define STATIC
     67# define INLINE
    6768#endif
    6869

  • c/src/exec/score/inline/address.inl

    r5c491aef rc64e4ed4  
    5959)
    6060{
    61   return (left - right);
     61  return ((char *) left - (char *) right);
    6262}
    6363

  • c/src/exec/score/inline/coremsg.inl

    r5c491aef rc64e4ed4  
    1818#define __CORE_MESSAGE_QUEUE_inl
    1919
     20#include <string.h>   /* needed for memcpy */
     21 
    2022/*PAGE
    2123 *

  • c/src/exec/score/inline/rtems/score/address.inl

    r5c491aef rc64e4ed4  
    5959)
    6060{
    61   return (left - right);
     61  return ((char *) left - (char *) right);
    6262}
    6363

  • c/src/exec/score/inline/rtems/score/coremsg.inl

    r5c491aef rc64e4ed4  
    1818#define __CORE_MESSAGE_QUEUE_inl
    1919
     20#include <string.h>   /* needed for memcpy */
     21 
    2022/*PAGE
    2123 *

  • c/src/exec/score/inline/rtems/score/thread.inl

    r5c491aef rc64e4ed4  
    242242  Objects_Classes      the_class;
    243243  Objects_Information *information;
     244  Thread_Control      *tp = (Thread_Control *) 0;
    244245 
    245246  if ( _Objects_Are_ids_equal( id, OBJECTS_ID_OF_SELF ) ) {
    246247    _Thread_Disable_dispatch();
    247248    *location = OBJECTS_LOCAL;
    248     return( _Thread_Executing );
     249    tp = _Thread_Executing;
     250    goto done;
    249251  }
    250252 
    … …  
    253255  if ( the_class > OBJECTS_CLASSES_LAST ) {
    254256    *location = OBJECTS_ERROR;
    255     return (Thread_Control *) 0;
     257    goto done;
    256258  }
    257259 
    … …  
    260262  if ( !information || !information->is_thread ) {
    261263    *location = OBJECTS_ERROR;
    262     return (Thread_Control *) 0;
     264    goto done;
    263265  }
    264266 
    265   return (Thread_Control *) _Objects_Get( information, id, location );
    266 }
     267  tp = (Thread_Control *) _Objects_Get( information, id, location );
     268 
     269done:
     270  return tp;
     271}
     272
    267273
    268274/*

  • c/src/exec/score/inline/thread.inl

    r5c491aef rc64e4ed4  
    242242  Objects_Classes      the_class;
    243243  Objects_Information *information;
     244  Thread_Control      *tp = (Thread_Control *) 0;
    244245 
    245246  if ( _Objects_Are_ids_equal( id, OBJECTS_ID_OF_SELF ) ) {
    246247    _Thread_Disable_dispatch();
    247248    *location = OBJECTS_LOCAL;
    248     return( _Thread_Executing );
     249    tp = _Thread_Executing;
     250    goto done;
    249251  }
    250252 
    … …  
    253255  if ( the_class > OBJECTS_CLASSES_LAST ) {
    254256    *location = OBJECTS_ERROR;
    255     return (Thread_Control *) 0;
     257    goto done;
    256258  }
    257259 
    … …  
    260262  if ( !information || !information->is_thread ) {
    261263    *location = OBJECTS_ERROR;
    262     return (Thread_Control *) 0;
     264    goto done;
    263265  }
    264266 
    265   return (Thread_Control *) _Objects_Get( information, id, location );
    266 }
     267  tp = (Thread_Control *) _Objects_Get( information, id, location );
     268 
     269done:
     270  return tp;
     271}
     272
    267273
    268274/*
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