Changeset c533372 in rtems


Ignore:
Timestamp:
12/19/00 16:43:34 (22 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
3ad7c5d2
Parents:
8f4bddd
Message:

2000-12-19 Joel Sherrill <joel@…>

  • cpu.c: Do not read or write raw interrupt vector table if we are on a CPU that does not have a %vbr register and the BSP is configured as having the table in ROM.
Files:
4 edited

Legend:

Unmodified
Added
Removed
  • c/src/exec/score/cpu/m68k/ChangeLog

    r8f4bddd rc533372  
     12000-12-19      Joel Sherrill <joel@OARcorp.com>
     2
     3        * cpu.c: Do not read or write raw interrupt vector table if
     4        we are on a CPU that does not have a %vbr register and the
     5        BSP is configured as having the table in ROM.
     6
    172000-11-09      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
    28
  • c/src/exec/score/cpu/m68k/cpu.c

    r8f4bddd rc533372  
    9696
    9797  m68k_get_vbr( interrupt_table );
     98#if ( M68K_HAS_VBR == 1 )
    9899  *old_handler = interrupt_table[ vector ];
    99 #if ( M68K_HAS_VBR == 1 )
    100100  interrupt_table[ vector ] = new_handler;
    101101#else
     
    108108   */
    109109
     110  *old_handler = _CPU_ISR_jump_table[vector].isr_handler;
    110111  _CPU_ISR_jump_table[vector].isr_handler = (unsigned32) new_handler;
    111112  if ( (unsigned32) interrupt_table != 0xFFFFFFFF )
  • cpukit/score/cpu/m68k/ChangeLog

    r8f4bddd rc533372  
     12000-12-19      Joel Sherrill <joel@OARcorp.com>
     2
     3        * cpu.c: Do not read or write raw interrupt vector table if
     4        we are on a CPU that does not have a %vbr register and the
     5        BSP is configured as having the table in ROM.
     6
    172000-11-09      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
    28
  • cpukit/score/cpu/m68k/cpu.c

    r8f4bddd rc533372  
    9696
    9797  m68k_get_vbr( interrupt_table );
     98#if ( M68K_HAS_VBR == 1 )
    9899  *old_handler = interrupt_table[ vector ];
    99 #if ( M68K_HAS_VBR == 1 )
    100100  interrupt_table[ vector ] = new_handler;
    101101#else
     
    108108   */
    109109
     110  *old_handler = _CPU_ISR_jump_table[vector].isr_handler;
    110111  _CPU_ISR_jump_table[vector].isr_handler = (unsigned32) new_handler;
    111112  if ( (unsigned32) interrupt_table != 0xFFFFFFFF )
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