Changeset c4515a1 in rtems


Ignore:
Timestamp:
Sep 14, 2008, 11:33:05 PM (11 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, master
Children:
b4a52b1
Parents:
5c8d42b
Message:

2008-09-14 Joel Sherrill <joel.sherrill@…>

  • Makefile.am, configure.ac, startup/bspstart.c: Create bsp_get_work_area() into its own file and use BSP Framework to perform more initialization.
  • startup/bspgetworkarea.c: New file.
Location:
c/src/lib/libbsp/powerpc/haleakala
Files:
1 added
4 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/haleakala/ChangeLog

    r5c8d42b rc4515a1  
     12008-09-14      Joel Sherrill <joel.sherrill@oarcorp.com>
     2
     3        * Makefile.am, configure.ac, startup/bspstart.c: Create
     4        bsp_get_work_area() into its own file and use BSP Framework to
     5        perform more initialization.
     6        * startup/bspgetworkarea.c: New file.
     7
    182008-09-06      Ralf Corsépius <ralf.corsepius@rtems.org>
    29
  • c/src/lib/libbsp/powerpc/haleakala/Makefile.am

    r5c8d42b rc4515a1  
    3131startup_SOURCES = startup/bspclean.c ../../shared/bsplibc.c \
    3232    ../../shared/bsppost.c startup/bspstart.c ../../shared/bootcard.c \
    33     ../../shared/sbrk.c \
     33    ../../shared/bsppredriverhook.c startup/bspgetworkarea.c \
     34    ../../shared/bsppretaskinghook.c ../../shared/sbrk.c \
    3435    ../../shared/gnatinstallhandler.c
    3536
  • c/src/lib/libbsp/powerpc/haleakala/configure.ac

    r5c8d42b rc4515a1  
    3232 NOTE: Vectors are actually at 0xFFF00000 but file starts at offset.])
    3333
     34RTEMS_BSP_BOOTCARD_HANDLES_RAM_ALLOCATION
    3435
    3536# Explicitly list all Makefiles here
  • c/src/lib/libbsp/powerpc/haleakala/startup/bspstart.c

    r5c8d42b rc4515a1  
    1010 *  OUTPUT: NONE
    1111 *
    12  *  Author:     Thomas Doerfler <td@imd.m.isar.de>
     12 *  Author:     Thomas Doerfler <td@imd.m.isar.de>
    1313 *              IMD Ingenieurbuero fuer Microcomputertechnik
    1414 *
     
    1818 *  This file has been derived from the papyrus BSP:
    1919 *
    20  *  Author:     Andrew Bray <andy@i-cubed.co.uk>
     20 *  Author:     Andrew Bray <andy@i-cubed.co.uk>
    2121 *
    2222 *  COPYRIGHT (c) 1995 by i-cubed ltd.
     
    6464#include <bsp.h>
    6565#include <bsp/uart.h>
    66 #include <rtems/libio.h>
    67 #include <rtems/libcsupport.h>
    6866#include <bsp/irq.h>
    6967#include <rtems/bspIo.h>
     
    8179
    8280/* Expected by clock.c */
    83 uint32_t        bsp_clicks_per_usec;
    84 bool            bsp_timer_internal_clock;   /* true, when timer runs with CPU clk */
    85 uint32_t        bsp_timer_least_valid;
    86 uint32_t        bsp_timer_average_overhead;
    87 
    88 
    89 /*      Initialize whatever libc we are using
    90  *      called from postdriver hook
    91  */
    92 
    93 void bsp_postdriver_hook(void);
    94 void bsp_libc_init( void *, uint32_t, int );
    95 
    96 /*
    97  *
    98  *  bsp_predriver_hook
    99  *
    100  *  Before drivers are setup.
    101  */
    102 
    103 void bsp_predriver_hook(void)
    104 {
    105  
    106 }
    107 
    108 /*
    109  *  Function:   bsp_pretasking_hook
    110  *  Created:    95/03/10
    111  *
    112  *  Description:
    113  *      BSP pretasking hook.  Called just before drivers are initialized.
    114  *      Used to setup libc and install any BSP extensions.
    115  *
    116  *  NOTES:
    117  *      Must not use libc (to do io) from here, since drivers are
    118  *      not yet initialized.
    119  *
    120  */
    121 
    122 
    123 extern uint8_t  _RAMEnd;                /* Defined in linkcmds */
    124 
    125 void bsp_pretasking_hook(void)
    126 /* Initialise libc with the address and size of the heap, which runs
    127    from the end of the RTEMS workspace to the top of RAM */
    128 {
    129     uint32_t heap_start;
    130  
    131     heap_start = ( (uint32_t)Configuration.work_space_start +
    132                                         rtems_configuration_get_work_space_size() );
    133 
    134     bsp_libc_init((void *)heap_start, (uint32_t)(&_RAMEnd) - heap_start, 0);
    135 
    136         #ifdef RTEMS_DEBUG
    137                 rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
    138         #endif
    139 }
     81uint32_t    bsp_clicks_per_usec;
     82bool        bsp_timer_internal_clock;   /* true, when timer runs with CPU clk */
     83uint32_t    bsp_timer_least_valid;
     84uint32_t    bsp_timer_average_overhead;
    14085
    14186/*-------------------- Haleakala-specific UART setup -------------------------*/
     
    14489EarlyUARTInit(int baudRate)
    14590{
    146         uint8_t* up = (uint8_t*)(BSP_UART_IOBASE_COM1);
    147         int divider = BSP_UART_BAUD_BASE / baudRate;
    148         up[LCR] = DLAB;         /* Access DLM/DLL */
    149         up[DLL] = divider & 0x0FF;
    150         up[DLM] = divider >> 8;
    151         up[LCR] = CHR_8_BITS;
    152         up[MCR] = DTR | RTS;
    153         up[FCR] = FIFO_EN | XMIT_RESET | RCV_RESET;
    154         up[THR] = '+';
     91  uint8_t* up = (uint8_t*)(BSP_UART_IOBASE_COM1);
     92  int divider = BSP_UART_BAUD_BASE / baudRate;
     93  up[LCR] = DLAB;    /* Access DLM/DLL */
     94  up[DLL] = divider & 0x0FF;
     95  up[DLM] = divider >> 8;
     96  up[LCR] = CHR_8_BITS;
     97  up[MCR] = DTR | RTS;
     98  up[FCR] = FIFO_EN | XMIT_RESET | RCV_RESET;
     99  up[THR] = '+';
    155100}
    156101
     
    159104InitUARTClock(void)
    160105{
    161         uint32_t reg;
    162         mfsdr(SDR0_UART0,reg);
    163         reg &= ~0x008000FF;
    164         reg |= 0x00800001;              /* Ext clock, div 1 */
    165         mtsdr(SDR0_UART0,reg);
     106  uint32_t reg;
     107  mfsdr(SDR0_UART0,reg);
     108  reg &= ~0x008000FF;
     109  reg |= 0x00800001;    /* Ext clock, div 1 */
     110  mtsdr(SDR0_UART0,reg);
    166111}
    167112
     
    169114/* PPC405EX: select a GPIO function for the specified pin */
    170115{
    171         int shift;
    172         unsigned long value, mask;
    173         GPIORegisters* gpioPtr = (GPIORegisters*)(GPIOAddress);
    174 
    175         shift = (31 - bitnum) & 0xF;
    176         value = (source & 3) << (shift*2);
    177         mask  = 3 << (shift*2);
    178         if (bitnum <= 15) {
    179                 gpioPtr->OSRL = (gpioPtr->OSRL & ~mask) | value;
    180                 gpioPtr->TSRL = (gpioPtr->TSRL & ~mask) | value;
    181         } else {
    182                 gpioPtr->OSRH = (gpioPtr->OSRH & ~mask) | value;
    183                 gpioPtr->TSRH = (gpioPtr->TSRH & ~mask) | value;
    184         }
     116  int shift;
     117  unsigned long value, mask;
     118  GPIORegisters* gpioPtr = (GPIORegisters*)(GPIOAddress);
     119
     120  shift = (31 - bitnum) & 0xF;
     121  value = (source & 3) << (shift*2);
     122  mask  = 3 << (shift*2);
     123  if (bitnum <= 15) {
     124    gpioPtr->OSRL = (gpioPtr->OSRL & ~mask) | value;
     125    gpioPtr->TSRL = (gpioPtr->TSRL & ~mask) | value;
     126  } else {
     127    gpioPtr->OSRH = (gpioPtr->OSRH & ~mask) | value;
     128    gpioPtr->TSRH = (gpioPtr->TSRH & ~mask) | value;
     129  }
    185130}
    186131
    187132void Init_FPGA(void)
    188133{
    189         /* Have to write to the FPGA to enable the UART drivers */
    190         /* Have to enable CS2 as an output in GPIO to get the FPGA working */
    191         mtebc(EBC0_B2CR,0xF0018000);    /* Set up CS2 at 0xF0000000 */
    192         mtebc(EBC0_B2AP,0x9400C800);
    193         GPIO_AlternateSelect(9,1);              /* GPIO9 = PerCS2 */
    194         {
    195                 unsigned long *fpgaPtr = (unsigned long*)(0xF0000000);
    196                 unsigned long n;
    197                 n = *(fpgaPtr);
    198                 n &= ~0x00100;          /* User LEDs on */
    199                 n |=  0x30000;          /* UART 0 and 1 transcievers on! */
    200                 *fpgaPtr = n;
    201         }
     134  /* Have to write to the FPGA to enable the UART drivers */
     135  /* Have to enable CS2 as an output in GPIO to get the FPGA working */
     136  mtebc(EBC0_B2CR,0xF0018000);  /* Set up CS2 at 0xF0000000 */
     137  mtebc(EBC0_B2AP,0x9400C800);
     138  GPIO_AlternateSelect(9,1);    /* GPIO9 = PerCS2 */
     139  {
     140    unsigned long *fpgaPtr = (unsigned long*)(0xF0000000);
     141    unsigned long n;
     142    n = *(fpgaPtr);
     143    n &= ~0x00100;    /* User LEDs on */
     144    n |=  0x30000;    /* UART 0 and 1 transcievers on! */
     145    *fpgaPtr = n;
     146  }
    202147}
    203148
     
    207152DirectUARTWrite(const char c)
    208153{
    209         uint8_t* up = (uint8_t*)(BSP_UART_IOBASE_COM1);
    210         while ((up[LSR] & THRE) == 0) { ; }
    211         up[THR] = c;
    212         if (c=='\n')
    213                 DirectUARTWrite('\r');
     154  uint8_t* up = (uint8_t*)(BSP_UART_IOBASE_COM1);
     155  while ((up[LSR] & THRE) == 0) { ; }
     156  up[THR] = c;
     157  if (c=='\n')
     158    DirectUARTWrite('\r');
    214159}
    215160
     
    217162BSP_output_char_function_type BSP_output_char = DirectUARTWrite;
    218163
    219 
    220164/*===================================================================*/
    221165
     
    226170 *  This routine does the bulk of the system initialization.
    227171 */
    228 
    229 
    230172void bsp_start( void )
    231173{
    232         LINKER_SYMBOL(intrStack_start);
    233         LINKER_SYMBOL(intrStack_size);
    234         ppc_cpu_id_t myCpu;
    235         ppc_cpu_revision_t myCpuRevision;
    236 
    237         /* Get the UART clock initialized first in case we call printk */
    238 
    239         InitUARTClock();
    240         Init_FPGA();
    241         EarlyUARTInit(115200);
    242 
    243         /*
    244         * Get CPU identification dynamically. Note that the get_ppc_cpu_type()
    245         * function store the result in global variables
    246         * so that it can be used later...
    247         */
    248         myCpu       = get_ppc_cpu_type();
    249         myCpuRevision = get_ppc_cpu_revision();
    250 
    251         /*
    252         *  initialize the device driver parameters
    253         */
    254 
    255         /* Set globals visible to clock.c */
    256         bsp_clicks_per_usec = 400;      /* timebase register ticks/microsecond = CPU Clk in MHz */
    257         bsp_timer_internal_clock  = TRUE;
    258         bsp_timer_average_overhead = 2;
    259         bsp_timer_least_valid = 3;
    260        
    261         /*
    262         * Initialize default raw exception handlers.
    263         */
    264         ppc_exc_initialize(
    265                 PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
    266                            (uint32_t) intrStack_start,
    267                            (uint32_t) intrStack_size);
    268 
    269         /*
    270         * Install our own set of exception vectors
    271         */
    272         BSP_rtems_irq_mng_init(0);
    273 
    274         /*
    275         *  Allocate the memory for the RTEMS Work Space.  This can come from
    276         *  a variety of places: hard coded address, malloc'ed from outside
    277         *  RTEMS world (e.g. simulator or primitive memory manager), or (as
    278         *  typically done by stock BSPs) by subtracting the required amount
    279         *  of work space from the last physical address on the CPU board.
    280         */
    281         /* In this case we allocate space at an address defined in linkcmds
    282            which points to a block above the stack and below the heap */
    283         {
    284                 extern uint8_t  _WorkspaceStart;       
    285                 Configuration.work_space_start = &_WorkspaceStart;
    286         }
    287 
     174  LINKER_SYMBOL(intrStack_start);
     175  LINKER_SYMBOL(intrStack_size);
     176  ppc_cpu_id_t myCpu;
     177  ppc_cpu_revision_t myCpuRevision;
     178
     179  /* Get the UART clock initialized first in case we call printk */
     180
     181  InitUARTClock();
     182  Init_FPGA();
     183  EarlyUARTInit(115200);
     184
     185  /*
     186   * Get CPU identification dynamically. Note that the get_ppc_cpu_type()
     187   * function store the result in global variables
     188   * so that it can be used later...
     189   */
     190  myCpu       = get_ppc_cpu_type();
     191  myCpuRevision = get_ppc_cpu_revision();
     192
     193  /*
     194   *  initialize the device driver parameters
     195   */
     196
     197  /* Set globals visible to clock.c */
     198  /* timebase register ticks/microsecond = CPU Clk in MHz */
     199  bsp_clicks_per_usec = 400;
     200
     201  bsp_timer_internal_clock  = TRUE;
     202  bsp_timer_average_overhead = 2;
     203  bsp_timer_least_valid = 3;
     204 
     205  /*
     206   * Initialize default raw exception handlers.
     207   */
     208  ppc_exc_initialize(
     209    PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
     210    (uint32_t) intrStack_start,
     211    (uint32_t) intrStack_size);
     212
     213  /*
     214   * Install our own set of exception vectors
     215   */
     216  BSP_rtems_irq_mng_init(0);
    288217}
    289218
     
    305234  BSP_ask_for_reset();
    306235}
    307 
    308 
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