record: Allow tracing of ISR disable/enable
Directly use the CPU port API in boot_card() to allow tracing of the
higher level interrupt disable/enable routines, e.g.
_ISR_Local_disable() and _ISR_Local_enable(). Currently, there is no
configuration option to enable this. Below is a patch. It may be used
to investigate some nasty low level bugs in the system.
Update #3665.
diff --git a/cpukit/include/rtems/score/isrlevel.h b/cpukit/include/rtems/score/isrlevel.h
index c42451d010..46d361ddc2 100644
--- a/cpukit/include/rtems/score/isrlevel.h
+++ b/cpukit/include/rtems/score/isrlevel.h
@@ -40,6 +40,10 @@ extern "C" {
*/
typedef uint32_t ISR_Level;
+uint32_t rtems_record_interrupt_disable( void );
+
+void rtems_record_interrupt_enable( uint32_t level );
+
/
- @brief Disables interrupts on this processor.
*
@@ -56,8 +60,7 @@ typedef uint32_t ISR_Level;
*/
#define _ISR_Local_disable( _level ) \
do { \
- _CPU_ISR_Disable( _level ); \
- RTEMS_COMPILER_MEMORY_BARRIER(); \
+ _level = rtems_record_interrupt_disable(); \
} while (0)
/
@@ -72,10 +75,7 @@ typedef uint32_t ISR_Level;
#define _ISR_Local_enable( _level ) \
- do { \
- RTEMS_COMPILER_MEMORY_BARRIER(); \
- _CPU_ISR_Enable( _level ); \
- } while (0)
+ rtems_record_interrupt_enable( _level )
/
- @brief Temporarily enables interrupts on this processor.
@@ -98,9 +98,8 @@ typedef uint32_t ISR_Level;
*/
#define _ISR_Local_flash( _level ) \
do { \
- RTEMS_COMPILER_MEMORY_BARRIER(); \
- _CPU_ISR_Flash( _level ); \
- RTEMS_COMPILER_MEMORY_BARRIER(); \
+ rtems_record_interrupt_enable( _level ); \
+ _level = rtems_record_interrupt_disable(); \
} while (0)
/