Changeset bff8ca6b in rtems


Ignore:
Timestamp:
Jun 13, 2003, 1:41:21 PM (17 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Children:
7a848b40
Parents:
10f72fd
Message:

2003-06-13 Till Straumann <strauman@…>

PR 415/bsps

  • include/bsp.h, pci/detect_raven_bridge.c, startup/bspstart.c: Support enabling MCP exceptions on the host bridge. This can be used for memory probing on the VME bus.
Location:
c/src/lib/libbsp/powerpc/shared
Files:
4 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/shared/ChangeLog

    r10f72fd rbff8ca6b  
     12003-06-13  Till Straumann <strauman@slac.stanford.edu>
     2
     3        PR 415/bsps
     4        * include/bsp.h, pci/detect_raven_bridge.c, startup/bspstart.c:
     5        Support enabling MCP exceptions on the host bridge. This can
     6        be used for memory probing on the VME bus.
     7
    182003-04-10  Till Straumann <strauman@slac.stanford.edu>
    29
  • c/src/lib/libbsp/powerpc/shared/include/bsp.h

    r10f72fd rbff8ca6b  
    9292extern int BSP_connect_clock_handler (void);
    9393
     94/* clear hostbridge errors
     95 *
     96 * enableMCP: whether to enable MCP checkstop / machine check interrupts
     97 *            on the hostbridge and in HID0.
     98 *
     99 *            NOTE: HID0 and MEREN are left alone if this flag is 0
     100 *
     101 * quiet    : be silent
     102 *
     103 * RETURNS  : raven MERST register contents (lowermost 16 bits), 0 if
     104 *            there were no errors
     105 */
     106extern unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet);
     107
     108
    94109/*
    95110 *  TM27 stuff
  • c/src/lib/libbsp/powerpc/shared/pci/detect_raven_bridge.c

    r10f72fd rbff8ca6b  
    44
    55#include <libcpu/io.h>
     6#include <libcpu/spr.h>
    67
    78#include <bsp.h>
     
    1314#include <rtems/bspIo.h>
    1415
     16SPR_RW(HID0)
     17
    1518#define RAVEN_MPIC_IOSPACE_ENABLE       0x1
    1619#define RAVEN_MPIC_MEMSPACE_ENABLE      0x2
     
    2023#define RAVEN_CLEAR_EVENTS_MASK         0xf9000000
    2124
     25#define RAVEN_MPIC_MEREN                0xfeff0020
     26#define RAVEN_MPIC_MERST                0xfeff0024
     27/* enable machine check on all conditions
     28 * EXCEPT for signalled master abort (which
     29 * can be caused by PCI configuration space
     30 * accesses to non-present devices)
     31 * - of course, this is sort of a hack :-(
     32 */
     33#define MEREN_VAL                               0x2d00
     34
    2235#define pci BSP_pci_configuration
    2336
    2437extern const pci_config_access_functions pci_direct_functions;
    2538extern const pci_config_access_functions pci_indirect_functions;
     39
     40unsigned long
     41_BSP_clear_hostbridge_errors(int enableMCP, int quiet)
     42{
     43unsigned merst;
     44
     45                merst = in_be32(RAVEN_MPIC_MERST);
     46                /* write back value to clear status */
     47                out_be32(RAVEN_MPIC_MERST, merst);
     48
     49                if (enableMCP) {
     50                        if (!quiet)
     51                                printk("Enabling MCP generation on hostbridge errors\n");
     52                        out_be32(RAVEN_MPIC_MEREN, MEREN_VAL);
     53                        _write_HID0(_read_HID0() | HID0_EMCP );
     54                } else {
     55                        if ( !quiet && enableMCP ) {
     56                                printk("leaving MCP interrupt disabled\n");
     57                        }
     58                }
     59                return (merst & 0xffff);
     60}
    2661
    2762void detect_host_bridge()
  • c/src/lib/libbsp/powerpc/shared/startup/bspstart.c

    r10f72fd rbff8ca6b  
    324324                                           residualCopy.VitalProductData.TimeBaseDivisor : 4000);
    325325
     326  /* clear hostbridge errors and enable MCP */
     327  _BSP_clear_hostbridge_errors(1/*enableMCP*/, 0/*quiet*/);
     328
    326329  /* Allocate and set up the page table mappings
    327330   * This is only available on >604 CPUs.
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