Changeset bf70702 in rtems

Timestamp:

02/09/18 07:59:27 (5 years ago)

Author:

Christian Mauderer <christian.mauderer@…>

Branches:

5, master

Children:

b2e26b7

Parents:

6878519

git-author:

Christian Mauderer <christian.mauderer@…> (02/09/18 07:59:27)

git-committer:

Christian Mauderer <christian.mauderer@…> (02/12/18 13:36:23)

Message:

dev/sc16is752: Add GPIO access via ioctl.

Location:

cpukit

Files:

• dev/serial/sc16is752-regs.h (modified) (1 diff)
• dev/serial/sc16is752.c (modified) (2 diffs)
• include/dev/serial/sc16is752.h (modified) (1 diff)

cpukit/dev/serial/sc16is752-regs.h

@@ -108 +108 @@
 #define EFR_CTS_FLOW_CTRL_EN (1u << 7)
 
+/* IOCONTROL: User accessible. Therefore see sc16is752.h for the defines. */
+
 #define SC16IS752_FIFO_DEPTH 64
 

cpukit/dev/serial/sc16is752.c

@@ -283 +283 @@
 {
   sc16is752_context *ctx = (sc16is752_context *)base;
+  uint8_t regval;
 
   switch (request) {
@@ -290 +291 @@
     case SC16IS752_GET_SLEEP_MODE:
       *(int *)buffer = is_sleep_mode_enabled(ctx);
+      break;
+    case SC16IS752_SET_IOCONTROL:
+      regval = (*(uint8_t *)buffer) & ~SC16IS752_IOCONTROL_SRESET;
+      write_reg(ctx, SC16IS752_IOCONTROL, &regval, 1);
+      break;
+    case SC16IS752_GET_IOCONTROL:
+      read_reg(ctx, SC16IS752_IOCONTROL, (uint8_t *)buffer, 1);
+      break;
+    case SC16IS752_SET_IODIR:
+      write_reg(ctx, SC16IS752_IODIR, (uint8_t *)buffer, 1);
+      break;
+    case SC16IS752_GET_IODIR:
+      read_reg(ctx, SC16IS752_IODIR, (uint8_t *)buffer, 1);
+      break;
+    case SC16IS752_SET_IOSTATE:
+      write_reg(ctx, SC16IS752_IOSTATE, (uint8_t *)buffer, 1);
+      break;
+    case SC16IS752_GET_IOSTATE:
+      read_reg(ctx, SC16IS752_IOSTATE, (uint8_t *)buffer, 1);
       break;
     default:

cpukit/include/dev/serial/sc16is752.h

@@ -252 +252 @@
 
 /**
+ * @brief Set the I/O Control bits except for the SRESET.
+ *
+ * Note that it will not be possible to set the SRESET. Otherwise the driver
+ * might would have an undefined state.
+ */
+#define SC16IS752_SET_IOCONTROL _IOW('d', 1, uint8_t)
+
+/**
+ * @brief Set the I/O pins direction register.
+ */
+#define SC16IS752_SET_IODIR _IOW('d', 2, uint8_t)
+
+/**
+ * @brief Set the I/O pins state register.
+ */
+#define SC16IS752_SET_IOSTATE _IOW('d', 3, uint8_t)
+
+/**
  * @brief Returns non-zero in case the sleep mode is enabled, otherwise zero.
  */
 #define SC16IS752_GET_SLEEP_MODE _IOR('d', 0, int)
+
+/**
+ * @brief Read the I/O Control register.
+ */
+#define SC16IS752_GET_IOCONTROL _IOR('d', 1, uint8_t)
+
+/**
+ * @brief Read the I/O pins direction register.
+ */
+#define SC16IS752_GET_IODIR _IOR('d', 2, uint8_t)
+
+/**
+ * @brief Read the I/O pins state register.
+ */
+#define SC16IS752_GET_IOSTATE _IOR('d', 3, uint8_t)
+
+/**
+ * @brief Bits for the IOCONTROL register.
+ * @{
+ */
+#define SC16IS752_IOCONTROL_SRESET (1u << 3)
+#define SC16IS752_IOCONTROL_GPIO_3_0_OR_MODEM (1u << 2)
+#define SC16IS752_IOCONTROL_GPIO_7_4_OR_MODEM (1u << 1)
+#define SC16IS752_IOCONTROL_IOLATCH (1u << 0)
+/**
+ * @}
+ */
 
 #ifdef __cplusplus