Changeset bf70702 in rtems
- Timestamp:
- 02/09/18 07:59:27 (5 years ago)
- Branches:
- 5, master
- Children:
- b2e26b7
- Parents:
- 6878519
- git-author:
- Christian Mauderer <christian.mauderer@…> (02/09/18 07:59:27)
- git-committer:
- Christian Mauderer <christian.mauderer@…> (02/12/18 13:36:23)
- Location:
- cpukit
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
cpukit/dev/serial/sc16is752-regs.h
r6878519 rbf70702 108 108 #define EFR_CTS_FLOW_CTRL_EN (1u << 7) 109 109 110 /* IOCONTROL: User accessible. Therefore see sc16is752.h for the defines. */ 111 110 112 #define SC16IS752_FIFO_DEPTH 64 111 113 -
cpukit/dev/serial/sc16is752.c
r6878519 rbf70702 283 283 { 284 284 sc16is752_context *ctx = (sc16is752_context *)base; 285 uint8_t regval; 285 286 286 287 switch (request) { … … 290 291 case SC16IS752_GET_SLEEP_MODE: 291 292 *(int *)buffer = is_sleep_mode_enabled(ctx); 293 break; 294 case SC16IS752_SET_IOCONTROL: 295 regval = (*(uint8_t *)buffer) & ~SC16IS752_IOCONTROL_SRESET; 296 write_reg(ctx, SC16IS752_IOCONTROL, ®val, 1); 297 break; 298 case SC16IS752_GET_IOCONTROL: 299 read_reg(ctx, SC16IS752_IOCONTROL, (uint8_t *)buffer, 1); 300 break; 301 case SC16IS752_SET_IODIR: 302 write_reg(ctx, SC16IS752_IODIR, (uint8_t *)buffer, 1); 303 break; 304 case SC16IS752_GET_IODIR: 305 read_reg(ctx, SC16IS752_IODIR, (uint8_t *)buffer, 1); 306 break; 307 case SC16IS752_SET_IOSTATE: 308 write_reg(ctx, SC16IS752_IOSTATE, (uint8_t *)buffer, 1); 309 break; 310 case SC16IS752_GET_IOSTATE: 311 read_reg(ctx, SC16IS752_IOSTATE, (uint8_t *)buffer, 1); 292 312 break; 293 313 default: -
cpukit/include/dev/serial/sc16is752.h
r6878519 rbf70702 252 252 253 253 /** 254 * @brief Set the I/O Control bits except for the SRESET. 255 * 256 * Note that it will not be possible to set the SRESET. Otherwise the driver 257 * might would have an undefined state. 258 */ 259 #define SC16IS752_SET_IOCONTROL _IOW('d', 1, uint8_t) 260 261 /** 262 * @brief Set the I/O pins direction register. 263 */ 264 #define SC16IS752_SET_IODIR _IOW('d', 2, uint8_t) 265 266 /** 267 * @brief Set the I/O pins state register. 268 */ 269 #define SC16IS752_SET_IOSTATE _IOW('d', 3, uint8_t) 270 271 /** 254 272 * @brief Returns non-zero in case the sleep mode is enabled, otherwise zero. 255 273 */ 256 274 #define SC16IS752_GET_SLEEP_MODE _IOR('d', 0, int) 275 276 /** 277 * @brief Read the I/O Control register. 278 */ 279 #define SC16IS752_GET_IOCONTROL _IOR('d', 1, uint8_t) 280 281 /** 282 * @brief Read the I/O pins direction register. 283 */ 284 #define SC16IS752_GET_IODIR _IOR('d', 2, uint8_t) 285 286 /** 287 * @brief Read the I/O pins state register. 288 */ 289 #define SC16IS752_GET_IOSTATE _IOR('d', 3, uint8_t) 290 291 /** 292 * @brief Bits for the IOCONTROL register. 293 * @{ 294 */ 295 #define SC16IS752_IOCONTROL_SRESET (1u << 3) 296 #define SC16IS752_IOCONTROL_GPIO_3_0_OR_MODEM (1u << 2) 297 #define SC16IS752_IOCONTROL_GPIO_7_4_OR_MODEM (1u << 1) 298 #define SC16IS752_IOCONTROL_IOLATCH (1u << 0) 299 /** 300 * @} 301 */ 257 302 258 303 #ifdef __cplusplus
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