Changeset bf30999 in rtems


Ignore:
Timestamp:
Aug 23, 2013, 2:15:50 PM (6 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
4.11, master
Children:
4238aff
Parents:
1215fd4
git-author:
Sebastian Huber <sebastian.huber@…> (08/23/13 14:15:50)
git-committer:
Sebastian Huber <sebastian.huber@…> (08/30/13 09:16:28)
Message:

smp: Add and use _Assert_Owner_of_giant()

Add and use _ISR_Disable_without_giant() and
_ISR_Enable_without_giant() if RTEMS_SMP is defined.

On single processor systems the ISR disable/enable was the big hammer
which ensured system-wide mutual exclusion. On SMP configurations this
no longer works since other processors do not care about disabled
interrupts on this processor and continue to execute freely.

On SMP in addition to ISR disable/enable an SMP lock must be used.
Currently we have only the Giant lock so we can check easily that ISR
disable/enable is used only in the right context.

Files:
12 edited

Legend:

Unmodified
Added
Removed
  • cpukit/rtems/src/taskmode.c

    r1215fd4 rbf30999  
    4040    ISR_Level level;
    4141
    42     _ISR_Disable( level );
     42    _ISR_Disable_without_giant( level );
    4343#endif
    4444
     
    4949
    5050#if defined( RTEMS_SMP )
    51     _ISR_Enable( level );
     51    _ISR_Enable_without_giant( level );
    5252#endif
    5353
  • cpukit/score/include/rtems/score/assert.h

    r1215fd4 rbf30999  
    5151#endif
    5252
     53/**
     54 * @brief Asserts that current thread of execution owns the giant lock.
     55 */
     56#if defined( RTEMS_DEBUG ) && defined( RTEMS_SMP )
     57  void _Assert_Owner_of_giant( void );
     58#else
     59  #define _Assert_Owner_of_giant() ( ( void ) 0 )
     60#endif
     61
    5362#ifdef __cplusplus
    5463}
  • cpukit/score/include/rtems/score/isr.h

    r1215fd4 rbf30999  
    164164    ISR_Level level;
    165165
    166     _ISR_Disable( level );
     166    _ISR_Disable_without_giant( level );
    167167  #endif
    168168
     
    170170
    171171  #if defined( RTEMS_SMP )
    172     _ISR_Enable( level );
     172    _ISR_Enable_without_giant( level );
    173173  #endif
    174174
  • cpukit/score/include/rtems/score/isrlevel.h

    r1215fd4 rbf30999  
    2121
    2222#include <rtems/score/cpu.h>
     23#include <rtems/score/assert.h>
    2324
    2425#ifdef __cplusplus
     
    5859  do { \
    5960    _CPU_ISR_Disable( _level ); \
     61    _Assert_Owner_of_giant(); \
    6062    RTEMS_COMPILER_MEMORY_BARRIER(); \
    6163  } while (0)
     
    7577  do { \
    7678    RTEMS_COMPILER_MEMORY_BARRIER(); \
     79    _Assert_Owner_of_giant(); \
    7780    _CPU_ISR_Enable( _level ); \
    7881  } while (0)
     
    100103  do { \
    101104    RTEMS_COMPILER_MEMORY_BARRIER(); \
     105    _Assert_Owner_of_giant(); \
    102106    _CPU_ISR_Flash( _level ); \
    103107    RTEMS_COMPILER_MEMORY_BARRIER(); \
     
    133137  } while (0)
    134138
     139#if defined( RTEMS_SMP )
     140
     141#define _ISR_Disable_without_giant( _level ) \
     142  do { \
     143    _CPU_ISR_Disable( _level ); \
     144    RTEMS_COMPILER_MEMORY_BARRIER(); \
     145  } while (0)
     146
     147#define _ISR_Enable_without_giant( _level ) \
     148  do { \
     149    RTEMS_COMPILER_MEMORY_BARRIER(); \
     150    _CPU_ISR_Enable( _level ); \
     151  } while (0)
     152
     153#endif /* defined( RTEMS_SMP ) */
     154
    135155/**@}*/
    136156
  • cpukit/score/include/rtems/score/thread.h

    r1215fd4 rbf30999  
    496496    ISR_Level level;
    497497
    498     _ISR_Disable( level );
     498    _ISR_Disable_without_giant( level );
    499499  #endif
    500500
     
    502502
    503503  #if defined( RTEMS_SMP )
    504     _ISR_Enable( level );
     504    _ISR_Enable_without_giant( level );
    505505  #endif
    506506
  • cpukit/score/include/rtems/score/threaddispatch.h

    r1215fd4 rbf30999  
    5555  ISR_Level level;
    5656
    57   _ISR_Disable( level );
     57  _ISR_Disable_without_giant( level );
    5858#endif
    5959
     
    6161
    6262#if defined(RTEMS_SMP)
    63   _ISR_Enable( level );
     63  _ISR_Enable_without_giant( level );
    6464#endif
    6565
  • cpukit/score/src/smp.c

    r1215fd4 rbf30999  
    7676
    7777    if ( ( message & RTEMS_BSP_SMP_SHUTDOWN ) != 0 ) {
    78       _ISR_Disable( level );
     78      _ISR_Disable_without_giant( level );
    7979
    8080      _Thread_Dispatch_set_disable_level( 0 );
  • cpukit/score/src/threaddispatch.c

    r1215fd4 rbf30999  
    3636
    3737#if defined( RTEMS_SMP )
    38   _ISR_Disable( level );
     38  _ISR_Disable_without_giant( level );
    3939#endif
    4040
     
    4444
    4545#if defined( RTEMS_SMP )
    46   _ISR_Enable( level );
     46  _ISR_Enable_without_giant( level );
    4747#endif
    4848
  • cpukit/score/src/threaddispatchdisablelevel.c

    r1215fd4 rbf30999  
    1818#include <rtems/score/threaddispatch.h>
    1919#include <rtems/score/assert.h>
     20#include <rtems/score/sysstate.h>
    2021
    2122#define NO_OWNER_CPU 0xffffffffU
     
    6465  Per_CPU_Control *self_cpu;
    6566
    66   _ISR_Disable( isr_level );
     67  _ISR_Disable_without_giant( isr_level );
    6768
    6869  /*
     
    7980  self_cpu->thread_dispatch_disable_level = disable_level;
    8081
    81   _ISR_Enable( isr_level );
     82  _ISR_Enable_without_giant( isr_level );
    8283
    8384  return disable_level;
     
    9091  Per_CPU_Control *self_cpu;
    9192
    92   _ISR_Disable( isr_level );
     93  _ISR_Disable_without_giant( isr_level );
    9394
    9495  self_cpu = _Per_CPU_Get();
     
    9899
    99100  _Giant_Do_release();
     101  _Assert( disable_level != 0 || _Giant.owner_cpu == NO_OWNER_CPU );
    100102
    101   _ISR_Enable( isr_level );
     103  _ISR_Enable_without_giant( isr_level );
    102104
    103105  return disable_level;
     
    119121  uint32_t disable_level;
    120122
    121   _ISR_Disable( isr_level );
     123  _ISR_Disable_without_giant( isr_level );
    122124  disable_level = _Thread_Dispatch_disable_level;
    123   _ISR_Enable( isr_level );
     125  _ISR_Enable_without_giant( isr_level );
    124126
    125127  /*
     
    148150  ISR_Level isr_level;
    149151
    150   _ISR_Disable( isr_level );
     152  _ISR_Disable_without_giant( isr_level );
    151153  _Assert( _Thread_Dispatch_disable_level != 0 );
    152154  _Giant_Do_acquire( _SMP_Get_current_processor() );
    153   _ISR_Enable( isr_level );
     155  _ISR_Enable_without_giant( isr_level );
    154156}
    155157
     
    158160  ISR_Level isr_level;
    159161
    160   _ISR_Disable( isr_level );
     162  _ISR_Disable_without_giant( isr_level );
    161163  _Assert( _Thread_Dispatch_disable_level != 0 );
    162164  _Giant_Do_release();
    163   _ISR_Enable( isr_level );
     165  _ISR_Enable_without_giant( isr_level );
    164166}
     167
     168#if defined( RTEMS_DEBUG )
     169void _Assert_Owner_of_giant( void )
     170{
     171  Giant_Control *giant = &_Giant;
     172
     173  _Assert(
     174    giant->owner_cpu == _SMP_Get_current_processor()
     175      || !_System_state_Is_up( _System_state_Get() )
     176  );
     177}
     178#endif
  • testsuites/sptests/sp37/init.c

    r1215fd4 rbf30999  
    230230
    231231  puts( "interrupt disable (use inline)" );
     232  _Thread_Disable_dispatch();
    232233  rtems_interrupt_disable( level );
     234  _Thread_Enable_dispatch();
    233235
    234236  puts( "interrupt flash (use inline)" );
     237  _Thread_Disable_dispatch();
    235238  rtems_interrupt_flash( level );
     239  _Thread_Enable_dispatch();
    236240
    237241  puts( "interrupt enable (use inline)" );
     242  _Thread_Disable_dispatch();
    238243  rtems_interrupt_enable( level );
     244  _Thread_Enable_dispatch();
    239245
    240246  puts( "interrupt level mode (use inline)" );
     
    464470
    465471  puts( "interrupt disable (use body)" );
     472  _Thread_Disable_dispatch();
    466473  level = rtems_interrupt_disable();
     474  _Thread_Enable_dispatch();
    467475
    468476  puts( "interrupt disable (use body)" );
     477  _Thread_Disable_dispatch();
    469478  level = rtems_interrupt_disable();
     479  _Thread_Enable_dispatch();
    470480
    471481  puts( "interrupt flash (use body)" );
     482  _Thread_Disable_dispatch();
    472483  rtems_interrupt_flash( level );
     484  _Thread_Enable_dispatch();
    473485
    474486  puts( "interrupt enable (use body)" );
     487  _Thread_Disable_dispatch();
    475488  rtems_interrupt_enable( level );
     489  _Thread_Enable_dispatch();
    476490
    477491  puts( "interrupt level mode (use body)" );
  • testsuites/tmtests/tm26/task1.c

    r1215fd4 rbf30999  
    2121
    2222#include <rtems/rtems/semimpl.h>
     23
     24#if defined( RTEMS_SMP ) && defined( RTEMS_DEBUG )
     25  #define PREVENT_SMP_ASSERT_FAILURES
     26#endif
    2327
    2428/* TEST DATA */
     
    8589static void set_thread_dispatch_necessary( bool dispatch_necessary )
    8690{
    87 #if defined( RTEMS_SMP )
    88   rtems_interrupt_level level;
    89 
    90   rtems_interrupt_disable( level );
     91#if defined( PREVENT_SMP_ASSERT_FAILURES )
     92  ISR_Level level;
     93
     94  _ISR_Disable_without_giant( level );
    9195#endif
    9296
    9397  _Thread_Dispatch_necessary = dispatch_necessary;
    9498
    95 #if defined( RTEMS_SMP )
    96   rtems_interrupt_enable( level );
     99#if defined( PREVENT_SMP_ASSERT_FAILURES )
     100  _ISR_Enable_without_giant( level );
    97101#endif
    98102}
     
    100104static void set_thread_heir( Thread_Control *thread )
    101105{
    102 #if defined( RTEMS_SMP )
    103   rtems_interrupt_level level;
    104 
    105   rtems_interrupt_disable( level );
     106#if defined( PREVENT_SMP_ASSERT_FAILURES )
     107  ISR_Level level;
     108
     109  _ISR_Disable_without_giant( level );
    106110#endif
    107111
    108112  _Thread_Heir = thread;
    109113
    110 #if defined( RTEMS_SMP )
    111   rtems_interrupt_enable( level );
     114#if defined( PREVENT_SMP_ASSERT_FAILURES )
     115  _ISR_Enable_without_giant( level );
    112116#endif
    113117}
     
    115119static void set_thread_executing( Thread_Control *thread )
    116120{
    117 #if defined( RTEMS_SMP )
    118   rtems_interrupt_level level;
    119 
    120   rtems_interrupt_disable( level );
     121#if defined( PREVENT_SMP_ASSERT_FAILURES )
     122  ISR_Level level;
     123
     124  _ISR_Disable_without_giant( level );
    121125#endif
    122126
    123127  _Thread_Executing = thread;
    124128
    125 #if defined( RTEMS_SMP )
    126   rtems_interrupt_enable( level );
     129#if defined( PREVENT_SMP_ASSERT_FAILURES )
     130  _ISR_Enable_without_giant( level );
    127131#endif
    128132}
     
    130134static void thread_disable_dispatch( void )
    131135{
    132 #if defined( RTEMS_SMP )
     136#if defined( PREVENT_SMP_ASSERT_FAILURES )
    133137  Per_CPU_Control *self_cpu;
    134   rtems_interrupt_level level;
    135 
    136   rtems_interrupt_disable( level );
     138  ISR_Level level;
     139
     140  _ISR_Disable_without_giant( level );
    137141  ( void ) level;
    138142
     
    143147#else
    144148  _Thread_Disable_dispatch();
     149#endif
     150}
     151
     152static void thread_set_state( Thread_Control *thread, States_Control state )
     153{
     154#if defined( PREVENT_SMP_ASSERT_FAILURES )
     155  _Thread_Disable_dispatch();
     156#endif
     157
     158  _Thread_Set_state( thread, state );
     159
     160#if defined( PREVENT_SMP_ASSERT_FAILURES )
     161  _Thread_Unnest_dispatch();
     162#endif
     163}
     164
     165static void thread_resume( Thread_Control *thread )
     166{
     167#if defined( PREVENT_SMP_ASSERT_FAILURES )
     168  _Thread_Disable_dispatch();
     169#endif
     170
     171  _Thread_Resume( thread );
     172
     173#if defined( PREVENT_SMP_ASSERT_FAILURES )
     174  _Thread_Unnest_dispatch();
     175#endif
     176}
     177
     178static void thread_unblock( Thread_Control *thread )
     179{
     180#if defined( PREVENT_SMP_ASSERT_FAILURES )
     181  _Thread_Disable_dispatch();
     182#endif
     183
     184  _Thread_Unblock( thread );
     185
     186#if defined( PREVENT_SMP_ASSERT_FAILURES )
     187  _Thread_Unnest_dispatch();
     188#endif
     189}
     190
     191static void thread_ready( Thread_Control *thread )
     192{
     193#if defined( PREVENT_SMP_ASSERT_FAILURES )
     194  _Thread_Disable_dispatch();
     195#endif
     196
     197  _Thread_Ready( thread );
     198
     199#if defined( PREVENT_SMP_ASSERT_FAILURES )
     200  _Thread_Unnest_dispatch();
    145201#endif
    146202}
     
    274330  rtems_interrupt_level level;
    275331
     332  _Thread_Disable_dispatch();
     333
    276334  benchmark_timer_initialize();
    277335    rtems_interrupt_disable( level );
     
    286344  isr_enable_time = benchmark_timer_read();
    287345
     346  _Thread_Enable_dispatch();
     347
    288348  benchmark_timer_initialize();
    289349    _Thread_Disable_dispatch();
     
    295355
    296356  benchmark_timer_initialize();
    297     _Thread_Set_state( _Thread_Get_executing(), STATES_SUSPENDED );
     357    thread_set_state( _Thread_Get_executing(), STATES_SUSPENDED );
    298358  thread_set_state_time = benchmark_timer_read();
    299359
     
    312372  thread_dispatch_no_fp_time = benchmark_timer_read();
    313373
    314   _Thread_Set_state( _Thread_Get_executing(), STATES_SUSPENDED );
     374  thread_set_state( _Thread_Get_executing(), STATES_SUSPENDED );
    315375
    316376  Middle_tcb   = _Thread_Get_executing();
     
    479539
    480540  benchmark_timer_initialize();
    481     _Thread_Resume( Middle_tcb );
     541    thread_resume( Middle_tcb );
    482542  thread_resume_time = benchmark_timer_read();
    483543
    484   _Thread_Set_state( Middle_tcb, STATES_WAITING_FOR_MESSAGE );
    485 
    486   benchmark_timer_initialize();
    487     _Thread_Unblock( Middle_tcb );
     544  thread_set_state( Middle_tcb, STATES_WAITING_FOR_MESSAGE );
     545
     546  benchmark_timer_initialize();
     547    thread_unblock( Middle_tcb );
    488548  thread_unblock_time = benchmark_timer_read();
    489549
    490   _Thread_Set_state( Middle_tcb, STATES_WAITING_FOR_MESSAGE );
    491 
    492   benchmark_timer_initialize();
    493     _Thread_Ready( Middle_tcb );
     550  thread_set_state( Middle_tcb, STATES_WAITING_FOR_MESSAGE );
     551
     552  benchmark_timer_initialize();
     553    thread_ready( Middle_tcb );
    494554  thread_ready_time = benchmark_timer_read();
    495555
  • testsuites/tmtests/tm27/task1.c

    r1215fd4 rbf30999  
    185185
    186186#if defined(RTEMS_SMP)
    187   rtems_interrupt_disable(level);
     187  _ISR_Disable_without_giant(level);
    188188#endif
    189189
     
    195195
    196196#if defined(RTEMS_SMP)
    197   rtems_interrupt_enable(level);
     197  _ISR_Enable_without_giant(level);
    198198#endif
    199199
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