Changeset bef2b73 in rtems for c/src/lib/libbsp/arm/raspberrypi/startup/bspstarthooks.c

Timestamp:

Jul 17, 2016, 4:45:46 PM (5 years ago)

Author:

Pavel Pisa <pisa@…>

Branches:

5, master

Children:

dcf806e

Parents:

577e7fb

git-author:

Pavel Pisa <pisa@…> (07/17/16 16:45:46)

git-committer:

Pavel Pisa <pisa@…> (07/20/16 14:46:04)

Message:

arm/raspberrypi: use cache manager operations to flush/invalidate all cache levels.

This fix strange behavior where some stale content has been
stored in level 2 cache before RTEMS has been start from U-boot
which has reappeared after MMU enable and shadow vector
table at start of SDRAM.

File:

• c/src/lib/libbsp/arm/raspberrypi/startup/bspstarthooks.c (modified) (1 diff)

c/src/lib/libbsp/arm/raspberrypi/startup/bspstarthooks.c

@@ -49 +49 @@
        * before switching off to be extra carefull.
        */
-      arm_cp15_drain_write_buffer();
-      arm_cp15_data_cache_clean_and_invalidate();
+      rtems_cache_flush_entire_data();
+      rtems_cache_invalidate_entire_data();
     }
     arm_cp15_flush_prefetch_buffer();
     sctlr_val &= ~(ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M | ARM_CP15_CTRL_A);
     arm_cp15_set_control(sctlr_val);
-
-    arm_cp15_tlb_invalidate();
-    arm_cp15_flush_prefetch_buffer();
-    arm_cp15_data_cache_invalidate();
-    arm_cp15_instruction_cache_invalidate();
   }
+  rtems_cache_invalidate_entire_data();
+  rtems_cache_invalidate_entire_instruction();
+  arm_cp15_branch_predictor_invalidate_all();
+  arm_cp15_tlb_invalidate();
+  arm_cp15_flush_prefetch_buffer();
 
   /* Clear Translation Table Base Control Register */