Changeset bef2b73 in rtems


Ignore:
Timestamp:
Jul 17, 2016, 4:45:46 PM (4 years ago)
Author:
Pavel Pisa <pisa@…>
Branches:
5, master
Children:
dcf806e
Parents:
577e7fb
git-author:
Pavel Pisa <pisa@…> (07/17/16 16:45:46)
git-committer:
Pavel Pisa <pisa@…> (07/20/16 14:46:04)
Message:

arm/raspberrypi: use cache manager operations to flush/invalidate all cache levels.

This fix strange behavior where some stale content has been
stored in level 2 cache before RTEMS has been start from U-boot
which has reappeared after MMU enable and shadow vector
table at start of SDRAM.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/arm/raspberrypi/startup/bspstarthooks.c

    r577e7fb rbef2b73  
    4949       * before switching off to be extra carefull.
    5050       */
    51       arm_cp15_drain_write_buffer();
    52       arm_cp15_data_cache_clean_and_invalidate();
     51      rtems_cache_flush_entire_data();
     52      rtems_cache_invalidate_entire_data();
    5353    }
    5454    arm_cp15_flush_prefetch_buffer();
    5555    sctlr_val &= ~(ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M | ARM_CP15_CTRL_A);
    5656    arm_cp15_set_control(sctlr_val);
    57 
    58     arm_cp15_tlb_invalidate();
    59     arm_cp15_flush_prefetch_buffer();
    60     arm_cp15_data_cache_invalidate();
    61     arm_cp15_instruction_cache_invalidate();
    6257  }
     58  rtems_cache_invalidate_entire_data();
     59  rtems_cache_invalidate_entire_instruction();
     60  arm_cp15_branch_predictor_invalidate_all();
     61  arm_cp15_tlb_invalidate();
     62  arm_cp15_flush_prefetch_buffer();
    6363
    6464  /* Clear Translation Table Base Control Register */
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