Index: c/src/lib/libbsp/m68k/uC5282/ChangeLog
===================================================================
--- c/src/lib/libbsp/m68k/uC5282/ChangeLog	(revision 6f10ffee3a6e5edc4c3a5bdbdc994f634000de33)
+++ c/src/lib/libbsp/m68k/uC5282/ChangeLog	(revision be5b08a42985f98269021cf900c74736dc850db3)
@@ -1,2 +1,7 @@
+2006-01-29  Eric Norum <norume@aps.anl.gov>
+
+    * clock/clock.c, network/network.c, startup/bspstart.c:
+            Add an 'extended BSP' routine which returns the CPU load average.
+
 2006-01-11	Ralf Corsepius <ralf.corsepius@rtems.org>
 
Index: c/src/lib/libbsp/m68k/uC5282/clock/clock.c
===================================================================
--- c/src/lib/libbsp/m68k/uC5282/clock/clock.c	(revision 6f10ffee3a6e5edc4c3a5bdbdc994f634000de33)
+++ c/src/lib/libbsp/m68k/uC5282/clock/clock.c	(revision be5b08a42985f98269021cf900c74736dc850db3)
@@ -24,10 +24,25 @@
 
 /*
+ * CPU load counters
+ * Place in static RAM so updates don't hit the SDRAM
+ */
+extern int __SRAMBASE[];
+#define IDLE_COUNTER      __SRAMBASE[0]
+#define FILTERED_IDLE     __SRAMBASE[1]
+#define MAX_IDLE_COUNT    __SRAMBASE[2]
+#define FILTER_SHIFT    6
+
+/*
  * Periodic interval timer interrupt handler
  */
-#define Clock_driver_support_at_tick()             \
-    do {                                           \
-        MCF5282_PIT3_PCSR |= MCF5282_PIT_PCSR_PIF; \
-    } while (0)                                    \
+#define Clock_driver_support_at_tick()                                       \
+    do {                                                                     \
+        int idle = IDLE_COUNTER;                                             \
+        IDLE_COUNTER = 0;                                                    \
+        if (idle > MAX_IDLE_COUNT)                                           \
+            MAX_IDLE_COUNT = idle;                                           \
+        FILTERED_IDLE = idle + FILTERED_IDLE - (FILTERED_IDLE>>FILTER_SHIFT);\
+        MCF5282_PIT3_PCSR |= MCF5282_PIT_PCSR_PIF;                           \
+    } while (0)
 
 /*
@@ -62,4 +77,7 @@
             preScaleCode++;                                              \
         }                                                                \
+        IDLE_COUNTER = 0;                                                \
+        FILTERED_IDLE = 0;                                               \
+        MAX_IDLE_COUNT = 0;                                              \
         bsp_allocate_interrupt(PIT3_IRQ_LEVEL, PIT3_IRQ_PRIORITY);       \
         MCF5282_INTC0_ICR58 = MCF5282_INTC_ICR_IL(PIT3_IRQ_LEVEL) |      \
@@ -69,4 +87,8 @@
 		MCF5282_PIT3_PCSR &= ~MCF5282_PIT_PCSR_EN;                       \
         rtems_interrupt_enable( level );                                 \
+		MCF5282_PIT3_PCSR = MCF5282_PIT_PCSR_PRE(preScaleCode) |         \
+                            MCF5282_PIT_PCSR_OVW |                       \
+                            MCF5282_PIT_PCSR_PIE |                       \
+                            MCF5282_PIT_PCSR_RLD;                        \
 		MCF5282_PIT3_PMR = BSP_Configuration.microseconds_per_tick - 1;  \
 		MCF5282_PIT3_PCSR = MCF5282_PIT_PCSR_PRE(preScaleCode) |         \
@@ -76,3 +98,17 @@
     } while (0)
 
+/*
+ * Provide our own version of the idle task
+ */
+void _BSP_Thread_Idle_body(void)
+{
+    for(;;)
+        asm volatile ("addq.l #1,__SRAMBASE"); /* Atomic increment */
+}
+
+int rtems_bsp_cpu_load_percentage(void)
+{
+    return 100 - ((100 * (FILTERED_IDLE >> FILTER_SHIFT)) / MAX_IDLE_COUNT);
+}
+
 #include "../../../shared/clockdrv_shell.c"
Index: c/src/lib/libbsp/m68k/uC5282/network/network.c
===================================================================
--- c/src/lib/libbsp/m68k/uC5282/network/network.c	(revision 6f10ffee3a6e5edc4c3a5bdbdc994f634000de33)
+++ c/src/lib/libbsp/m68k/uC5282/network/network.c	(revision be5b08a42985f98269021cf900c74736dc850db3)
@@ -195,4 +195,5 @@
  * Allocate buffer descriptors from (non-cached) on-chip static RAM
  * Ensure 128-bit (16-byte) alignment
+ * Allow some space at the beginning for other diagnostic counters
  */
 static mcf5282BufferDescriptor_t *
@@ -200,5 +201,5 @@
 {
     extern char __SRAMBASE[];
-    static mcf5282BufferDescriptor_t *bdp = (mcf5282BufferDescriptor_t *)__SRAMBASE;
+    static mcf5282BufferDescriptor_t *bdp = (mcf5282BufferDescriptor_t *)(__SRAMBASE+16);
     mcf5282BufferDescriptor_t *p = bdp;
 
Index: c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c
===================================================================
--- c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c	(revision 6f10ffee3a6e5edc4c3a5bdbdc994f634000de33)
+++ c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c	(revision be5b08a42985f98269021cf900c74736dc850db3)
@@ -222,5 +222,8 @@
   Cpu_table.do_zero_of_workspace = TRUE;
   Cpu_table.interrupt_stack_size = 4096;
-
+  {
+  extern void _BSP_Thread_Idle_body(void);
+  _CPU_Table.idle_task = _BSP_Thread_Idle_body;
+  }
   Cpu_table.interrupt_vector_table = (m68k_isr *)0; /* vectors at start of RAM */
 
