Changeset bd918ff7 in rtems

Timestamp:

Feb 11, 2011, 12:19:29 PM (9 years ago)

Author:

Ralf Corsepius <ralf.corsepius@…>

Branches:

4.11, master

Children:

7922b39c

Parents:

bd6cbca3

Message:

2011-02-11 Ralf Corsépius <ralf.corsepius@…>

• shared/console/polled_io.c, shared/flash/spansionFlash.c, shared/startup/bspidle.c, shared/startup/probeMemEnd.c: Use "asm" instead of "asm" for improved c99-compliance.

Location:

c/src/lib/libbsp/powerpc

Files:

• ChangeLog (modified) (1 diff)
• shared/console/polled_io.c (modified) (1 diff)
• shared/flash/spansionFlash.c (modified) (1 diff)
• shared/startup/bspidle.c (modified) (1 diff)
• shared/startup/probeMemEnd.c (modified) (1 diff)

c/src/lib/libbsp/powerpc/ChangeLog

@@ +1 @@
+2011-02-11      Ralf Corsépius <ralf.corsepius@rtems.org>
+
+        * shared/console/polled_io.c, shared/flash/spansionFlash.c,
+        shared/startup/bspidle.c, shared/startup/probeMemEnd.c:
+        Use "__asm__" instead of "asm" for improved c99-compliance.
+
 2011-02-02      Ralf Corsépius <ralf.corsepius@rtems.org>
 

c/src/lib/libbsp/powerpc/shared/console/polled_io.c

@@ -910 +910 @@
 #define div10(num, rmd)                                                  \
 do {    uint32_t t1, t2, t3;                                                     \
-        asm("lis %4,0xcccd; "                                            \
+        __asm__ ("lis %4,0xcccd; "                                               \
             "addi %4,%4,0xffffcccd; "   /* Build 0xcccccccd */           \
             "mulhwu %3,%0+1,%4; "       /* (num.l*cst.l).h  */           \

c/src/lib/libbsp/powerpc/shared/flash/spansionFlash.c

@@ -78 +78 @@
 
 #ifdef __PPC__
-#define IOSYNC(mem)     do { asm volatile("eieio"); } while (0)
+#define IOSYNC(mem)     do { __asm__ volatile("eieio"); } while (0)
 #else
 #define IOSYNC(mem)     do { } while (0)

c/src/lib/libbsp/powerpc/shared/startup/bspidle.c

@@ -28 +28 @@
 {
   for( ; ; ) {
-    asm volatile(
+    __asm__ volatile(
       "mfmsr 3; oris 3,3,4; sync; mtmsr 3; isync; ori 3,3,0; ori 3,3,0"
     );

c/src/lib/libbsp/powerpc/shared/startup/probeMemEnd.c

@@ -124 +124 @@
         if ( _read_MSR() & MSR_VE ) {
 #define DSSALL  0x7e00066c  /* dssall opcode */
-        asm volatile("  .long %0"::"i"(DSSALL));
+        __asm__ volatile("  .long %0"::"i"(DSSALL));
 #undef  DSSALL
         }