Changeset bd8c8b2a in rtems


Ignore:
Timestamp:
08/05/98 16:51:39 (24 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
dddc0557
Parents:
0e3c0096
Message:

Patch from Eric Valette <valette@…> which brings the i386ex BSP
inline with the new IRQ structure.

Location:
c/src
Files:
3 added
24 edited

Legend:

Unmodified
Added
Removed

  • c/src/exec/score/cpu/i386/cpu_asm.s

    r0e3c0096 rbd8c8b2a  
    110110        ret
    111111
    112 /*PAGE
    113  *  void _ISR_Handler()
    114  *
    115  *  This routine provides the RTEMS interrupt management.
    116  *
    117  *  NOTE:
    118  *    Upon entry, the stack will contain a stack frame back to the
    119  *    interrupted task.  If dispatching is enabled, this is the
    120  *    outer most interrupt, and (a context switch is necessary or
    121  *    the current task has signals), then set up the stack to
    122  *    transfer control to the interrupt dispatcher.
    123  */
    124 
    125 .set SET_SEGMENT_REGISTERS_IN_INTERRUPT, 0
    126 
    127 .set SAVED_REGS     , 32                   # space consumed by saved regs
    128 .set EIP_OFFSET     , SAVED_REGS           # offset of tasks eip
    129 .set CS_OFFSET      , EIP_OFFSET+4         # offset of tasks code segment
    130 .set EFLAGS_OFFSET  , CS_OFFSET+4          # offset of tasks eflags
    131 
    132         .p2align  1
    133         PUBLIC (_ISR_Handler)
    134 
    135 SYM (_ISR_Handler):
    136        /*
    137         *  Before this was point is reached the vectors unique
    138         *  entry point did the following:
    139         *
    140         *     1. saved all registers with a "pusha"
    141         *     2. put the vector number in eax.
    142         *
    143         * BEGINNING OF ESTABLISH SEGMENTS
    144         *
    145         *  WARNING: If an interrupt can occur when the segments are
    146         *           not correct, then this is where we should establish
    147         *           the segments.  In addition to establishing the
    148         *           segments, it may be necessary to establish a stack
    149         *           in the current data area on the outermost interrupt.
    150         *
    151         *  NOTE:  If the previous values of the segment registers are
    152         *         pushed, do not forget to adjust SAVED_REGS.
    153         *
    154         *  NOTE:  Make sure the exit code which restores these
    155         *         when this type of code is needed.
    156         */
    157 
    158        /***** ESTABLISH SEGMENTS CODE GOES HERE  ******/
    159 
    160        /*
    161         * END OF ESTABLISH SEGMENTS
    162         */
    163 
    164         /*
    165          *  Now switch stacks if necessary
    166          */
    167 
    168         movl      esp, edx                  # edx = previous stack pointer
    169         cmpl      $0, SYM (_ISR_Nest_level) # is this the outermost interrupt?
    170         jne       nested                    # No, then continue
    171         movl      SYM (_CPU_Interrupt_stack_high), esp
    172 
    173         /*
    174          *  We want to insure that the old stack pointer is on the
    175          *  stack we will be on at the end of the ISR when we restore it.
    176          *  By saving it on every interrupt, all we have to do is pop it
    177          *  near the end of every interrupt.
    178          */
    179 
    180 nested:
    181         pushl     edx                       # save the previous stack pointer
    182         incl      SYM (_ISR_Nest_level)     # one nest level deeper
    183         incl      SYM (_Thread_Dispatch_disable_level) # disable multitasking
    184 
    185         # EAX is preloaded with the vector number.
    186         push      eax                       # push vector number
    187         mov       SYM (_ISR_Vector_table) (,eax,4),eax
    188                                             # eax = Users handler
    189         call      eax                       # invoke user ISR
    190         pop       eax                       # eax = vector number
    191 
    192         decl      SYM (_ISR_Nest_level)     # one less ISR nest level
    193                                             # If interrupts are nested,
    194                                             #   then dispatching is disabled
    195 
    196         decl      SYM (_Thread_Dispatch_disable_level)
    197                                             # unnest multitasking
    198                                             # Is dispatch disabled
    199         jne       exit                      # Yes, then exit
    200 
    201         cmpl      $0, SYM (_Context_Switch_necessary)
    202                                             # Is task switch necessary?
    203         jne       bframe                    # Yes, then build stack
    204 
    205         cmpl      $0, SYM (_ISR_Signals_to_thread_executing)
    206                                             # signals sent to Run_thread
    207                                             #   while in interrupt handler?
    208         je        exit                      # No, exit
    209 
    210 bframe:
    211         cli                                 # DISABLE INTERRUPTS!!
    212         popl      esp                       # restore the stack pointer
    213         movl      $0, SYM (_ISR_Signals_to_thread_executing)
    214                                             # push the isf for Isr_dispatch
    215         push      EFLAGS_OFFSET(esp)        # push tasks eflags
    216         push      cs                        # cs of Isr_dispatch
    217         push      $ SYM (_ISR_Dispatch)     # entry point
    218         iret
    219 
    220 exit:
    221         cli                                 # DISABLE INTERRUPTS!!
    222         popl      esp                       # restore the stack pointer
    223 
    224        /*
    225         * BEGINNING OF DE-ESTABLISH SEGMENTS
    226         *
    227         *  NOTE:  Make sure there is code here if code is added to
    228         *         load the segment registers.
    229         *
    230         */
    231 
    232        /******* DE-ESTABLISH SEGMENTS CODE GOES HERE ********/
    233 
    234        /*
    235         * END OF DE-ESTABLISH SEGMENTS
    236         */
    237 
    238         popa                                # restore general registers
    239         iret
    240 
    241 /*PAGE
    242  *  Distinct Interrupt Entry Points
    243  *
    244  *  The following macro and the 256 instantiations of the macro
    245  *  are necessary to determine which interrupt vector occurred.
    246  *  The following macro allows a unique entry point to be defined
    247  *  for each vector.
    248  *
    249  *  NOTE: There are not spaces around the vector number argument
    250  *        to the DISTINCT_INTERRUPT_ENTRY macro because m4 will
    251  *        undesirably generate the symbol "_Isr_handler_ N"
    252  *        instead of "_Isr_handler_N" like we want.
    253  */
    254 
    255 #define DISTINCT_INTERRUPT_ENTRY(_vector) \
    256         .p2align 4                         ; \
    257         PUBLIC (_ISR_Handler_ ## _vector ) ; \
    258 SYM (_ISR_Handler_ ## _vector ):             \
    259         pusha                              ; \
    260         xor   eax, eax                     ; \
    261         movb  $ ## _vector, al             ; \
    262         jmp   SYM (_ISR_Handler) ;
    263 
    264 DISTINCT_INTERRUPT_ENTRY(0)
    265 DISTINCT_INTERRUPT_ENTRY(1)
    266 DISTINCT_INTERRUPT_ENTRY(2)
    267 DISTINCT_INTERRUPT_ENTRY(3)
    268 DISTINCT_INTERRUPT_ENTRY(4)
    269 DISTINCT_INTERRUPT_ENTRY(5)
    270 DISTINCT_INTERRUPT_ENTRY(6)
    271 DISTINCT_INTERRUPT_ENTRY(7)
    272 DISTINCT_INTERRUPT_ENTRY(8)
    273 DISTINCT_INTERRUPT_ENTRY(9)
    274 DISTINCT_INTERRUPT_ENTRY(10)
    275 DISTINCT_INTERRUPT_ENTRY(11)
    276 DISTINCT_INTERRUPT_ENTRY(12)
    277 DISTINCT_INTERRUPT_ENTRY(13)
    278 DISTINCT_INTERRUPT_ENTRY(14)
    279 DISTINCT_INTERRUPT_ENTRY(15)
    280 DISTINCT_INTERRUPT_ENTRY(16)
    281 DISTINCT_INTERRUPT_ENTRY(17)
    282 DISTINCT_INTERRUPT_ENTRY(18)
    283 DISTINCT_INTERRUPT_ENTRY(19)
    284 DISTINCT_INTERRUPT_ENTRY(20)
    285 DISTINCT_INTERRUPT_ENTRY(21)
    286 DISTINCT_INTERRUPT_ENTRY(22)
    287 DISTINCT_INTERRUPT_ENTRY(23)
    288 DISTINCT_INTERRUPT_ENTRY(24)
    289 DISTINCT_INTERRUPT_ENTRY(25)
    290 DISTINCT_INTERRUPT_ENTRY(26)
    291 DISTINCT_INTERRUPT_ENTRY(27)
    292 DISTINCT_INTERRUPT_ENTRY(28)
    293 DISTINCT_INTERRUPT_ENTRY(29)
    294 DISTINCT_INTERRUPT_ENTRY(30)
    295 DISTINCT_INTERRUPT_ENTRY(31)
    296 DISTINCT_INTERRUPT_ENTRY(32)
    297 DISTINCT_INTERRUPT_ENTRY(33)
    298 DISTINCT_INTERRUPT_ENTRY(34)
    299 DISTINCT_INTERRUPT_ENTRY(35)
    300 DISTINCT_INTERRUPT_ENTRY(36)
    301 DISTINCT_INTERRUPT_ENTRY(37)
    302 DISTINCT_INTERRUPT_ENTRY(38)
    303 DISTINCT_INTERRUPT_ENTRY(39)
    304 DISTINCT_INTERRUPT_ENTRY(40)
    305 DISTINCT_INTERRUPT_ENTRY(41)
    306 DISTINCT_INTERRUPT_ENTRY(42)
    307 DISTINCT_INTERRUPT_ENTRY(43)
    308 DISTINCT_INTERRUPT_ENTRY(44)
    309 DISTINCT_INTERRUPT_ENTRY(45)
    310 DISTINCT_INTERRUPT_ENTRY(46)
    311 DISTINCT_INTERRUPT_ENTRY(47)
    312 DISTINCT_INTERRUPT_ENTRY(48)
    313 DISTINCT_INTERRUPT_ENTRY(49)
    314 DISTINCT_INTERRUPT_ENTRY(50)
    315 DISTINCT_INTERRUPT_ENTRY(51)
    316 DISTINCT_INTERRUPT_ENTRY(52)
    317 DISTINCT_INTERRUPT_ENTRY(53)
    318 DISTINCT_INTERRUPT_ENTRY(54)
    319 DISTINCT_INTERRUPT_ENTRY(55)
    320 DISTINCT_INTERRUPT_ENTRY(56)
    321 DISTINCT_INTERRUPT_ENTRY(57)
    322 DISTINCT_INTERRUPT_ENTRY(58)
    323 DISTINCT_INTERRUPT_ENTRY(59)
    324 DISTINCT_INTERRUPT_ENTRY(60)
    325 DISTINCT_INTERRUPT_ENTRY(61)
    326 DISTINCT_INTERRUPT_ENTRY(62)
    327 DISTINCT_INTERRUPT_ENTRY(63)
    328 DISTINCT_INTERRUPT_ENTRY(64)
    329 DISTINCT_INTERRUPT_ENTRY(65)
    330 DISTINCT_INTERRUPT_ENTRY(66)
    331 DISTINCT_INTERRUPT_ENTRY(67)
    332 DISTINCT_INTERRUPT_ENTRY(68)
    333 DISTINCT_INTERRUPT_ENTRY(69)
    334 DISTINCT_INTERRUPT_ENTRY(70)
    335 DISTINCT_INTERRUPT_ENTRY(71)
    336 DISTINCT_INTERRUPT_ENTRY(72)
    337 DISTINCT_INTERRUPT_ENTRY(73)
    338 DISTINCT_INTERRUPT_ENTRY(74)
    339 DISTINCT_INTERRUPT_ENTRY(75)
    340 DISTINCT_INTERRUPT_ENTRY(76)
    341 DISTINCT_INTERRUPT_ENTRY(77)
    342 DISTINCT_INTERRUPT_ENTRY(78)
    343 DISTINCT_INTERRUPT_ENTRY(79)
    344 DISTINCT_INTERRUPT_ENTRY(80)
    345 DISTINCT_INTERRUPT_ENTRY(81)
    346 DISTINCT_INTERRUPT_ENTRY(82)
    347 DISTINCT_INTERRUPT_ENTRY(83)
    348 DISTINCT_INTERRUPT_ENTRY(84)
    349 DISTINCT_INTERRUPT_ENTRY(85)
    350 DISTINCT_INTERRUPT_ENTRY(86)
    351 DISTINCT_INTERRUPT_ENTRY(87)
    352 DISTINCT_INTERRUPT_ENTRY(88)
    353 DISTINCT_INTERRUPT_ENTRY(89)
    354 DISTINCT_INTERRUPT_ENTRY(90)
    355 DISTINCT_INTERRUPT_ENTRY(91)
    356 DISTINCT_INTERRUPT_ENTRY(92)
    357 DISTINCT_INTERRUPT_ENTRY(93)
    358 DISTINCT_INTERRUPT_ENTRY(94)
    359 DISTINCT_INTERRUPT_ENTRY(95)
    360 DISTINCT_INTERRUPT_ENTRY(96)
    361 DISTINCT_INTERRUPT_ENTRY(97)
    362 DISTINCT_INTERRUPT_ENTRY(98)
    363 DISTINCT_INTERRUPT_ENTRY(99)
    364 DISTINCT_INTERRUPT_ENTRY(100)
    365 DISTINCT_INTERRUPT_ENTRY(101)
    366 DISTINCT_INTERRUPT_ENTRY(102)
    367 DISTINCT_INTERRUPT_ENTRY(103)
    368 DISTINCT_INTERRUPT_ENTRY(104)
    369 DISTINCT_INTERRUPT_ENTRY(105)
    370 DISTINCT_INTERRUPT_ENTRY(106)
    371 DISTINCT_INTERRUPT_ENTRY(107)
    372 DISTINCT_INTERRUPT_ENTRY(108)
    373 DISTINCT_INTERRUPT_ENTRY(109)
    374 DISTINCT_INTERRUPT_ENTRY(110)
    375 DISTINCT_INTERRUPT_ENTRY(111)
    376 DISTINCT_INTERRUPT_ENTRY(112)
    377 DISTINCT_INTERRUPT_ENTRY(113)
    378 DISTINCT_INTERRUPT_ENTRY(114)
    379 DISTINCT_INTERRUPT_ENTRY(115)
    380 DISTINCT_INTERRUPT_ENTRY(116)
    381 DISTINCT_INTERRUPT_ENTRY(117)
    382 DISTINCT_INTERRUPT_ENTRY(118)
    383 DISTINCT_INTERRUPT_ENTRY(119)
    384 DISTINCT_INTERRUPT_ENTRY(120)
    385 DISTINCT_INTERRUPT_ENTRY(121)
    386 DISTINCT_INTERRUPT_ENTRY(122)
    387 DISTINCT_INTERRUPT_ENTRY(123)
    388 DISTINCT_INTERRUPT_ENTRY(124)
    389 DISTINCT_INTERRUPT_ENTRY(125)
    390 DISTINCT_INTERRUPT_ENTRY(126)
    391 DISTINCT_INTERRUPT_ENTRY(127)
    392 DISTINCT_INTERRUPT_ENTRY(128)
    393 DISTINCT_INTERRUPT_ENTRY(129)
    394 DISTINCT_INTERRUPT_ENTRY(130)
    395 DISTINCT_INTERRUPT_ENTRY(131)
    396 DISTINCT_INTERRUPT_ENTRY(132)
    397 DISTINCT_INTERRUPT_ENTRY(133)
    398 DISTINCT_INTERRUPT_ENTRY(134)
    399 DISTINCT_INTERRUPT_ENTRY(135)
    400 DISTINCT_INTERRUPT_ENTRY(136)
    401 DISTINCT_INTERRUPT_ENTRY(137)
    402 DISTINCT_INTERRUPT_ENTRY(138)
    403 DISTINCT_INTERRUPT_ENTRY(139)
    404 DISTINCT_INTERRUPT_ENTRY(140)
    405 DISTINCT_INTERRUPT_ENTRY(141)
    406 DISTINCT_INTERRUPT_ENTRY(142)
    407 DISTINCT_INTERRUPT_ENTRY(143)
    408 DISTINCT_INTERRUPT_ENTRY(144)
    409 DISTINCT_INTERRUPT_ENTRY(145)
    410 DISTINCT_INTERRUPT_ENTRY(146)
    411 DISTINCT_INTERRUPT_ENTRY(147)
    412 DISTINCT_INTERRUPT_ENTRY(148)
    413 DISTINCT_INTERRUPT_ENTRY(149)
    414 DISTINCT_INTERRUPT_ENTRY(150)
    415 DISTINCT_INTERRUPT_ENTRY(151)
    416 DISTINCT_INTERRUPT_ENTRY(152)
    417 DISTINCT_INTERRUPT_ENTRY(153)
    418 DISTINCT_INTERRUPT_ENTRY(154)
    419 DISTINCT_INTERRUPT_ENTRY(155)
    420 DISTINCT_INTERRUPT_ENTRY(156)
    421 DISTINCT_INTERRUPT_ENTRY(157)
    422 DISTINCT_INTERRUPT_ENTRY(158)
    423 DISTINCT_INTERRUPT_ENTRY(159)
    424 DISTINCT_INTERRUPT_ENTRY(160)
    425 DISTINCT_INTERRUPT_ENTRY(161)
    426 DISTINCT_INTERRUPT_ENTRY(162)
    427 DISTINCT_INTERRUPT_ENTRY(163)
    428 DISTINCT_INTERRUPT_ENTRY(164)
    429 DISTINCT_INTERRUPT_ENTRY(165)
    430 DISTINCT_INTERRUPT_ENTRY(166)
    431 DISTINCT_INTERRUPT_ENTRY(167)
    432 DISTINCT_INTERRUPT_ENTRY(168)
    433 DISTINCT_INTERRUPT_ENTRY(169)
    434 DISTINCT_INTERRUPT_ENTRY(170)
    435 DISTINCT_INTERRUPT_ENTRY(171)
    436 DISTINCT_INTERRUPT_ENTRY(172)
    437 DISTINCT_INTERRUPT_ENTRY(173)
    438 DISTINCT_INTERRUPT_ENTRY(174)
    439 DISTINCT_INTERRUPT_ENTRY(175)
    440 DISTINCT_INTERRUPT_ENTRY(176)
    441 DISTINCT_INTERRUPT_ENTRY(177)
    442 DISTINCT_INTERRUPT_ENTRY(178)
    443 DISTINCT_INTERRUPT_ENTRY(179)
    444 DISTINCT_INTERRUPT_ENTRY(180)
    445 DISTINCT_INTERRUPT_ENTRY(181)
    446 DISTINCT_INTERRUPT_ENTRY(182)
    447 DISTINCT_INTERRUPT_ENTRY(183)
    448 DISTINCT_INTERRUPT_ENTRY(184)
    449 DISTINCT_INTERRUPT_ENTRY(185)
    450 DISTINCT_INTERRUPT_ENTRY(186)
    451 DISTINCT_INTERRUPT_ENTRY(187)
    452 DISTINCT_INTERRUPT_ENTRY(188)
    453 DISTINCT_INTERRUPT_ENTRY(189)
    454 DISTINCT_INTERRUPT_ENTRY(190)
    455 DISTINCT_INTERRUPT_ENTRY(191)
    456 DISTINCT_INTERRUPT_ENTRY(192)
    457 DISTINCT_INTERRUPT_ENTRY(193)
    458 DISTINCT_INTERRUPT_ENTRY(194)
    459 DISTINCT_INTERRUPT_ENTRY(195)
    460 DISTINCT_INTERRUPT_ENTRY(196)
    461 DISTINCT_INTERRUPT_ENTRY(197)
    462 DISTINCT_INTERRUPT_ENTRY(198)
    463 DISTINCT_INTERRUPT_ENTRY(199)
    464 DISTINCT_INTERRUPT_ENTRY(200)
    465 DISTINCT_INTERRUPT_ENTRY(201)
    466 DISTINCT_INTERRUPT_ENTRY(202)
    467 DISTINCT_INTERRUPT_ENTRY(203)
    468 DISTINCT_INTERRUPT_ENTRY(204)
    469 DISTINCT_INTERRUPT_ENTRY(205)
    470 DISTINCT_INTERRUPT_ENTRY(206)
    471 DISTINCT_INTERRUPT_ENTRY(207)
    472 DISTINCT_INTERRUPT_ENTRY(208)
    473 DISTINCT_INTERRUPT_ENTRY(209)
    474 DISTINCT_INTERRUPT_ENTRY(210)
    475 DISTINCT_INTERRUPT_ENTRY(211)
    476 DISTINCT_INTERRUPT_ENTRY(212)
    477 DISTINCT_INTERRUPT_ENTRY(213)
    478 DISTINCT_INTERRUPT_ENTRY(214)
    479 DISTINCT_INTERRUPT_ENTRY(215)
    480 DISTINCT_INTERRUPT_ENTRY(216)
    481 DISTINCT_INTERRUPT_ENTRY(217)
    482 DISTINCT_INTERRUPT_ENTRY(218)
    483 DISTINCT_INTERRUPT_ENTRY(219)
    484 DISTINCT_INTERRUPT_ENTRY(220)
    485 DISTINCT_INTERRUPT_ENTRY(221)
    486 DISTINCT_INTERRUPT_ENTRY(222)
    487 DISTINCT_INTERRUPT_ENTRY(223)
    488 DISTINCT_INTERRUPT_ENTRY(224)
    489 DISTINCT_INTERRUPT_ENTRY(225)
    490 DISTINCT_INTERRUPT_ENTRY(226)
    491 DISTINCT_INTERRUPT_ENTRY(227)
    492 DISTINCT_INTERRUPT_ENTRY(228)
    493 DISTINCT_INTERRUPT_ENTRY(229)
    494 DISTINCT_INTERRUPT_ENTRY(230)
    495 DISTINCT_INTERRUPT_ENTRY(231)
    496 DISTINCT_INTERRUPT_ENTRY(232)
    497 DISTINCT_INTERRUPT_ENTRY(233)
    498 DISTINCT_INTERRUPT_ENTRY(234)
    499 DISTINCT_INTERRUPT_ENTRY(235)
    500 DISTINCT_INTERRUPT_ENTRY(236)
    501 DISTINCT_INTERRUPT_ENTRY(237)
    502 DISTINCT_INTERRUPT_ENTRY(238)
    503 DISTINCT_INTERRUPT_ENTRY(239)
    504 DISTINCT_INTERRUPT_ENTRY(240)
    505 DISTINCT_INTERRUPT_ENTRY(241)
    506 DISTINCT_INTERRUPT_ENTRY(242)
    507 DISTINCT_INTERRUPT_ENTRY(243)
    508 DISTINCT_INTERRUPT_ENTRY(244)
    509 DISTINCT_INTERRUPT_ENTRY(245)
    510 DISTINCT_INTERRUPT_ENTRY(246)
    511 DISTINCT_INTERRUPT_ENTRY(247)
    512 DISTINCT_INTERRUPT_ENTRY(248)
    513 DISTINCT_INTERRUPT_ENTRY(249)
    514 DISTINCT_INTERRUPT_ENTRY(250)
    515 DISTINCT_INTERRUPT_ENTRY(251)
    516 DISTINCT_INTERRUPT_ENTRY(252)
    517 DISTINCT_INTERRUPT_ENTRY(253)
    518 DISTINCT_INTERRUPT_ENTRY(254)
    519 DISTINCT_INTERRUPT_ENTRY(255)
    520 
    521 /*PAGE
    522  *  void _ISR_Dispatch()
    523  *
    524  *  Entry point from the outermost interrupt service routine exit.
    525  *  The current stack is the supervisor mode stack.
    526  */
    527 
    528         PUBLIC (_ISR_Dispatch)
    529 SYM (_ISR_Dispatch):
    530 
    531         call      SYM (_Thread_Dispatch)   # invoke Dispatcher
    532 
    533        /*
    534         * BEGINNING OF DE-ESTABLISH SEGMENTS
    535         *
    536         *  NOTE:  Make sure there is code here if code is added to
    537         *         load the segment registers.
    538         *
    539         */
    540 
    541        /***** DE-ESTABLISH SEGMENTS CODE GOES HERE ****/
    542 
    543        /*
    544         * END OF DE-ESTABLISH SEGMENTS
    545         */
    546 
    547         popa                                # restore general registers
    548         iret                                # return to interrupted thread
    549 
    550112/*
    551113 *  GO32 does not require these segment related routines.

  • c/src/exec/score/cpu/i386/i386.h

    r0e3c0096 rbd8c8b2a  
    130130}
    131131
    132 /*
    133  *  IO Port Access Routines
    134  */
    135 
    136 #define i386_outport_byte( _port, _value ) \
    137    { register unsigned short __port  = _port; \
    138      register unsigned char  __value = _value; \
    139      \
    140      asm volatile ( "outb %0,%1" : "=a" (__value), "=d" (__port) \
    141                                  : "0"   (__value), "1"  (__port) \
    142                   ); \
    143    }
    144 
    145 #define i386_outport_word( _port, _value ) \
    146    { register unsigned short __port  = _port; \
    147      register unsigned short __value = _value; \
    148      \
    149      asm volatile ( "outw %0,%1" : "=a" (__value), "=d" (__port) \
    150                                  : "0"   (__value), "1"  (__port) \
    151                   ); \
    152    }
    153 
    154 #define i386_outport_long( _port, _value ) \
    155    { register unsigned short __port  = _port; \
    156      register unsigned int  __value = _value; \
    157      \
    158      asm volatile ( "outl %0,%1" : "=a" (__value), "=d" (__port) \
    159                                  : "0"   (__value), "1"  (__port) \
    160                   ); \
    161    }
    162 
    163 #define i386_inport_byte( _port, _value ) \
    164    { register unsigned short __port  = _port; \
    165      register unsigned char  __value = 0; \
    166      \
    167      asm volatile ( "inb %1,%0" : "=a" (__value), "=d" (__port) \
    168                                 : "0"   (__value), "1"  (__port) \
    169                   ); \
    170      _value = __value; \
    171    }
    172 
    173 #define i386_inport_word( _port, _value ) \
    174    { register unsigned short __port  = _port; \
    175      register unsigned short __value = 0; \
    176      \
    177      asm volatile ( "inw %1,%0" : "=a" (__value), "=d" (__port) \
    178                                 : "0"   (__value), "1"  (__port) \
    179                   ); \
    180      _value = __value; \
    181    }
    182 
    183 #define i386_inport_long( _port, _value ) \
    184    { register unsigned short __port  = _port; \
    185      register unsigned int  __value = 0; \
    186      \
    187      asm volatile ( "inl %1,%0" : "=a" (__value), "=d" (__port) \
    188                                 : "0"   (__value), "1"  (__port) \
    189                   ); \
    190      _value = __value; \
    191    }
    192 
    193132
    194133/* routines */

  • c/src/lib/libbsp/i386/i386ex/clock/ckinit.c

    r0e3c0096 rbd8c8b2a  
    2222
    2323#include <bsp.h>
     24#include <irq.h>
    2425
    2526#include <rtems/libio.h>
    … …  
    2728#include <stdlib.h>
    2829
    29 #define CLOCK_VECTOR 0x20
    30 
    3130rtems_unsigned32 Clock_isrs;              /* ISRs until next tick */
    3231
    3332volatile rtems_unsigned32 Clock_driver_ticks;
    34 
    35 rtems_isr_entry  Old_ticker;
    3633
    3734void Clock_exit( void );
    … …  
    4845 */
    4946
    50 rtems_isr Clock_isr(
    51   rtems_vector_number vector
    52 )
     47void Clock_isr()
    5348{
    5449  /* enable_tracing(); */
    … …  
    6257}
    6358
    64 void Install_clock(
    65   rtems_isr_entry clock_isr
    66 )
     59void ClockOff(const rtems_irq_connect_data* unused)
    6760{
    68   Clock_driver_ticks = 0;
    69   Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
     61     /* should do something here */;
     62}
    7063
    71   if ( BSP_Configuration.ticks_per_timeslice ) {
    72     Old_ticker = ( rtems_isr_entry ) set_vector( clock_isr, CLOCK_VECTOR, 1 );
    73 
     64void ClockOn(const rtems_irq_connect_data* unused)
     65{
    7466/*  The following is already set up in interns.s ->
    7567    ( This is test code only... production code will move the
    … …  
    8274#define TMRCFG    0xF834
    8375       
    84         outport_byte    ( TMRCFG , 0x80 );
     76  outport_byte  ( TMRCFG , 0x80 );
    8577
    86         outport_byte    ( TMRCON , 0x34 );
    87         outport_byte    ( TMR0   , 0xA8 );
    88         outport_byte    ( TMR0   , 0x04 );
     78  outport_byte    ( TMRCON , 0x34 );
     79  outport_byte  ( TMR0   , 0xA8 );
     80  outport_byte    ( TMR0   , 0x04 );
    8981
    90         outport_byte    ( TMRCFG , 0x00 );
    91   }
    92   atexit( Clock_exit );
     82  outport_byte    ( TMRCFG , 0x00 );
    9383}
    9484
    95 void Clock_exit( void )
     85int ClockIsOn(const rtems_irq_connect_data* unused)
    9686{
    97   if ( BSP_Configuration.ticks_per_timeslice ) {
    98      /* should do something here */;
    99   }
     87  return ((i8259s_cache & 0x1) == 0);
    10088}
    10189
     90static rtems_irq_connect_data clockIrqData = {PC_386_PERIODIC_TIMER,
     91                                              Clock_isr,
     92                                              ClockOn,
     93                                              ClockOff,
     94                                              ClockIsOn};
    10295
    10396rtems_device_driver Clock_initialize(
    … …  
    107100)
    108101{
    109   Install_clock( Clock_isr );
    110 
     102  Clock_driver_ticks = 0;
     103  Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
     104  if (!pc386_install_rtems_irq_handler (&clockIrqData)) {
     105    printk("Unable to initialize system clock\n");
     106    rtems_fatal_error_occurred(1);
     107  }
    111108  /*
    112109   * make major/minor avail to others such as shared memory driver
    … …  
    125122)
    126123{
    127     rtems_unsigned32 isrlevel;
    128124    rtems_libio_ioctl_args_t *args = pargp;
    129125 
    … …  
    138134    if (args->command == rtems_build_name('I', 'S', 'R', ' '))
    139135    {
    140         Clock_isr(CLOCK_VECTOR);
     136        Clock_isr();
    141137    }
    142138    else if (args->command == rtems_build_name('N', 'E', 'W', ' '))
    143139    {
    144       rtems_interrupt_disable( isrlevel );
    145        (void) set_vector( args->buffer, CLOCK_VECTOR, 1 );
    146       rtems_interrupt_enable( isrlevel );
     140      if (!pc386_install_rtems_irq_handler (&clockIrqData)) {
     141        printk("Error installing clock interrupt handler!\n");
     142        rtems_fatal_error_occurred(1);
     143      }
    147144    }
    148145 
    … …  
    151148}
    152149
     150void Clock_exit()
     151{
     152  pc386_remove_rtems_irq_handler (&clockIrqData);
     153}

  • c/src/lib/libbsp/i386/i386ex/console/Makefile.in

    r0e3c0096 rbd8c8b2a  
    1111PGM=${ARCH}/console.rel
    1212
     13IMPORT_SRC=$(srcdir)/../../shared/io/printk.c
     14
    1315# C source names, if any, go here -- minus the .c
    14 C_PIECES=console
     16C_PIECES=console printk
    1517C_FILES=$(C_PIECES:%=%.c)
    1618C_O_FILES=$(C_PIECES:%=${ARCH}/%.o)
    … …  
    5052CLOBBER_ADDITIONS +=
    5153
     54preinstall:
     55        ${CP} ${IMPORT_SRC} .
     56
    5257${PGM}: ${SRCS} ${OBJS}
    5358        $(make-rel)
    5459
    55 all:    ${ARCH} $(SRCS) $(PGM)
     60all:    ${ARCH} preinstall $(SRCS) $(PGM)
    5661
    5762# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile

  • c/src/lib/libbsp/i386/i386ex/console/console.c

    r0e3c0096 rbd8c8b2a  
    1717#include <bsp.h>
    1818#include <rtems/libio.h>
    19  
     19#include <bspIo.h>
    2020#include <stdlib.h>
    2121
    … …  
    110110}
    111111
     112/*
     113 * Wait for an input. May be used before  intr are ON.
     114 */
     115char BSP_wait_polled_input( void )
     116{
     117  char c;
     118  while (!is_character_ready(&c))
     119    continue;
     120
     121  return c;
     122}
     123     
    112124/*  inbyte
    113125 *
    … …  
    278290  return RTEMS_SUCCESSFUL;
    279291}
     292
     293BSP_output_char_function_type           BSP_output_char = outbyte;
     294BSP_polling_getchar_function_type       BSP_poll_char = BSP_wait_polled_input;
     295
     296void BSP_emergency_output_init() {}

  • c/src/lib/libbsp/i386/i386ex/include/bsp.h

    r0e3c0096 rbd8c8b2a  
    2424#include <console.h>
    2525#include <clockdrv.h>
    26 
     26#include <bspIo.h>
     27#include <irq.h>
     28 
    2729/*
    2830 *  Define the time limits for RTEMS Test Suite test durations.
    … …  
    130132/* routines */
    131133
    132 i386_isr_entry set_vector(
    133   rtems_isr_entry     handler,
    134   rtems_vector_number vector,
    135   int                 type
    136 );
    137 
    138134#ifdef __cplusplus
    139135}

  • c/src/lib/libbsp/i386/i386ex/start/start.s

    r0e3c0096 rbd8c8b2a  
    3434#include "80386ex.inc"
    3535
     36/*
     37 * Needed for binutils 2.9.1.0.7 and higher
     38 * #define NEXT_GAS
     39 */                     
    3640
    3741        EXTERN (main)              /* exits to bspstart   */
    … …  
    180184        nop
    181185        cli
     186#ifdef NEXT_GAS
     187        addr32
     188#endif 
    182189        jmp     SYM(_initInternalRegisters) /* different section in this file */
    183190        .code32                             /* in case this section moves     */
    … …  
    193200 * Enable access to peripheral register at expanded I/O addresses
    194201 */
     202SYM(_initInternalRegisters):   
    195203        .code16
    196 SYM(_initInternalRegisters):   
    197204        movw    $0x8000 , ax           
    198205        outb    al      , $REMAPCFGH
    … …  
    407414        SetExRegByte(ICW1M  , 0x11 ) # edge triggered
    408415        SetExRegByte(ICW2M  , 0x20 )  # base vector starts at byte 32
    409         SetExRegByte(ICW3M  , 0x04 ) # IR2 is cascaded internally
    410         SetExRegByte(ICW4M  , 0X03 ) # AEOI MODE FIRST!
     416        SetExRegByte(ICW3M  , 0x02 ) # IR2 is cascaded internally
     417        SetExRegByte(ICW4M  , 0x01 ) # idem
    411418       
    412419        SetExRegByte(OCW1M  , 0xde ) # IR0  only = 0xfe.  for IR5 and IR0 active use 0xde
    … …  
    482489        movw $ _ram_gdt_segment, ax
    483490        mov    ax              , ds
    484 
     491#ifdef NEXT_GAS
     492        data32
     493        addr32
     494#endif 
    485495        lgdt    _ram_gdt_offset     #  location of GDT
    486496
    … …  
    495505 * Switch to Protected Mode
    496506 ***************************/
    497         mov     %cr0, eax
     507        mov     cr0, eax
    498508        orw     $0x1, ax
    499         mov     eax, %cr0
     509        mov     eax, cr0
    500510       
    501511/**************************
    … …  
    504514 *********************/
    505515
    506         ljmp $ GDT_CODE_PTR , $  SYM(_copy_data) # sets the code selector
     516        ljmpl $ GDT_CODE_PTR , $  SYM(_copy_data) # sets the code selector
    507517/*
    508518 * Copy the data section down to RAM

  • c/src/lib/libbsp/i386/i386ex/startup/Makefile.in

    r0e3c0096 rbd8c8b2a  
    1111PGM=${ARCH}/startup.rel
    1212
     13IMPORT_SRC=$(srcdir)/../../shared/irq/irq.c \
     14   $(srcdir)/../../shared/irq/irq_init.c $(srcdir)/../../shared/irq/irq_asm.s
     15
    1316# C source names, if any, go here -- minus the .c
    14 C_PIECES=bspclean bsplibc bsppost bspstart main sbrk setvec
     17C_PIECES=bspclean bsplibc bsppost bspstart main sbrk irq irq_init
    1518C_FILES=$(C_PIECES:%=%.c)
    1619C_O_FILES=$(C_PIECES:%=${ARCH}/%.o)
    … …  
    2023# Assembly source names, if any, go here -- minus the .s
    2124# removed initcsu piece, ldsegs piece and flush
    22 S_PIECES= 
     25S_PIECES=irq_asm
    2326S_FILES=$(S_PIECES:%=%.s)
    2427S_O_FILES=$(S_FILES:%.s=${ARCH}/%.o)
    … …  
    5356CLOBBER_ADDITIONS +=
    5457
     58preinstall:
     59        ${CP} ${IMPORT_SRC} .
     60
    5561${PGM}: ${SRCS} ${OBJS}
    5662        $(make-rel)
    57 all:    ${ARCH} $(SRCS) $(PGM)
     63all:    ${ARCH} preinstall $(SRCS) $(PGM)
    5864        $(INSTALL) $(srcdir)/linkcmds ${PROJECT_RELEASE}/lib
    5965

  • c/src/lib/libbsp/i386/i386ex/startup/bspstart.c

    r0e3c0096 rbd8c8b2a  
    115115
    116116  /*   console_reserve_resources( &BSP_Configuration ); */
    117 
     117  /*
     118   * Init rtems_interrupt_management
     119   */
     120  rtems_irq_mngt_init();
    118121}

  • c/src/lib/libbsp/i386/i386ex/timer/timer.c

    r0e3c0096 rbd8c8b2a  
    2828#include <rtems.h>
    2929#include <bsp.h>
     30#include <stdlib.h>
    3031
    3132int Ttimer_val;
    3233rtems_boolean Timer_driver_Find_average_overhead;
    3334
    34 rtems_isr timerisr();
     35extern void timerisr();
     36extern int ClockIsOn(const rtems_raw_irq_connect_data*);
    3537
    3638#define TMR0      0xF040
    … …  
    4042#define TMRCFG    0xF834
    4143
    42 void Timer_initialize()
     44void TimerOn(const rtems_raw_irq_connect_data* used)
    4345{
    44 
    45   (void) set_vector( timerisr, 0x2a, 0 );   /* install ISR ( IR2 ) was 0x38*/
    4646
    4747  Ttimer_val = 0;                           /* clear timer ISR count */
    … …  
    5252  outport_byte  ( TMRCON , 0x64 ); /* change to mode 2 ( starts timer ) */
    5353                                   /* interrupts ARE enabled */
    54 /*  outport_byte( IERA, 0x41 );             enable interrupt */
     54  /*  outport_byte( IERA, 0x41 );             enable interrupt */
     55  /*
     56   * enable interrrupt at i8259 level
     57   */
     58  pc386_irq_enable_at_i8259s(used->idtIndex - PC386_IRQ_VECTOR_BASE);
     59}
    5560
     61void TimerOff(const rtems_raw_irq_connect_data* used)
     62{
     63    /*
     64     * disable interrrupt at i8259 level
     65     */
     66     pc386_irq_disable_at_i8259s(used->idtIndex - PC386_IRQ_VECTOR_BASE);
     67     /* reset timer mode to standard (DOS) value */
     68}
     69
     70static rtems_raw_irq_connect_data timer_raw_irq_data = {
     71  PC_386_RT_TIMER3 + PC386_IRQ_VECTOR_BASE,
     72  timerisr,
     73  TimerOn,
     74  TimerOff,
     75  ClockIsOn
     76};
     77
     78void Timer_exit()
     79{
     80 if (!i386_delete_idt_entry(&timer_raw_irq_data)) {
     81      printk("Timer raw handler deconnexion failed\n");
     82      rtems_fatal_error_occurred(1);
     83 }
     84}
     85
     86void Timer_initialize()
     87{
     88
     89  static rtems_boolean First = TRUE;
     90
     91  if (First)
     92  {
     93    First = FALSE;
     94
     95    atexit(Timer_exit); /* Try not to hose the system at exit. */
     96    if (!i386_set_idt_entry (&timer_raw_irq_data)) {
     97      printk("raw handler connexion failed\n");
     98      rtems_fatal_error_occurred(1);
     99    }
     100  }
     101  /* wait for ISR to be called at least once */
     102  Ttimer_val = 0;
     103  while (Ttimer_val == 0)
     104    continue;
     105  Ttimer_val = 0;
    56106}
    57107

  • c/src/lib/libbsp/i386/i386ex/timer/timerisr.s

    r0e3c0096 rbd8c8b2a  
    2929SYM (timerisr):
    3030        addl    $250, SYM (Ttimer_val)   # another 250 microseconds
     31        pushl   eax
     32        movb    0xa0,al         /* signal generic End Of Interrupt (EOI) to slave PIC */
     33        outb    al, $0x20
     34        movb    $0x20, al
     35        outb    al, $0x20       /* signal generic EOI to Master PIC */
     36        popl    eax
    3137        iret
    3238

  • c/src/lib/libbsp/i386/pc386/console/Makefile.in

    r0e3c0096 rbd8c8b2a  
    1010
    1111PGM=${ARCH}/console.rel
     12
     13IMPORT_SRC=$(srcdir)/../../shared/io/printk.c
    1214
    1315# C source names, if any, go here -- minus the .c
    … …  
    5153CLOBBER_ADDITIONS +=
    5254
     55preinstall:
     56        ${CP} ${IMPORT_SRC} .
     57
    5358${PGM}: ${SRCS} ${OBJS}
    5459        $(make-rel)
    5560
    56 all:    ${ARCH} $(SRCS) $(PGM)
     61all:    ${ARCH} preinstall $(SRCS) $(PGM)
    5762
    5863# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile

  • c/src/lib/libbsp/i386/pc386/console/console.c

    r0e3c0096 rbd8c8b2a  
    6262
    6363extern rtems_boolean _IBMPC_scankey(char *);  /* defined in 'inch.c' */
     64extern BSP_polling_getchar_function_type BSP_wait_polled_input();
     65extern void _IBMPC_initVideo();
    6466
    6567void console_reserve_resources(rtems_configuration_table *conf)
    … …  
    476478}
    477479
    478 
    479 
    480 
    481 
    482 
    483 
    484 
    485 
     480/*
     481 * BSP initialization
     482 */
     483
     484BSP_output_char_function_type BSP_output_char = (BSP_output_char_function_type) _IBMPC_outch;
     485BSP_polling_getchar_function_type       BSP_poll_char = BSP_wait_polled_input;
     486void BSP_emergency_output_init()
     487{
     488  _IBMPC_initVideo();
     489}
     490
     491
     492
     493
     494
     495
     496
     497

  • c/src/lib/libbsp/i386/pc386/console/inch.c

    r0e3c0096 rbd8c8b2a  
    296296 
    297297char
    298 debugPollingGetChar(void)
     298BSP_wait_polled_input(void)
    299299{
    300300  char c;

  • c/src/lib/libbsp/i386/pc386/include/bsp.h

    r0e3c0096 rbd8c8b2a  
    5353#include <clockdrv.h>
    5454#include <libcpu/cpu.h>
     55#include <bspIo.h>
    5556 
    5657/*-------------------------------------------------------------------------+

  • c/src/lib/libbsp/i386/pc386/startup/Makefile.in

    r0e3c0096 rbd8c8b2a  
    5959${PGM}: ${SRCS} ${OBJS}
    6060        $(make-rel)
    61 all:    ${ARCH} $(SRCS) $(PGM)
     61all:    ${ARCH} preinstall $(SRCS) $(PGM)
    6262        $(INSTALL) $(srcdir)/linkcmds ${PROJECT_RELEASE}/lib
    6363

  • c/src/lib/libbsp/i386/pc386/timer/timer.c

    r0e3c0096 rbd8c8b2a  
    177177     outport_byte(TIMER_CNTR0, US_TO_TICK(US_PER_ISR) >> 8 & 0xff);
    178178    /*
    179      * disable interrrupt at i8259 level
     179     * enable interrrupt at i8259 level
    180180     */
    181181     pc386_irq_enable_at_i8259s(used->idtIndex - PC386_IRQ_VECTOR_BASE);

  • c/src/lib/libbsp/i386/shared/Makefile.in

    r0e3c0096 rbd8c8b2a  
    1313
    1414# Descend into the $(RTEMS_BSP_FAMILY) directory
    15 SUB_DIRS=irq
     15SUB_DIRS=irq io
    1616

  • c/src/lib/libbsp/i386/shared/irq/irq.h

    r0e3c0096 rbd8c8b2a  
    5656  PC386_UART_COM1_IRQ           =       4,
    5757
    58   PC_386_RT_TIMER1              =       8
    59 
     58  PC_386_RT_TIMER1              =       8,
     59 
     60  PC_386_RT_TIMER3              =       10
    6061}rtems_irq_symbolic_name;
    6162

  • c/src/lib/libbsp/i386/shared/irq/irq_init.c

    r0e3c0096 rbd8c8b2a  
    1616#include <irq.h>
    1717#include <bsp.h>
     18#include <bspIo.h>
    1819
    1920/*
    … …  
    138139       * put something here that will show the failure...
    139140       */
    140       _IBMPC_initVideo();
     141      BSP_emergency_output_init();
    141142      printk("Unable to initialize IDT!!! System locked\n");
    142143      while (1);
    … …  
    173174       * put something here that will show the failure...
    174175       */
    175       _IBMPC_initVideo();
     176      BSP_emergency_output_init();
    176177      printk("Unable to initialize RTEMS interrupt Management!!! System locked\n");
    177178      while (1);
    … …  
    188189      unsigned tmp;
    189190
    190       _IBMPC_initVideo();
     191      BSP_emergency_output_init();
    191192     
    192193      printk("idt_entry_tbl =  %x Interrupt_descriptor_table addr = %x\n",
    … …  
    197198    }
    198199    printk("i8259s_cache = %x\n", * (unsigned short*) &i8259s_cache);
    199     debugPollingGetChar();
     200    BSP_wait_polled_input();
    200201#endif   
    201202    asm volatile ("sti");

  • c/src/lib/libcpu/i386/Makefile.in

    r0e3c0096 rbd8c8b2a  
    99PROJECT_ROOT = @PROJECT_ROOT@
    1010
    11 PGM=${ARCH}/libcpu.rel
    1211
    1312# C source names, if any, go here -- minus the .c
    … …  
    2726
    2827include $(RTEMS_ROOT)/make/custom/$(RTEMS_BSP).cfg
    29 include $(RTEMS_ROOT)/make/leaf.cfg
     28include $(RTEMS_ROOT)/make/lib.cfg
     29
     30LIB=${ARCH}/libcpuspec.a
    3031
    3132#
    … …  
    5152CLOBBER_ADDITIONS +=
    5253
    53 ${PGM}: ${SRCS} ${OBJS}
    54         $(make-rel)
     54${LIB}: ${SRCS} ${OBJS}
     55        $(make-library)
    5556
    5657preinstall :
    … …  
    5859        $(INSTALL) -m 444 ${H_FILES} $(PROJECT_INCLUDE)/libcpu
    5960
    60 all:    ${ARCH} $(SRCS) preinstall $(OBJ) $(PGM)
     61all:    ${ARCH} $(SRCS) preinstall $(OBJ) $(LIB)
    6162        cd wrapup; $(MAKE)
    6263

  • c/src/lib/libcpu/i386/cpuModel.h

    r0e3c0096 rbd8c8b2a  
    3030extern unsigned char Cx86_step; /* cyrix processor identification */
    3131
    32 extern voidget_cpuinfo(); /* Display this information in ascii form */
     32extern void printCpuInfo(); /* Display this information on console in ascii form */

  • c/src/lib/libcpu/i386/displayCpu.c

    r0e3c0096 rbd8c8b2a  
    174174void printCpuInfo()
    175175{
    176   int i, len = 0;
     176  int i;
    177177  static const char *x86_cap_flags[] = {
    178178    "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",

  • c/src/lib/libcpu/i386/wrapup/Makefile.in

    r0e3c0096 rbd8c8b2a  
    1313
    1414# bummer; have to use $foreach since % pattern subst rules only replace 1x
    15 OBJS=../$(ARCH)/libcpu.rel
     15OBJS=../$(ARCH)/libcpuspec.a
    1616LIB=$(ARCH)/libcpu.a
    1717
    … …  
    4242
    4343$(LIB): ${OBJS}
    44         $(make-library)
     44        @ list_of_o_files=""; \
     45        for i in ${OBJS}; \
     46        do \
     47                DIRNAME=`dirname ${OBJS}` ; \
     48                temp=`$(AR) t $$i`; \
     49                echo $$temp ;\
     50                echo $$DIRNAME ;\
     51                for j in $$temp; \
     52                do \
     53                        list_of_o_files="$$list_of_o_files $$DIRNAME/$$j"; \
     54                done ;\
     55                echo $$list_of_o_files ;\
     56        done ;\
     57        $(RM) $@ ;\
     58        $(AR) $(ARFLAGS) $@ $$list_of_o_files ;\
     59        $(MKLIB) $@
    4560
    4661all:    ${ARCH} $(SRCS) $(LIB)
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