Changeset bd8c8b2a in rtems
- Timestamp:
- Aug 5, 1998, 4:51:39 PM (22 years ago)
- Branches:
- 4.10, 4.11, 4.8, 4.9, 5, master
- Children:
- dddc0557
- Parents:
- 0e3c0096
- Location:
- c/src
- Files:
-
- 3 added
- 24 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/exec/score/cpu/i386/cpu_asm.s
r0e3c0096 rbd8c8b2a 110 110 ret 111 111 112 /*PAGE113 * void _ISR_Handler()114 *115 * This routine provides the RTEMS interrupt management.116 *117 * NOTE:118 * Upon entry, the stack will contain a stack frame back to the119 * interrupted task. If dispatching is enabled, this is the120 * outer most interrupt, and (a context switch is necessary or121 * the current task has signals), then set up the stack to122 * transfer control to the interrupt dispatcher.123 */124 125 .set SET_SEGMENT_REGISTERS_IN_INTERRUPT, 0126 127 .set SAVED_REGS , 32 # space consumed by saved regs128 .set EIP_OFFSET , SAVED_REGS # offset of tasks eip129 .set CS_OFFSET , EIP_OFFSET+4 # offset of tasks code segment130 .set EFLAGS_OFFSET , CS_OFFSET+4 # offset of tasks eflags131 132 .p2align 1133 PUBLIC (_ISR_Handler)134 135 SYM (_ISR_Handler):136 /*137 * Before this was point is reached the vectors unique138 * entry point did the following:139 *140 * 1. saved all registers with a "pusha"141 * 2. put the vector number in eax.142 *143 * BEGINNING OF ESTABLISH SEGMENTS144 *145 * WARNING: If an interrupt can occur when the segments are146 * not correct, then this is where we should establish147 * the segments. In addition to establishing the148 * segments, it may be necessary to establish a stack149 * in the current data area on the outermost interrupt.150 *151 * NOTE: If the previous values of the segment registers are152 * pushed, do not forget to adjust SAVED_REGS.153 *154 * NOTE: Make sure the exit code which restores these155 * when this type of code is needed.156 */157 158 /***** ESTABLISH SEGMENTS CODE GOES HERE ******/159 160 /*161 * END OF ESTABLISH SEGMENTS162 */163 164 /*165 * Now switch stacks if necessary166 */167 168 movl esp, edx # edx = previous stack pointer169 cmpl $0, SYM (_ISR_Nest_level) # is this the outermost interrupt?170 jne nested # No, then continue171 movl SYM (_CPU_Interrupt_stack_high), esp172 173 /*174 * We want to insure that the old stack pointer is on the175 * stack we will be on at the end of the ISR when we restore it.176 * By saving it on every interrupt, all we have to do is pop it177 * near the end of every interrupt.178 */179 180 nested:181 pushl edx # save the previous stack pointer182 incl SYM (_ISR_Nest_level) # one nest level deeper183 incl SYM (_Thread_Dispatch_disable_level) # disable multitasking184 185 # EAX is preloaded with the vector number.186 push eax # push vector number187 mov SYM (_ISR_Vector_table) (,eax,4),eax188 # eax = Users handler189 call eax # invoke user ISR190 pop eax # eax = vector number191 192 decl SYM (_ISR_Nest_level) # one less ISR nest level193 # If interrupts are nested,194 # then dispatching is disabled195 196 decl SYM (_Thread_Dispatch_disable_level)197 # unnest multitasking198 # Is dispatch disabled199 jne exit # Yes, then exit200 201 cmpl $0, SYM (_Context_Switch_necessary)202 # Is task switch necessary?203 jne bframe # Yes, then build stack204 205 cmpl $0, SYM (_ISR_Signals_to_thread_executing)206 # signals sent to Run_thread207 # while in interrupt handler?208 je exit # No, exit209 210 bframe:211 cli # DISABLE INTERRUPTS!!212 popl esp # restore the stack pointer213 movl $0, SYM (_ISR_Signals_to_thread_executing)214 # push the isf for Isr_dispatch215 push EFLAGS_OFFSET(esp) # push tasks eflags216 push cs # cs of Isr_dispatch217 push $ SYM (_ISR_Dispatch) # entry point218 iret219 220 exit:221 cli # DISABLE INTERRUPTS!!222 popl esp # restore the stack pointer223 224 /*225 * BEGINNING OF DE-ESTABLISH SEGMENTS226 *227 * NOTE: Make sure there is code here if code is added to228 * load the segment registers.229 *230 */231 232 /******* DE-ESTABLISH SEGMENTS CODE GOES HERE ********/233 234 /*235 * END OF DE-ESTABLISH SEGMENTS236 */237 238 popa # restore general registers239 iret240 241 /*PAGE242 * Distinct Interrupt Entry Points243 *244 * The following macro and the 256 instantiations of the macro245 * are necessary to determine which interrupt vector occurred.246 * The following macro allows a unique entry point to be defined247 * for each vector.248 *249 * NOTE: There are not spaces around the vector number argument250 * to the DISTINCT_INTERRUPT_ENTRY macro because m4 will251 * undesirably generate the symbol "_Isr_handler_ N"252 * instead of "_Isr_handler_N" like we want.253 */254 255 #define DISTINCT_INTERRUPT_ENTRY(_vector) \256 .p2align 4 ; \257 PUBLIC (_ISR_Handler_ ## _vector ) ; \258 SYM (_ISR_Handler_ ## _vector ): \259 pusha ; \260 xor eax, eax ; \261 movb $ ## _vector, al ; \262 jmp SYM (_ISR_Handler) ;263 264 DISTINCT_INTERRUPT_ENTRY(0)265 DISTINCT_INTERRUPT_ENTRY(1)266 DISTINCT_INTERRUPT_ENTRY(2)267 DISTINCT_INTERRUPT_ENTRY(3)268 DISTINCT_INTERRUPT_ENTRY(4)269 DISTINCT_INTERRUPT_ENTRY(5)270 DISTINCT_INTERRUPT_ENTRY(6)271 DISTINCT_INTERRUPT_ENTRY(7)272 DISTINCT_INTERRUPT_ENTRY(8)273 DISTINCT_INTERRUPT_ENTRY(9)274 DISTINCT_INTERRUPT_ENTRY(10)275 DISTINCT_INTERRUPT_ENTRY(11)276 DISTINCT_INTERRUPT_ENTRY(12)277 DISTINCT_INTERRUPT_ENTRY(13)278 DISTINCT_INTERRUPT_ENTRY(14)279 DISTINCT_INTERRUPT_ENTRY(15)280 DISTINCT_INTERRUPT_ENTRY(16)281 DISTINCT_INTERRUPT_ENTRY(17)282 DISTINCT_INTERRUPT_ENTRY(18)283 DISTINCT_INTERRUPT_ENTRY(19)284 DISTINCT_INTERRUPT_ENTRY(20)285 DISTINCT_INTERRUPT_ENTRY(21)286 DISTINCT_INTERRUPT_ENTRY(22)287 DISTINCT_INTERRUPT_ENTRY(23)288 DISTINCT_INTERRUPT_ENTRY(24)289 DISTINCT_INTERRUPT_ENTRY(25)290 DISTINCT_INTERRUPT_ENTRY(26)291 DISTINCT_INTERRUPT_ENTRY(27)292 DISTINCT_INTERRUPT_ENTRY(28)293 DISTINCT_INTERRUPT_ENTRY(29)294 DISTINCT_INTERRUPT_ENTRY(30)295 DISTINCT_INTERRUPT_ENTRY(31)296 DISTINCT_INTERRUPT_ENTRY(32)297 DISTINCT_INTERRUPT_ENTRY(33)298 DISTINCT_INTERRUPT_ENTRY(34)299 DISTINCT_INTERRUPT_ENTRY(35)300 DISTINCT_INTERRUPT_ENTRY(36)301 DISTINCT_INTERRUPT_ENTRY(37)302 DISTINCT_INTERRUPT_ENTRY(38)303 DISTINCT_INTERRUPT_ENTRY(39)304 DISTINCT_INTERRUPT_ENTRY(40)305 DISTINCT_INTERRUPT_ENTRY(41)306 DISTINCT_INTERRUPT_ENTRY(42)307 DISTINCT_INTERRUPT_ENTRY(43)308 DISTINCT_INTERRUPT_ENTRY(44)309 DISTINCT_INTERRUPT_ENTRY(45)310 DISTINCT_INTERRUPT_ENTRY(46)311 DISTINCT_INTERRUPT_ENTRY(47)312 DISTINCT_INTERRUPT_ENTRY(48)313 DISTINCT_INTERRUPT_ENTRY(49)314 DISTINCT_INTERRUPT_ENTRY(50)315 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DISTINCT_INTERRUPT_ENTRY(232)497 DISTINCT_INTERRUPT_ENTRY(233)498 DISTINCT_INTERRUPT_ENTRY(234)499 DISTINCT_INTERRUPT_ENTRY(235)500 DISTINCT_INTERRUPT_ENTRY(236)501 DISTINCT_INTERRUPT_ENTRY(237)502 DISTINCT_INTERRUPT_ENTRY(238)503 DISTINCT_INTERRUPT_ENTRY(239)504 DISTINCT_INTERRUPT_ENTRY(240)505 DISTINCT_INTERRUPT_ENTRY(241)506 DISTINCT_INTERRUPT_ENTRY(242)507 DISTINCT_INTERRUPT_ENTRY(243)508 DISTINCT_INTERRUPT_ENTRY(244)509 DISTINCT_INTERRUPT_ENTRY(245)510 DISTINCT_INTERRUPT_ENTRY(246)511 DISTINCT_INTERRUPT_ENTRY(247)512 DISTINCT_INTERRUPT_ENTRY(248)513 DISTINCT_INTERRUPT_ENTRY(249)514 DISTINCT_INTERRUPT_ENTRY(250)515 DISTINCT_INTERRUPT_ENTRY(251)516 DISTINCT_INTERRUPT_ENTRY(252)517 DISTINCT_INTERRUPT_ENTRY(253)518 DISTINCT_INTERRUPT_ENTRY(254)519 DISTINCT_INTERRUPT_ENTRY(255)520 521 /*PAGE522 * void _ISR_Dispatch()523 *524 * Entry point from the outermost interrupt service routine exit.525 * The current stack is the supervisor mode stack.526 */527 528 PUBLIC (_ISR_Dispatch)529 SYM (_ISR_Dispatch):530 531 call SYM (_Thread_Dispatch) # invoke Dispatcher532 533 /*534 * BEGINNING OF DE-ESTABLISH SEGMENTS535 *536 * NOTE: Make sure there is code here if code is added to537 * load the segment registers.538 *539 */540 541 /***** DE-ESTABLISH SEGMENTS CODE GOES HERE ****/542 543 /*544 * END OF DE-ESTABLISH SEGMENTS545 */546 547 popa # restore general registers548 iret # return to interrupted thread549 550 112 /* 551 113 * GO32 does not require these segment related routines. -
c/src/exec/score/cpu/i386/i386.h
r0e3c0096 rbd8c8b2a 130 130 } 131 131 132 /*133 * IO Port Access Routines134 */135 136 #define i386_outport_byte( _port, _value ) \137 { register unsigned short __port = _port; \138 register unsigned char __value = _value; \139 \140 asm volatile ( "outb %0,%1" : "=a" (__value), "=d" (__port) \141 : "0" (__value), "1" (__port) \142 ); \143 }144 145 #define i386_outport_word( _port, _value ) \146 { register unsigned short __port = _port; \147 register unsigned short __value = _value; \148 \149 asm volatile ( "outw %0,%1" : "=a" (__value), "=d" (__port) \150 : "0" (__value), "1" (__port) \151 ); \152 }153 154 #define i386_outport_long( _port, _value ) \155 { register unsigned short __port = _port; \156 register unsigned int __value = _value; \157 \158 asm volatile ( "outl %0,%1" : "=a" (__value), "=d" (__port) \159 : "0" (__value), "1" (__port) \160 ); \161 }162 163 #define i386_inport_byte( _port, _value ) \164 { register unsigned short __port = _port; \165 register unsigned char __value = 0; \166 \167 asm volatile ( "inb %1,%0" : "=a" (__value), "=d" (__port) \168 : "0" (__value), "1" (__port) \169 ); \170 _value = __value; \171 }172 173 #define i386_inport_word( _port, _value ) \174 { register unsigned short __port = _port; \175 register unsigned short __value = 0; \176 \177 asm volatile ( "inw %1,%0" : "=a" (__value), "=d" (__port) \178 : "0" (__value), "1" (__port) \179 ); \180 _value = __value; \181 }182 183 #define i386_inport_long( _port, _value ) \184 { register unsigned short __port = _port; \185 register unsigned int __value = 0; \186 \187 asm volatile ( "inl %1,%0" : "=a" (__value), "=d" (__port) \188 : "0" (__value), "1" (__port) \189 ); \190 _value = __value; \191 }192 193 132 194 133 /* routines */ -
c/src/lib/libbsp/i386/i386ex/clock/ckinit.c
r0e3c0096 rbd8c8b2a 22 22 23 23 #include <bsp.h> 24 #include <irq.h> 24 25 25 26 #include <rtems/libio.h> … … 27 28 #include <stdlib.h> 28 29 29 #define CLOCK_VECTOR 0x2030 31 30 rtems_unsigned32 Clock_isrs; /* ISRs until next tick */ 32 31 33 32 volatile rtems_unsigned32 Clock_driver_ticks; 34 35 rtems_isr_entry Old_ticker;36 33 37 34 void Clock_exit( void ); … … 48 45 */ 49 46 50 rtems_isr Clock_isr( 51 rtems_vector_number vector 52 ) 47 void Clock_isr() 53 48 { 54 49 /* enable_tracing(); */ … … 62 57 } 63 58 64 void Install_clock( 65 rtems_isr_entry clock_isr 66 ) 59 void ClockOff(const rtems_irq_connect_data* unused) 67 60 { 68 Clock_driver_ticks = 0;69 Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000; 61 /* should do something here */; 62 } 70 63 71 if ( BSP_Configuration.ticks_per_timeslice ) { 72 Old_ticker = ( rtems_isr_entry ) set_vector( clock_isr, CLOCK_VECTOR, 1 ); 73 64 void ClockOn(const rtems_irq_connect_data* unused) 65 { 74 66 /* The following is already set up in interns.s -> 75 67 ( This is test code only... production code will move the … … 82 74 #define TMRCFG 0xF834 83 75 84 76 outport_byte ( TMRCFG , 0x80 ); 85 77 86 87 88 78 outport_byte ( TMRCON , 0x34 ); 79 outport_byte ( TMR0 , 0xA8 ); 80 outport_byte ( TMR0 , 0x04 ); 89 81 90 outport_byte ( TMRCFG , 0x00 ); 91 } 92 atexit( Clock_exit ); 82 outport_byte ( TMRCFG , 0x00 ); 93 83 } 94 84 95 void Clock_exit( void)85 int ClockIsOn(const rtems_irq_connect_data* unused) 96 86 { 97 if ( BSP_Configuration.ticks_per_timeslice ) { 98 /* should do something here */; 99 } 87 return ((i8259s_cache & 0x1) == 0); 100 88 } 101 89 90 static rtems_irq_connect_data clockIrqData = {PC_386_PERIODIC_TIMER, 91 Clock_isr, 92 ClockOn, 93 ClockOff, 94 ClockIsOn}; 102 95 103 96 rtems_device_driver Clock_initialize( … … 107 100 ) 108 101 { 109 Install_clock( Clock_isr ); 110 102 Clock_driver_ticks = 0; 103 Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000; 104 if (!pc386_install_rtems_irq_handler (&clockIrqData)) { 105 printk("Unable to initialize system clock\n"); 106 rtems_fatal_error_occurred(1); 107 } 111 108 /* 112 109 * make major/minor avail to others such as shared memory driver … … 125 122 ) 126 123 { 127 rtems_unsigned32 isrlevel;128 124 rtems_libio_ioctl_args_t *args = pargp; 129 125 … … 138 134 if (args->command == rtems_build_name('I', 'S', 'R', ' ')) 139 135 { 140 Clock_isr( CLOCK_VECTOR);136 Clock_isr(); 141 137 } 142 138 else if (args->command == rtems_build_name('N', 'E', 'W', ' ')) 143 139 { 144 rtems_interrupt_disable( isrlevel ); 145 (void) set_vector( args->buffer, CLOCK_VECTOR, 1 ); 146 rtems_interrupt_enable( isrlevel ); 140 if (!pc386_install_rtems_irq_handler (&clockIrqData)) { 141 printk("Error installing clock interrupt handler!\n"); 142 rtems_fatal_error_occurred(1); 143 } 147 144 } 148 145 … … 151 148 } 152 149 150 void Clock_exit() 151 { 152 pc386_remove_rtems_irq_handler (&clockIrqData); 153 } -
c/src/lib/libbsp/i386/i386ex/console/Makefile.in
r0e3c0096 rbd8c8b2a 11 11 PGM=${ARCH}/console.rel 12 12 13 IMPORT_SRC=$(srcdir)/../../shared/io/printk.c 14 13 15 # C source names, if any, go here -- minus the .c 14 C_PIECES=console 16 C_PIECES=console printk 15 17 C_FILES=$(C_PIECES:%=%.c) 16 18 C_O_FILES=$(C_PIECES:%=${ARCH}/%.o) … … 50 52 CLOBBER_ADDITIONS += 51 53 54 preinstall: 55 ${CP} ${IMPORT_SRC} . 56 52 57 ${PGM}: ${SRCS} ${OBJS} 53 58 $(make-rel) 54 59 55 all: ${ARCH} $(SRCS) $(PGM)60 all: ${ARCH} preinstall $(SRCS) $(PGM) 56 61 57 62 # the .rel file built here will be put into libbsp.a by ../wrapup/Makefile -
c/src/lib/libbsp/i386/i386ex/console/console.c
r0e3c0096 rbd8c8b2a 17 17 #include <bsp.h> 18 18 #include <rtems/libio.h> 19 19 #include <bspIo.h> 20 20 #include <stdlib.h> 21 21 … … 110 110 } 111 111 112 /* 113 * Wait for an input. May be used before intr are ON. 114 */ 115 char BSP_wait_polled_input( void ) 116 { 117 char c; 118 while (!is_character_ready(&c)) 119 continue; 120 121 return c; 122 } 123 112 124 /* inbyte 113 125 * … … 278 290 return RTEMS_SUCCESSFUL; 279 291 } 292 293 BSP_output_char_function_type BSP_output_char = outbyte; 294 BSP_polling_getchar_function_type BSP_poll_char = BSP_wait_polled_input; 295 296 void BSP_emergency_output_init() {} -
c/src/lib/libbsp/i386/i386ex/include/bsp.h
r0e3c0096 rbd8c8b2a 24 24 #include <console.h> 25 25 #include <clockdrv.h> 26 26 #include <bspIo.h> 27 #include <irq.h> 28 27 29 /* 28 30 * Define the time limits for RTEMS Test Suite test durations. … … 130 132 /* routines */ 131 133 132 i386_isr_entry set_vector(133 rtems_isr_entry handler,134 rtems_vector_number vector,135 int type136 );137 138 134 #ifdef __cplusplus 139 135 } -
c/src/lib/libbsp/i386/i386ex/start/start.s
r0e3c0096 rbd8c8b2a 34 34 #include "80386ex.inc" 35 35 36 /* 37 * Needed for binutils 2.9.1.0.7 and higher 38 * #define NEXT_GAS 39 */ 36 40 37 41 EXTERN (main) /* exits to bspstart */ … … 180 184 nop 181 185 cli 186 #ifdef NEXT_GAS 187 addr32 188 #endif 182 189 jmp SYM(_initInternalRegisters) /* different section in this file */ 183 190 .code32 /* in case this section moves */ … … 193 200 * Enable access to peripheral register at expanded I/O addresses 194 201 */ 202 SYM(_initInternalRegisters): 195 203 .code16 196 SYM(_initInternalRegisters):197 204 movw $0x8000 , ax 198 205 outb al , $REMAPCFGH … … 407 414 SetExRegByte(ICW1M , 0x11 ) # edge triggered 408 415 SetExRegByte(ICW2M , 0x20 ) # base vector starts at byte 32 409 SetExRegByte(ICW3M , 0x0 4) # IR2 is cascaded internally410 SetExRegByte(ICW4M , 0 X03 ) # AEOI MODE FIRST!416 SetExRegByte(ICW3M , 0x02 ) # IR2 is cascaded internally 417 SetExRegByte(ICW4M , 0x01 ) # idem 411 418 412 419 SetExRegByte(OCW1M , 0xde ) # IR0 only = 0xfe. for IR5 and IR0 active use 0xde … … 482 489 movw $ _ram_gdt_segment, ax 483 490 mov ax , ds 484 491 #ifdef NEXT_GAS 492 data32 493 addr32 494 #endif 485 495 lgdt _ram_gdt_offset # location of GDT 486 496 … … 495 505 * Switch to Protected Mode 496 506 ***************************/ 497 mov %cr0, eax507 mov cr0, eax 498 508 orw $0x1, ax 499 mov eax, %cr0509 mov eax, cr0 500 510 501 511 /************************** … … 504 514 *********************/ 505 515 506 ljmp $ GDT_CODE_PTR , $ SYM(_copy_data) # sets the code selector516 ljmpl $ GDT_CODE_PTR , $ SYM(_copy_data) # sets the code selector 507 517 /* 508 518 * Copy the data section down to RAM -
c/src/lib/libbsp/i386/i386ex/startup/Makefile.in
r0e3c0096 rbd8c8b2a 11 11 PGM=${ARCH}/startup.rel 12 12 13 IMPORT_SRC=$(srcdir)/../../shared/irq/irq.c \ 14 $(srcdir)/../../shared/irq/irq_init.c $(srcdir)/../../shared/irq/irq_asm.s 15 13 16 # C source names, if any, go here -- minus the .c 14 C_PIECES=bspclean bsplibc bsppost bspstart main sbrk setvec17 C_PIECES=bspclean bsplibc bsppost bspstart main sbrk irq irq_init 15 18 C_FILES=$(C_PIECES:%=%.c) 16 19 C_O_FILES=$(C_PIECES:%=${ARCH}/%.o) … … 20 23 # Assembly source names, if any, go here -- minus the .s 21 24 # removed initcsu piece, ldsegs piece and flush 22 S_PIECES= 25 S_PIECES=irq_asm 23 26 S_FILES=$(S_PIECES:%=%.s) 24 27 S_O_FILES=$(S_FILES:%.s=${ARCH}/%.o) … … 53 56 CLOBBER_ADDITIONS += 54 57 58 preinstall: 59 ${CP} ${IMPORT_SRC} . 60 55 61 ${PGM}: ${SRCS} ${OBJS} 56 62 $(make-rel) 57 all: ${ARCH} $(SRCS) $(PGM)63 all: ${ARCH} preinstall $(SRCS) $(PGM) 58 64 $(INSTALL) $(srcdir)/linkcmds ${PROJECT_RELEASE}/lib 59 65 -
c/src/lib/libbsp/i386/i386ex/startup/bspstart.c
r0e3c0096 rbd8c8b2a 115 115 116 116 /* console_reserve_resources( &BSP_Configuration ); */ 117 117 /* 118 * Init rtems_interrupt_management 119 */ 120 rtems_irq_mngt_init(); 118 121 } -
c/src/lib/libbsp/i386/i386ex/timer/timer.c
r0e3c0096 rbd8c8b2a 28 28 #include <rtems.h> 29 29 #include <bsp.h> 30 #include <stdlib.h> 30 31 31 32 int Ttimer_val; 32 33 rtems_boolean Timer_driver_Find_average_overhead; 33 34 34 rtems_isr timerisr(); 35 extern void timerisr(); 36 extern int ClockIsOn(const rtems_raw_irq_connect_data*); 35 37 36 38 #define TMR0 0xF040 … … 40 42 #define TMRCFG 0xF834 41 43 42 void Timer _initialize()44 void TimerOn(const rtems_raw_irq_connect_data* used) 43 45 { 44 45 (void) set_vector( timerisr, 0x2a, 0 ); /* install ISR ( IR2 ) was 0x38*/46 46 47 47 Ttimer_val = 0; /* clear timer ISR count */ … … 52 52 outport_byte ( TMRCON , 0x64 ); /* change to mode 2 ( starts timer ) */ 53 53 /* interrupts ARE enabled */ 54 /* outport_byte( IERA, 0x41 ); enable interrupt */ 54 /* outport_byte( IERA, 0x41 ); enable interrupt */ 55 /* 56 * enable interrrupt at i8259 level 57 */ 58 pc386_irq_enable_at_i8259s(used->idtIndex - PC386_IRQ_VECTOR_BASE); 59 } 55 60 61 void TimerOff(const rtems_raw_irq_connect_data* used) 62 { 63 /* 64 * disable interrrupt at i8259 level 65 */ 66 pc386_irq_disable_at_i8259s(used->idtIndex - PC386_IRQ_VECTOR_BASE); 67 /* reset timer mode to standard (DOS) value */ 68 } 69 70 static rtems_raw_irq_connect_data timer_raw_irq_data = { 71 PC_386_RT_TIMER3 + PC386_IRQ_VECTOR_BASE, 72 timerisr, 73 TimerOn, 74 TimerOff, 75 ClockIsOn 76 }; 77 78 void Timer_exit() 79 { 80 if (!i386_delete_idt_entry(&timer_raw_irq_data)) { 81 printk("Timer raw handler deconnexion failed\n"); 82 rtems_fatal_error_occurred(1); 83 } 84 } 85 86 void Timer_initialize() 87 { 88 89 static rtems_boolean First = TRUE; 90 91 if (First) 92 { 93 First = FALSE; 94 95 atexit(Timer_exit); /* Try not to hose the system at exit. */ 96 if (!i386_set_idt_entry (&timer_raw_irq_data)) { 97 printk("raw handler connexion failed\n"); 98 rtems_fatal_error_occurred(1); 99 } 100 } 101 /* wait for ISR to be called at least once */ 102 Ttimer_val = 0; 103 while (Ttimer_val == 0) 104 continue; 105 Ttimer_val = 0; 56 106 } 57 107 -
c/src/lib/libbsp/i386/i386ex/timer/timerisr.s
r0e3c0096 rbd8c8b2a 29 29 SYM (timerisr): 30 30 addl $250, SYM (Ttimer_val) # another 250 microseconds 31 pushl eax 32 movb 0xa0,al /* signal generic End Of Interrupt (EOI) to slave PIC */ 33 outb al, $0x20 34 movb $0x20, al 35 outb al, $0x20 /* signal generic EOI to Master PIC */ 36 popl eax 31 37 iret 32 38 -
c/src/lib/libbsp/i386/pc386/console/Makefile.in
r0e3c0096 rbd8c8b2a 10 10 11 11 PGM=${ARCH}/console.rel 12 13 IMPORT_SRC=$(srcdir)/../../shared/io/printk.c 12 14 13 15 # C source names, if any, go here -- minus the .c … … 51 53 CLOBBER_ADDITIONS += 52 54 55 preinstall: 56 ${CP} ${IMPORT_SRC} . 57 53 58 ${PGM}: ${SRCS} ${OBJS} 54 59 $(make-rel) 55 60 56 all: ${ARCH} $(SRCS) $(PGM)61 all: ${ARCH} preinstall $(SRCS) $(PGM) 57 62 58 63 # the .rel file built here will be put into libbsp.a by ../wrapup/Makefile -
c/src/lib/libbsp/i386/pc386/console/console.c
r0e3c0096 rbd8c8b2a 62 62 63 63 extern rtems_boolean _IBMPC_scankey(char *); /* defined in 'inch.c' */ 64 extern BSP_polling_getchar_function_type BSP_wait_polled_input(); 65 extern void _IBMPC_initVideo(); 64 66 65 67 void console_reserve_resources(rtems_configuration_table *conf) … … 476 478 } 477 479 478 479 480 481 482 483 484 485 480 /* 481 * BSP initialization 482 */ 483 484 BSP_output_char_function_type BSP_output_char = (BSP_output_char_function_type) _IBMPC_outch; 485 BSP_polling_getchar_function_type BSP_poll_char = BSP_wait_polled_input; 486 void BSP_emergency_output_init() 487 { 488 _IBMPC_initVideo(); 489 } 490 491 492 493 494 495 496 497 -
c/src/lib/libbsp/i386/pc386/console/inch.c
r0e3c0096 rbd8c8b2a 296 296 297 297 char 298 debugPollingGetChar(void)298 BSP_wait_polled_input(void) 299 299 { 300 300 char c; -
c/src/lib/libbsp/i386/pc386/include/bsp.h
r0e3c0096 rbd8c8b2a 53 53 #include <clockdrv.h> 54 54 #include <libcpu/cpu.h> 55 #include <bspIo.h> 55 56 56 57 /*-------------------------------------------------------------------------+ -
c/src/lib/libbsp/i386/pc386/startup/Makefile.in
r0e3c0096 rbd8c8b2a 59 59 ${PGM}: ${SRCS} ${OBJS} 60 60 $(make-rel) 61 all: ${ARCH} $(SRCS) $(PGM)61 all: ${ARCH} preinstall $(SRCS) $(PGM) 62 62 $(INSTALL) $(srcdir)/linkcmds ${PROJECT_RELEASE}/lib 63 63 -
c/src/lib/libbsp/i386/pc386/timer/timer.c
r0e3c0096 rbd8c8b2a 177 177 outport_byte(TIMER_CNTR0, US_TO_TICK(US_PER_ISR) >> 8 & 0xff); 178 178 /* 179 * disable interrrupt at i8259 level179 * enable interrrupt at i8259 level 180 180 */ 181 181 pc386_irq_enable_at_i8259s(used->idtIndex - PC386_IRQ_VECTOR_BASE); -
c/src/lib/libbsp/i386/shared/Makefile.in
r0e3c0096 rbd8c8b2a 13 13 14 14 # Descend into the $(RTEMS_BSP_FAMILY) directory 15 SUB_DIRS=irq 15 SUB_DIRS=irq io 16 16 -
c/src/lib/libbsp/i386/shared/irq/irq.h
r0e3c0096 rbd8c8b2a 56 56 PC386_UART_COM1_IRQ = 4, 57 57 58 PC_386_RT_TIMER1 = 8 59 58 PC_386_RT_TIMER1 = 8, 59 60 PC_386_RT_TIMER3 = 10 60 61 }rtems_irq_symbolic_name; 61 62 -
c/src/lib/libbsp/i386/shared/irq/irq_init.c
r0e3c0096 rbd8c8b2a 16 16 #include <irq.h> 17 17 #include <bsp.h> 18 #include <bspIo.h> 18 19 19 20 /* … … 138 139 * put something here that will show the failure... 139 140 */ 140 _IBMPC_initVideo();141 BSP_emergency_output_init(); 141 142 printk("Unable to initialize IDT!!! System locked\n"); 142 143 while (1); … … 173 174 * put something here that will show the failure... 174 175 */ 175 _IBMPC_initVideo();176 BSP_emergency_output_init(); 176 177 printk("Unable to initialize RTEMS interrupt Management!!! System locked\n"); 177 178 while (1); … … 188 189 unsigned tmp; 189 190 190 _IBMPC_initVideo();191 BSP_emergency_output_init(); 191 192 192 193 printk("idt_entry_tbl = %x Interrupt_descriptor_table addr = %x\n", … … 197 198 } 198 199 printk("i8259s_cache = %x\n", * (unsigned short*) &i8259s_cache); 199 debugPollingGetChar();200 BSP_wait_polled_input(); 200 201 #endif 201 202 asm volatile ("sti"); -
c/src/lib/libcpu/i386/Makefile.in
r0e3c0096 rbd8c8b2a 9 9 PROJECT_ROOT = @PROJECT_ROOT@ 10 10 11 PGM=${ARCH}/libcpu.rel12 11 13 12 # C source names, if any, go here -- minus the .c … … 27 26 28 27 include $(RTEMS_ROOT)/make/custom/$(RTEMS_BSP).cfg 29 include $(RTEMS_ROOT)/make/leaf.cfg 28 include $(RTEMS_ROOT)/make/lib.cfg 29 30 LIB=${ARCH}/libcpuspec.a 30 31 31 32 # … … 51 52 CLOBBER_ADDITIONS += 52 53 53 ${ PGM}: ${SRCS} ${OBJS}54 $(make- rel)54 ${LIB}: ${SRCS} ${OBJS} 55 $(make-library) 55 56 56 57 preinstall : … … 58 59 $(INSTALL) -m 444 ${H_FILES} $(PROJECT_INCLUDE)/libcpu 59 60 60 all: ${ARCH} $(SRCS) preinstall $(OBJ) $( PGM)61 all: ${ARCH} $(SRCS) preinstall $(OBJ) $(LIB) 61 62 cd wrapup; $(MAKE) 62 63 -
c/src/lib/libcpu/i386/cpuModel.h
r0e3c0096 rbd8c8b2a 30 30 extern unsigned char Cx86_step; /* cyrix processor identification */ 31 31 32 extern void get_cpuinfo(); /* Display this informationin ascii form */32 extern void printCpuInfo(); /* Display this information on console in ascii form */ -
c/src/lib/libcpu/i386/displayCpu.c
r0e3c0096 rbd8c8b2a 174 174 void printCpuInfo() 175 175 { 176 int i , len = 0;176 int i; 177 177 static const char *x86_cap_flags[] = { 178 178 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce", -
c/src/lib/libcpu/i386/wrapup/Makefile.in
r0e3c0096 rbd8c8b2a 13 13 14 14 # bummer; have to use $foreach since % pattern subst rules only replace 1x 15 OBJS=../$(ARCH)/libcpu .rel15 OBJS=../$(ARCH)/libcpuspec.a 16 16 LIB=$(ARCH)/libcpu.a 17 17 … … 42 42 43 43 $(LIB): ${OBJS} 44 $(make-library) 44 @ list_of_o_files=""; \ 45 for i in ${OBJS}; \ 46 do \ 47 DIRNAME=`dirname ${OBJS}` ; \ 48 temp=`$(AR) t $$i`; \ 49 echo $$temp ;\ 50 echo $$DIRNAME ;\ 51 for j in $$temp; \ 52 do \ 53 list_of_o_files="$$list_of_o_files $$DIRNAME/$$j"; \ 54 done ;\ 55 echo $$list_of_o_files ;\ 56 done ;\ 57 $(RM) $@ ;\ 58 $(AR) $(ARFLAGS) $@ $$list_of_o_files ;\ 59 $(MKLIB) $@ 45 60 46 61 all: ${ARCH} $(SRCS) $(LIB)
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