Changeset bd39add in rtems for c

Timestamp:

May 31, 2013, 8:08:43 AM (8 years ago)

Author:

Sebastian Huber <sebastian.huber@…>

Branches:

4.11, 5, master

Children:

f2f211c5

Parents:

ffbeb6f

git-author:

Sebastian Huber <sebastian.huber@…> (05/31/13 08:08:43)

git-committer:

Sebastian Huber <sebastian.huber@…> (05/31/13 13:20:32)

Message:

bsp/qoriq: Add SMP support

Location:

c/src/lib/libbsp/powerpc/qoriq

Files:

• Makefile.am (modified) (1 diff)
• configure.ac (modified) (1 diff)
• include/bsp.h (modified) (2 diffs)
• start/start.S (modified) (3 diffs)
• startup/mmu-config.c (modified) (3 diffs)
• startup/smp.c (added)

c/src/lib/libbsp/powerpc/qoriq/Makefile.am

@@ -126 +126 @@
 endif
 
+if HAS_SMP
+libbsp_a_SOURCES += startup/smp.c
+endif
+
 include $(srcdir)/preinstall.am
 include $(top_srcdir)/../../../../automake/local.am

c/src/lib/libbsp/powerpc/qoriq/configure.ac

@@ -98 +98 @@
 AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
 
+RTEMS_CHECK_SMP
+AM_CONDITIONAL(HAS_SMP,[test "$rtems_cv_HAS_SMP" = "yes"])
+
 RTEMS_BSP_CLEANUP_OPTIONS(0, 0)
 RTEMS_PPC_EXCEPTIONS

c/src/lib/libbsp/powerpc/qoriq/include/bsp.h

@@ -8 +8 @@
 
 /*
- * Copyright (c) 2010 embedded brains GmbH.  All rights reserved.
+ * Copyright (c) 2010-2013 embedded brains GmbH.  All rights reserved.
  *
  *  embedded brains GmbH
- *  Obere Lagerstr. 30
+ *  Dornierstr. 4
  *  82178 Puchheim
  *  Germany
@@ -60 +60 @@
 #define RTEMS_BSP_NETWORK_DRIVER_NAME4 "intercom1"
 
+void qoriq_secondary_cpu_initialize(void);
+
 #ifdef __cplusplus
 }

c/src/lib/libbsp/powerpc/qoriq/start/start.S

@@ -8 +8 @@
 
 /*
- * Copyright (c) 2010-2012 embedded brains GmbH.  All rights reserved.
+ * Copyright (c) 2010-2013 embedded brains GmbH.  All rights reserved.
  *
  *  embedded brains GmbH
- *  Obere Lagerstr. 30
+ *  Dornierstr. 4
  *  82178 Puchheim
  *  Germany
@@ -33 +33 @@
 
         .globl _start
+        .globl _start_core_1
         .globl bsp_exc_vector_base
 
@@ -170 +171 @@
         b       memcpy
 
+_start_core_1:
+
+        /* Reset time base */
+        li      r0, 0
+        mtspr   TBWU, r0
+        mtspr   TBWL, r0
+
+        /* Get start stack */
+        subi    r1, r3, 16
+
+        /* Initial MMU setup */
+        bl      qoriq_tlb1_ts_0_only
+        li      r3, SCRATCH_TLB
+        li      r4, FSL_EIS_MAS1_TS
+        li      r5, FSL_EIS_MAS2_I
+        li      r6, FSL_EIS_MAS3_SR | FSL_EIS_MAS3_SW | FSL_EIS_MAS3_SX
+        li      r7, 0
+        li      r8, 11
+        bl      qoriq_tlb1_write
+
+        /* MSR initialization */
+        LWI     INITIAL_MSR, QORIQ_INITIAL_MSR
+        ori     r0, INITIAL_MSR, MSR_IS | MSR_DS
+        mtmsr   r0
+
+        /* SPEFSCR initialization */
+        LWI     r0, QORIQ_INITIAL_SPEFSCR
+        mtspr   FSL_EIS_SPEFSCR, r0
+
+        /* Initialize start stack */
+        li      r0, 0
+        stw     r0, 0(r1)
+
+        /* Configure MMU */
+        li      r3, FIRST_TLB
+        li      r4, SCRATCH_TLB
+        bl      qoriq_mmu_config
+        mtmsr   INITIAL_MSR
+        li      r3, SCRATCH_TLB
+        bl      qoriq_tlb1_invalidate
+
+        /* Set small-data anchors */
+        LA      r2, _SDA2_BASE_
+        LA      r13, _SDA_BASE_
+
+        b       qoriq_secondary_cpu_initialize
+
+        b       twiddle
+
         /* Exception vector prologues area */
         .section ".bsp_start_text", "ax"

c/src/lib/libbsp/powerpc/qoriq/startup/mmu-config.c

@@ -8 +8 @@
 
 /*
- * Copyright (c) 2011 embedded brains GmbH.  All rights reserved.
+ * Copyright (c) 2011-2013 embedded brains GmbH.  All rights reserved.
  *
  *  embedded brains GmbH
- *  Obere Lagerstr. 30
+ *  Dornierstr. 4
  *  82178 Puchheim
  *  Germany
@@ -21 +21 @@
  */
 
-#include <bspopts.h>
+#include <bsp.h>
 #include <bsp/mmu.h>
 #include <bsp/linker-symbols.h>
@@ -50 +50 @@
 }
 
+#ifdef RTEMS_SMP
+  #define ENTRY_RW_MAS2 FSL_EIS_MAS2_M
+#else
+  #define ENTRY_RW_MAS2 0
+#endif
+
 #define ENTRY_RW(b, s) { \
         .begin = (uint32_t) b, \
         .size = (uint32_t) s, \
-        .mas2 = 0, \
+        .mas2 = ENTRY_RW_MAS2, \
         .mas3 = FSL_EIS_MAS3_SR | FSL_EIS_MAS3_SW \
 }