Changeset ba0e9631 in rtems


Ignore:
Timestamp:
Aug 10, 2018, 5:34:03 AM (2 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
5, master
Children:
6695d02
Parents:
a36aa86
git-author:
Sebastian Huber <sebastian.huber@…> (08/10/18 05:34:03)
git-committer:
Sebastian Huber <sebastian.huber@…> (08/23/18 12:38:41)
Message:

score: Do not inline _Thread_Dispatch_enable()

This function is slighly too complex for inlining with two if
statements. The caller already needs a stack frame due to the potential
call to _Thread_Do_dispatch(). In _Thread_Dispatch_enable() the call to
_Thread_Do_dispatch() can be optimized to a tail call.

A text size comparision

(text size after patch - text size before patch)

/ text size before patch

on sparc/erc32 with SMP enabled showed these results:

Minimum -0.000697892 (fsdosfsname01.exe)
Median -0.00745021 (psxtimes01.exe)
Maximum -0.0233032 (spscheduler01.exe)

A text size comparision

text size after patch - text size before patch

on sparc/erc32 with SMP enabled showed these results:

Minimum -3312 (ada_sp09.exe)
Median -1024 (tm15.exe)
Maximum -592 (spglobalcon01.exe)

Location:
cpukit
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • cpukit/include/rtems/score/threaddispatch.h

    ra36aa86 rba0e9631  
    206206 * @brief Enables thread dispatching.
    207207 *
    208  * May perfrom a thread dispatch if necessary as a side-effect.
    209  *
    210  * @param[in] cpu_self The current processor.
    211  */
    212 RTEMS_INLINE_ROUTINE void _Thread_Dispatch_enable( Per_CPU_Control *cpu_self )
    213 {
    214   uint32_t disable_level = cpu_self->thread_dispatch_disable_level;
    215 
    216   if ( disable_level == 1 ) {
    217     ISR_Level level;
    218 
    219     _ISR_Local_disable( level );
    220 
    221     if (
    222       cpu_self->dispatch_necessary
    223 #if defined(RTEMS_SCORE_ROBUST_THREAD_DISPATCH)
    224         || !_ISR_Is_enabled( level )
    225 #endif
    226     ) {
    227       _Thread_Do_dispatch( cpu_self, level );
    228     } else {
    229       cpu_self->thread_dispatch_disable_level = 0;
    230       _Profiling_Thread_dispatch_enable( cpu_self, 0 );
    231       _ISR_Local_enable( level );
    232     }
    233   } else {
    234     _Assert( disable_level > 0 );
    235     cpu_self->thread_dispatch_disable_level = disable_level - 1;
    236   }
    237 }
     208 * May perform a thread dispatch if necessary as a side-effect.
     209 *
     210 * @param[in] cpu_self The current processor.
     211 */
     212void _Thread_Dispatch_enable( Per_CPU_Control *cpu_self );
    238213
    239214/**
  • cpukit/score/src/threaddispatch.c

    ra36aa86 rba0e9631  
    268268  _Thread_Do_dispatch( cpu_self, level );
    269269}
     270
     271void _Thread_Dispatch_enable( Per_CPU_Control *cpu_self )
     272{
     273  uint32_t disable_level = cpu_self->thread_dispatch_disable_level;
     274
     275  if ( disable_level == 1 ) {
     276    ISR_Level level;
     277
     278    _ISR_Local_disable( level );
     279
     280    if (
     281      cpu_self->dispatch_necessary
     282#if defined(RTEMS_SCORE_ROBUST_THREAD_DISPATCH)
     283        || !_ISR_Is_enabled( level )
     284#endif
     285    ) {
     286      _Thread_Do_dispatch( cpu_self, level );
     287    } else {
     288      cpu_self->thread_dispatch_disable_level = 0;
     289      _Profiling_Thread_dispatch_enable( cpu_self, 0 );
     290      _ISR_Local_enable( level );
     291    }
     292  } else {
     293    _Assert( disable_level > 0 );
     294    cpu_self->thread_dispatch_disable_level = disable_level - 1;
     295  }
     296}
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