- Timestamp:
- 01/12/15 10:24:16 (9 years ago)
- Branches:
- 4.11, 5, master
- Children:
- 8244a2f
- Parents:
- 8d8573ac
- git-author:
- Daniel Cederman <cederman@…> (01/12/15 10:24:16)
- git-committer:
- Daniel Hellstrom <daniel@…> (02/11/15 14:35:27)
- File:
-
- 1 edited
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doc/cpu_supplement/sparc.t
r8d8573ac rb92f737 952 952 The default fatal error handler which is invoked by 953 953 the fatal_error_occurred directive when there is no user handler 954 configured or the user handler returns control to RTEMS. The 955 default fatal error handler disables processor interrupts to 956 level 15, places the error code in g1, and goes into an infinite 957 loop to simulate a halt processor instruction. 954 configured or the user handler returns control to RTEMS. 955 956 If the BSP has been configured with @code{BSP_POWER_DOWN_AT_FATAL_HALT} 957 set to true, the default handler will disable interrupts 958 and enter power down mode. If power down mode is not available, 959 it goes into an infinite loop to simulate a halt processor instruction. 960 961 If @code{BSP_POWER_DOWN_AT_FATAL_HALT} is set to false, the default 962 handler will place the value @code{1} in register @code{g1}, the 963 error source in register @code{g2}, and the error code in register 964 @code{g3}. It will then generate a system error which will 965 hand over control to the debugger, simulator, etc. 958 966 959 967 @section Thread-Local Storage
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