Changeset b72e847b in rtems

Timestamp:

08/04/08 20:35:25 (15 years ago)

Author:

Joel Sherrill <joel.sherrill@…>

Branches:

4.8

Children:

9f170c9

Parents:

bd029d87

Message:

2008-08-04 Joel Sherrill <joel.sherrill@…>

PR 1294/bsps

• rtems/score/cpu.h, rtems/score/sparc.h: Correct prototype and usage of sparc_disable_interrupts.

Location:

cpukit/score/cpu/sparc

Files:

• ChangeLog (modified) (1 diff)
• rtems/score/cpu.h (modified) (1 diff)
• rtems/score/sparc.h (modified) (2 diffs)

cpukit/score/cpu/sparc/ChangeLog

@@ +1 @@
+2008-08-04      Joel Sherrill <joel.sherrill@OARcorp.com>
+
+        PR 1294/bsps
+        * rtems/score/cpu.h, rtems/score/sparc.h: Correct prototype and usage
+        of sparc_disable_interrupts.
+
 2008-02-20      Alexandru Bugnar <a-bugnar@criticalsoftware.com>
 

cpukit/score/cpu/sparc/rtems/score/cpu.h

@@ -714 +714 @@
 #ifndef ASM
 
-extern unsigned int sparc_disable_interrupts();
-extern void sparc_enable_interrupts();
-
 /*
  *  ISR handler macros

cpukit/score/cpu/sparc/rtems/score/sparc.h

@@ -206 +206 @@
 /*
  *  Manipulate the interrupt level in the psr 
- *
- */
-
-/*
-#define sparc_disable_interrupts( _level ) \
-  do { \
-    register unsigned int _newlevel; \
-    \
-    sparc_get_psr( _level ); \
-    (_newlevel) = (_level) | SPARC_PSR_PIL_MASK; \
-    sparc_set_psr( _newlevel ); \
-  } while ( 0 )
-
-#define sparc_enable_interrupts( _level ) \
-  do { \
-    unsigned int _tmp; \
-    \
-    sparc_get_psr( _tmp ); \
-    _tmp &= ~SPARC_PSR_PIL_MASK; \
-    _tmp |= (_level) & SPARC_PSR_PIL_MASK; \
-    sparc_set_psr( _tmp ); \
-  } while ( 0 ) 
-*/
+ */
+
+uint32_t sparc_disable_interrupts(void);
+void sparc_enable_interrupts(uint32_t);
   
 #define sparc_flash_interrupts( _level ) \
@@ -235 +216 @@
     \
     sparc_enable_interrupts( (_level) ); \
-    sparc_disable_interrupts( _ignored ); \
-  } while ( 0 )
-
-/*
-#define sparc_set_interrupt_level( _new_level ) \
-  do { \
-    register uint32_t   _new_psr_level = 0; \
-    \
-    sparc_get_psr( _new_psr_level ); \
-    _new_psr_level &= ~SPARC_PSR_PIL_MASK; \
-    _new_psr_level |= \
-      (((_new_level) << SPARC_PSR_PIL_BIT_POSITION) & SPARC_PSR_PIL_MASK); \
-    sparc_set_psr( _new_psr_level ); \
-  } while ( 0 )
-*/
+    _ignored = sparc_disable_interrupts(); \
+  } while ( 0 )
 
 #define sparc_get_interrupt_level( _level ) \