Changeset b706b4a in rtems for cpukit/score/cpu/riscv/include/rtems

Timestamp:

Jun 27, 2018, 6:54:13 AM (3 years ago)

Author:

Sebastian Huber <sebastian.huber@…>

Branches:

5, master

Children:

8f035cb

Parents:

2987c4f

git-author:

Sebastian Huber <sebastian.huber@…> (06/27/18 06:54:13)

git-committer:

Sebastian Huber <sebastian.huber@…> (06/29/18 08:04:37)

Message:

riscv: Remove mstatus from thread context

The mstatus register contains no thread-specific state which must be
saved/restored during a context switch. Machine interrupts (MIE) must
be enabled during a context switch.

Create separate CPU_Interrupt_frame structure.

Update #3433.

Location:

cpukit/score/cpu/riscv/include/rtems/score

Files:

• cpu.h (modified) (3 diffs)
• cpuimpl.h (modified) (2 diffs)

cpukit/score/cpu/riscv/include/rtems/score/cpu.h

@@ -48 +48 @@
 #define CPU_INLINE_ENABLE_DISPATCH       FALSE
 #define CPU_UNROLL_ENQUEUE_PRIORITY      TRUE
-#define CPU_ISR_PASSES_FRAME_POINTER 1
+
+#define CPU_ISR_PASSES_FRAME_POINTER FALSE
+
 #define CPU_HARDWARE_FP                  FALSE
 #define CPU_SOFTWARE_FP                  FALSE
@@ -73 +75 @@
   unsigned long x[32];
 
-  /* Special purpose registers */
-  unsigned long mstatus;
-  unsigned long mcause;
-  unsigned long mepc;
   uint32_t isr_dispatch_disable;
 #ifdef RTEMS_SMP
@@ -90 +88 @@
   double  some_float_register;
 } Context_Control_fp;
-
-typedef Context_Control CPU_Interrupt_frame;
 
 #define CPU_CONTEXT_FP_SIZE  0

cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h

@@ -39 +39 @@
 #if __riscv_xlen == 32
 
-#define RISCV_CONTEXT_ISR_DISPATCH_DISABLE 140
+#define RISCV_CONTEXT_ISR_DISPATCH_DISABLE 128
 
-#define CPU_INTERRUPT_FRAME_SIZE 144
+#define CPU_INTERRUPT_FRAME_SIZE 140
 
 #elif __riscv_xlen == 64
 
-#define RISCV_CONTEXT_ISR_DISPATCH_DISABLE 280
+#define RISCV_CONTEXT_ISR_DISPATCH_DISABLE 256
 
-#define CPU_INTERRUPT_FRAME_SIZE 288
+#define CPU_INTERRUPT_FRAME_SIZE 280
 
 #endif /* __riscv_xlen */
@@ -56 +56 @@
 extern "C" {
 #endif
+
+typedef struct {
+  unsigned long x[32];
+  unsigned long mstatus;
+  unsigned long mcause;
+  unsigned long mepc;
+} CPU_Interrupt_frame;
 
 #ifdef RTEMS_SMP