Changeset b616350 in rtems


Ignore:
Timestamp:
Jun 29, 2010, 12:31:02 AM (9 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.11, master
Children:
1ef0afe
Parents:
46cce26
Message:

2010-06-28 Joel Sherrill <joel.sherrill@…>

PR 1573/cpukit

  • arm_exc_interrupt.S: Add a per cpu data structure which contains the information required by RTEMS for each CPU core. This encapsulates information such as thread executing, heir, idle and dispatch needed.
Location:
cpukit/score/cpu/arm
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • cpukit/score/cpu/arm/ChangeLog

    r46cce26 rb616350  
     12010-06-28      Joel Sherrill <joel.sherrill@oarcorp.com>
     2
     3        PR 1573/cpukit
     4        * arm_exc_interrupt.S: Add a per cpu data structure which contains the
     5        information required by RTEMS for each CPU core. This encapsulates
     6        information such as thread executing, heir, idle and dispatch needed.
     7
    182010-05-10      Joel Sherrill <joel.sherrilL@OARcorp.com>
    29
  • cpukit/score/cpu/arm/arm_exc_interrupt.S

    r46cce26 rb616350  
    3131
    3232#include <rtems/asm.h>
     33#include <rtems/score/percpu.h>
    3334
    3435#define EXCHANGE_LR r4
     
    4344#define CONTEXT_SIZE 28
    4445
    45 .extern _ISR_Nest_level
    46 .extern _ISR_Signals_to_thread_executing
    47 .extern _ISR_Thread_dispatch
    4846.extern _Thread_Dispatch_disable_level
    4947
     
    8280
    8381        /* Get interrupt nest level */
    84         ldr     r0, =_ISR_Nest_level
     82        ldr     r0, =ISR_NEST_LEVEL
    8583        ldr     r2, [r0]
    8684
     
    106104
    107105        /* Decrement interrupt nest and thread dispatch disable level */
    108         ldr     r0, =_ISR_Nest_level
     106        ldr     r0, =ISR_NEST_LEVEL
    109107        ldr     r1, =_Thread_Dispatch_disable_level
    110108        ldr     r2, [r0]
     
    125123
    126124        /* Check context switch necessary */
    127         ldr     r0, =_Context_Switch_necessary
    128         ldrb    r1, [r0]
    129         ldr     r0, =_ISR_Signals_to_thread_executing
    130         cmp     r1, #0
    131         bne     do_thread_dispatch
    132 
    133         /* Check ISR signals to thread executing */
     125        ldr     r0, =DISPATCH_NEEDED
    134126        ldrb    r1, [r0]
    135127        cmp     r1, #0
     
    142134
    143135do_thread_dispatch:
    144 
    145         /* Clear ISR signals to thread executing */
    146         strb    r3, [r0]
    147136
    148137        /* Thread dispatch */
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