Changeset b3f80031 in rtems
- Timestamp:
- 03/04/05 21:47:36 (19 years ago)
- Branches:
- 4.10, 4.11, 4.8, 4.9, 5, master
- Children:
- bdc2572
- Parents:
- f28dcc91
- Location:
- cpukit
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
cpukit/ChangeLog
rf28dcc91 rb3f80031 1 2005-03-04 Joel Sherrill <joel@OARcorp.com> 2 3 * include/rtems/pci.h: Clean up and reformatting. Make PCI initialize 4 function part of the unified PCI API. 5 1 6 2005-03-04 Ralf Corsepius <ralf.corsepius@rtems.org> 2 7 -
cpukit/include/rtems/pci.h
rf28dcc91 rb3f80031 1 1 /* 2 2 * 3 * 4 * 5 * 3 * PCI defines and function prototypes 4 * Copyright 1994, Drew Eckhardt 5 * Copyright 1997, 1998 Martin Mares <mj@atrey.karlin.mff.cuni.cz> 6 6 * 7 * 8 * 7 * For more information, please consult the following manuals (look at 8 * http://www.pcisig.com/ for how to get them): 9 9 * 10 * 11 * 12 * 13 * 10 * PCI BIOS Specification 11 * PCI Local Bus Specification 12 * PCI to PCI Bridge Specification 13 * PCI System Design Guide 14 14 * 15 15 * $Id$ … … 23 23 * of which the first 64 bytes are standardized as follows: 24 24 */ 25 #define PCI_VENDOR_ID 0x00 /* 16 bits */ 26 #define PCI_DEVICE_ID 0x02 /* 16 bits */ 27 #define PCI_COMMAND 0x04 /* 16 bits */ 28 #define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */ 29 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ 30 #define PCI_COMMAND_MASTER 0x4 /* Enable bus mastering */ 31 #define PCI_COMMAND_SPECIAL 0x8 /* Enable response to special cycles */ 32 #define PCI_COMMAND_INVALIDATE 0x10 /* Use memory write and invalidate */ 33 #define PCI_COMMAND_VGA_PALETTE 0x20 /* Enable palette snooping */ 34 #define PCI_COMMAND_PARITY 0x40 /* Enable parity checking */ 35 #define PCI_COMMAND_WAIT 0x80 /* Enable address/data stepping */ 36 #define PCI_COMMAND_SERR 0x100 /* Enable SERR */ 37 #define PCI_COMMAND_FAST_BACK 0x200 /* Enable back-to-back writes */ 38 39 #define PCI_STATUS 0x06 /* 16 bits */ 40 #define PCI_STATUS_66MHZ 0x20 /* Support 66 Mhz PCI 2.1 bus */ 41 #define PCI_STATUS_UDF 0x40 /* Support User Definable Features */ 42 43 #define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */ 44 #define PCI_STATUS_PARITY 0x100 /* Detected parity error */ 45 #define PCI_STATUS_DEVSEL_MASK 0x600 /* DEVSEL timing */ 46 #define PCI_STATUS_DEVSEL_FAST 0x000 47 #define PCI_STATUS_DEVSEL_MEDIUM 0x200 48 #define PCI_STATUS_DEVSEL_SLOW 0x400 49 #define PCI_STATUS_SIG_TARGET_ABORT 0x800 /* Set on target abort */ 50 #define PCI_STATUS_REC_TARGET_ABORT 0x1000 /* Master ack of " */ 51 #define PCI_STATUS_REC_MASTER_ABORT 0x2000 /* Set on master abort */ 52 #define PCI_STATUS_SIG_SYSTEM_ERROR 0x4000 /* Set when we drive SERR */ 53 #define PCI_STATUS_DETECTED_PARITY 0x8000 /* Set on parity error */ 54 55 #define PCI_CLASS_REVISION 0x08 /* High 24 bits are class, low 8 56 revision */ 57 #define PCI_REVISION_ID 0x08 /* Revision ID */ 58 #define PCI_CLASS_PROG 0x09 /* Reg. Level Programming Interface */ 59 #define PCI_CLASS_DEVICE 0x0a /* Device class */ 60 61 #define PCI_CACHE_LINE_SIZE 0x0c /* 8 bits */ 62 #define PCI_LATENCY_TIMER 0x0d /* 8 bits */ 63 #define PCI_HEADER_TYPE 0x0e /* 8 bits */ 64 #define PCI_HEADER_TYPE_NORMAL 0 65 #define PCI_HEADER_TYPE_BRIDGE 1 66 #define PCI_HEADER_TYPE_CARDBUS 2 67 68 #define PCI_BIST 0x0f /* 8 bits */ 69 #define PCI_BIST_CODE_MASK 0x0f /* Return result */ 70 #define PCI_BIST_START 0x40 /* 1 to start BIST, 2 secs or less */ 71 #define PCI_BIST_CAPABLE 0x80 /* 1 if BIST capable */ 25 #define PCI_VENDOR_ID 0x00 /* 16 bits */ 26 #define PCI_DEVICE_ID 0x02 /* 16 bits */ 27 28 #define PCI_COMMAND 0x04 /* 16 bits */ 29 #define PCI_COMMAND_IO 0x0001 /* Enable response in I/O space */ 30 #define PCI_COMMAND_MEMORY 0x0002 /* Enable response in Memory space */ 31 #define PCI_COMMAND_MASTER 0x0004 /* Enable bus mastering */ 32 #define PCI_COMMAND_SPECIAL 0x0008 /* Enable response to special cycles */ 33 #define PCI_COMMAND_INVALIDATE 0x0010 /* Use memory write and invalidate */ 34 #define PCI_COMMAND_VGA_PALETTE 0x0020 /* Enable palette snooping */ 35 #define PCI_COMMAND_PARITY 0x0040 /* Enable parity checking */ 36 #define PCI_COMMAND_WAIT 0x0080 /* Enable address/data stepping */ 37 #define PCI_COMMAND_SERR 0x0100 /* Enable SERR */ 38 #define PCI_COMMAND_FAST_BACK 0x0200 /* Enable back-to-back writes */ 39 40 #define PCI_STATUS 0x06 /* 16 bits */ 41 #define PCI_STATUS_66MHZ 0x0020 /* Support 66 Mhz PCI 2.1 bus */ 42 #define PCI_STATUS_UDF 0x0040 /* Support User Definable Features */ 43 #define PCI_STATUS_FAST_BACK 0x0080 /* Accept fast-back to back */ 44 #define PCI_STATUS_PARITY 0x0100 /* Detected parity error */ 45 #define PCI_STATUS_DEVSEL_MASK 0x0600 /* DEVSEL timing */ 46 #define PCI_STATUS_DEVSEL_FAST 0x0000 47 #define PCI_STATUS_DEVSEL_MEDIUM 0x0200 48 #define PCI_STATUS_DEVSEL_SLOW 0x0400 49 #define PCI_STATUS_SIG_TARGET_ABORT 0x0800 /* Set on target abort */ 50 #define PCI_STATUS_REC_TARGET_ABORT 0x1000 /* Master ack of " */ 51 #define PCI_STATUS_REC_MASTER_ABORT 0x2000 /* Set on master abort */ 52 #define PCI_STATUS_SIG_SYSTEM_ERROR 0x4000 /* Set when we drive SERR */ 53 #define PCI_STATUS_DETECTED_PARITY 0x8000 /* Set on parity error */ 54 55 #define PCI_CLASS_REVISION 0x08 /* High 24 bits are class, low 8 revision */ 56 #define PCI_REVISION_ID 0x08 /* Revision ID */ 57 #define PCI_CLASS_PROG 0x09 /* Reg. Level Programming Interface */ 58 #define PCI_CLASS_DEVICE 0x0a /* Device class */ 59 #define PCI_CACHE_LINE_SIZE 0x0c /* 8 bits */ 60 #define PCI_LATENCY_TIMER 0x0d /* 8 bits */ 61 62 #define PCI_HEADER_TYPE 0x0e /* 8 bits */ 63 #define PCI_HEADER_TYPE_NORMAL 0 64 #define PCI_HEADER_TYPE_BRIDGE 1 65 #define PCI_HEADER_TYPE_CARDBUS 2 66 67 #define PCI_BIST 0x0f /* 8 bits */ 68 #define PCI_BIST_CODE_MASK 0x0f /* Return result */ 69 #define PCI_BIST_START 0x40 /* 1 to start BIST, 2 secs or less */ 70 #define PCI_BIST_CAPABLE 0x80 /* 1 if BIST capable */ 72 71 73 72 /* 74 73 * Base addresses specify locations in memory or I/O space. 75 * Decoded size can be determined by writing a value of 76 * 0xffffffff to the register, and reading it back. Only 74 * Decoded size can be determined by writing a value of 75 * 0xffffffff to the register, and reading it back. Only 77 76 * 1 bits are decoded. 78 77 */ 79 #define PCI_BASE_ADDRESS_0 0x10/* 32 bits */80 #define PCI_BASE_ADDRESS_1 0x14/* 32 bits [htype 0,1 only] */81 #define PCI_BASE_ADDRESS_2 0x18/* 32 bits [htype 0 only] */82 #define PCI_BASE_ADDRESS_3 0x1c/* 32 bits */83 #define PCI_BASE_ADDRESS_4 0x20/* 32 bits */84 #define PCI_BASE_ADDRESS_5 0x24/* 32 bits */85 #define PCI_BASE_ADDRESS_SPACE 0x01/* 0 = memory, 1 = I/O */86 #define PCI_BASE_ADDRESS_SPACE_IO0x0187 #define PCI_BASE_ADDRESS_SPACE_MEMORY0x0088 #define 89 #define PCI_BASE_ADDRESS_MEM_TYPE_32 0x00/* 32 bit address */90 #define PCI_BASE_ADDRESS_MEM_TYPE_1M 0x02/* Below 1M */91 #define PCI_BASE_ADDRESS_MEM_TYPE_64 0x04/* 64 bit address */92 #define PCI_BASE_ADDRESS_MEM_PREFETCH 0x08/* prefetchable? */93 #define PCI_BASE_ADDRESS_MEM_MASK(~0x0fUL)94 #define PCI_BASE_ADDRESS_IO_MASK(~0x03UL)78 #define PCI_BASE_ADDRESS_0 0x10 /* 32 bits */ 79 #define PCI_BASE_ADDRESS_1 0x14 /* 32 bits [htype 0,1 only] */ 80 #define PCI_BASE_ADDRESS_2 0x18 /* 32 bits [htype 0 only] */ 81 #define PCI_BASE_ADDRESS_3 0x1c /* 32 bits */ 82 #define PCI_BASE_ADDRESS_4 0x20 /* 32 bits */ 83 #define PCI_BASE_ADDRESS_5 0x24 /* 32 bits */ 84 #define PCI_BASE_ADDRESS_SPACE 0x01 /* 0 = memory, 1 = I/O */ 85 #define PCI_BASE_ADDRESS_SPACE_IO 0x01 86 #define PCI_BASE_ADDRESS_SPACE_MEMORY 0x00 87 #define PCI_BASE_ADDRESS_MEM_TYPE_MASK 0x06 88 #define PCI_BASE_ADDRESS_MEM_TYPE_32 0x00 /* 32 bit address */ 89 #define PCI_BASE_ADDRESS_MEM_TYPE_1M 0x02 /* Below 1M */ 90 #define PCI_BASE_ADDRESS_MEM_TYPE_64 0x04 /* 64 bit address */ 91 #define PCI_BASE_ADDRESS_MEM_PREFETCH 0x08 /* prefetchable? */ 92 #define PCI_BASE_ADDRESS_MEM_MASK (~0x0fUL) 93 #define PCI_BASE_ADDRESS_IO_MASK (~0x03UL) 95 94 /* bit 1 is reserved if address_space = 1 */ 96 95 97 96 /* Header type 0 (normal devices) */ 98 #define PCI_CARDBUS_CIS 99 #define PCI_SUBSYSTEM_VENDOR_ID 100 #define PCI_SUBSYSTEM_ID 0x2e101 #define PCI_ROM_ADDRESS 0x30 /* Bits 31..11 areaddress, 10..1 reserved */102 #define PCI_ROM_ADDRESS_ENABLE0x01103 #define PCI_ROM_ADDRESS_MASK 97 #define PCI_CARDBUS_CIS 0x28 98 #define PCI_SUBSYSTEM_VENDOR_ID 0x2c 99 #define PCI_SUBSYSTEM_ID 0x2e 100 #define PCI_ROM_ADDRESS 0x30/* Bits 31..11 address, 10..1 reserved */ 101 #define PCI_ROM_ADDRESS_ENABLE 0x01 102 #define PCI_ROM_ADDRESS_MASK (~0x7ffUL) 104 103 105 104 /* 0x34-0x3b are reserved */ 106 #define PCI_INTERRUPT_LINE 0x3c/* 8 bits */107 #define PCI_INTERRUPT_PIN 0x3d/* 8 bits */108 #define PCI_MIN_GNT 0x3e/* 8 bits */109 #define PCI_MAX_LAT 0x3f/* 8 bits */105 #define PCI_INTERRUPT_LINE 0x3c /* 8 bits */ 106 #define PCI_INTERRUPT_PIN 0x3d /* 8 bits */ 107 #define PCI_MIN_GNT 0x3e /* 8 bits */ 108 #define PCI_MAX_LAT 0x3f /* 8 bits */ 110 109 111 110 /* Header type 1 (PCI-to-PCI bridges) */ 112 #define PCI_PRIMARY_BUS 0x18 /* Primary bus number */ 113 #define PCI_SECONDARY_BUS 0x19 /* Secondary bus number */ 114 #define PCI_SUBORDINATE_BUS 0x1a /* Highest bus number behind the bridge */ 115 #define PCI_SEC_LATENCY_TIMER 0x1b /* Latency timer for secondary interface */ 116 #define PCI_IO_BASE 0x1c /* I/O range behind the bridge */ 117 #define PCI_IO_LIMIT 0x1d 118 #define PCI_IO_RANGE_TYPE_MASK 0x0f /* I/O bridging type */ 119 #define PCI_IO_RANGE_TYPE_16 0x00 120 #define PCI_IO_RANGE_TYPE_32 0x01 121 #define PCI_IO_RANGE_MASK ~0x0f 122 #define PCI_SEC_STATUS 0x1e /* Secondary status register, only bit 14 used */ 123 #define PCI_MEMORY_BASE 0x20 /* Memory range behind */ 124 #define PCI_MEMORY_LIMIT 0x22 125 #define PCI_MEMORY_RANGE_TYPE_MASK 0x0f 126 #define PCI_MEMORY_RANGE_MASK ~0x0f 127 #define PCI_PREF_MEMORY_BASE 0x24 /* Prefetchable memory range behind */ 128 #define PCI_PREF_MEMORY_LIMIT 0x26 129 #define PCI_PREF_RANGE_TYPE_MASK 0x0f 130 #define PCI_PREF_RANGE_TYPE_32 0x00 131 #define PCI_PREF_RANGE_TYPE_64 0x01 132 #define PCI_PREF_RANGE_MASK ~0x0f 133 #define PCI_PREF_BASE_UPPER32 0x28 /* Upper half of prefetchable memory range */ 134 #define PCI_PREF_LIMIT_UPPER32 0x2c 135 #define PCI_IO_BASE_UPPER16 0x30 /* Upper half of I/O addresses */ 136 #define PCI_IO_LIMIT_UPPER16 0x32 111 #define PCI_PRIMARY_BUS 0x18 /* Primary bus number */ 112 #define PCI_SECONDARY_BUS 0x19 /* Secondary bus number */ 113 #define PCI_SUBORDINATE_BUS 0x1a /* Highest bus number behind the bridge */ 114 #define PCI_SEC_LATENCY_TIMER 0x1b /* Latency timer for secondary interface */ 115 #define PCI_IO_BASE 0x1c /* I/O range behind the bridge */ 116 #define PCI_IO_LIMIT 0x1d 117 #define PCI_IO_RANGE_TYPE_MASK 0x0f /* I/O bridging type */ 118 #define PCI_IO_RANGE_TYPE_16 0x00 119 #define PCI_IO_RANGE_TYPE_32 0x01 120 #define PCI_IO_RANGE_MASK ~0x0f 121 122 #define PCI_SEC_STATUS 0x1e /* Secondary status register, only bit 14 used */ 123 124 #define PCI_MEMORY_BASE 0x20 /* Memory range behind */ 125 #define PCI_MEMORY_LIMIT 0x22 126 #define PCI_MEMORY_RANGE_TYPE_MASK 0x0f 127 #define PCI_MEMORY_RANGE_MASK ~0x0f 128 #define PCI_PREF_MEMORY_BASE 0x24 /* Prefetchable memory range behind */ 129 #define PCI_PREF_MEMORY_LIMIT 0x26 130 #define PCI_PREF_RANGE_TYPE_MASK 0x0f 131 #define PCI_PREF_RANGE_TYPE_32 0x00 132 #define PCI_PREF_RANGE_TYPE_64 0x01 133 #define PCI_PREF_RANGE_MASK ~0x0f 134 #define PCI_PREF_BASE_UPPER32 0x28 /* Upper half of prefetchable memory */ 135 #define PCI_PREF_LIMIT_UPPER32 0x2c 136 #define PCI_IO_BASE_UPPER16 0x30 /* Upper half of I/O addresses */ 137 #define PCI_IO_LIMIT_UPPER16 0x32 137 138 /* 0x34-0x3b is reserved */ 138 #define PCI_ROM_ADDRESS1 0x38/* Same as PCI_ROM_ADDRESS, but for htype 1 */139 #define PCI_ROM_ADDRESS1 0x38 /* Same as PCI_ROM_ADDRESS, but for htype 1 */ 139 140 /* 0x3c-0x3d are same as for htype 0 */ 140 #define PCI_BRIDGE_CONTROL 0x3e 141 #define PCI_BRIDGE_CTL_PARITY 0x01 /* Enable parity detection on secondary interface */ 142 #define PCI_BRIDGE_CTL_SERR 0x02 /* The same for SERR forwarding */ 143 #define PCI_BRIDGE_CTL_NO_ISA 0x04 /* Disable bridging of ISA ports */ 144 #define PCI_BRIDGE_CTL_VGA 0x08 /* Forward VGA addresses */ 145 #define PCI_BRIDGE_CTL_MASTER_ABORT 0x20 /* Report master aborts */ 146 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 /* Secondary bus reset */ 147 #define PCI_BRIDGE_CTL_FAST_BACK 0x80 /* Fast Back2Back enabled on secondary interface */ 141 #define PCI_BRIDGE_CONTROL 0x3e 142 #define PCI_BRIDGE_CTL_PARITY 0x01 /* Enable parity detection on secondary interface */ 143 #define PCI_BRIDGE_CTL_SERR 0x02 /* The same for SERR forwarding */ 144 #define PCI_BRIDGE_CTL_NO_ISA 0x04 /* Disable bridging of ISA ports */ 145 #define PCI_BRIDGE_CTL_VGA 0x08 /* Forward VGA addresses */ 146 #define PCI_BRIDGE_CTL_MASTER_ABORT 0x20 /* Report master aborts */ 147 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 /* Secondary bus reset */ 148 #define PCI_BRIDGE_CTL_FAST_BACK 0x80 /* Fast Back2Back enabled */ 149 /* on secondary interface */ 148 150 149 151 /* Header type 2 (CardBus bridges) */ 150 152 /* 0x14-0x15 reserved */ 151 #define PCI_CB_SEC_STATUS 0x16/* Secondary status */152 #define PCI_CB_PRIMARY_BUS 0x18/* PCI bus number */153 #define PCI_CB_CARD_BUS 0x19/* CardBus bus number */154 #define PCI_CB_SUBORDINATE_BUS 0x1a/* Subordinate bus number */155 #define PCI_CB_LATENCY_TIMER 0x1b/* CardBus latency timer */156 #define PCI_CB_MEMORY_BASE_0 157 #define PCI_CB_MEMORY_LIMIT_0 158 #define PCI_CB_MEMORY_BASE_1 159 #define PCI_CB_MEMORY_LIMIT_1 160 #define PCI_CB_IO_BASE_0 161 #define PCI_CB_IO_BASE_0_HI 162 #define PCI_CB_IO_LIMIT_0 163 #define PCI_CB_IO_LIMIT_0_HI 164 #define PCI_CB_IO_BASE_1 165 #define PCI_CB_IO_BASE_1_HI 166 #define PCI_CB_IO_LIMIT_1 167 #define PCI_CB_IO_LIMIT_1_HI 168 #define PCI_CB_IO_RANGE_MASK~0x03153 #define PCI_CB_SEC_STATUS 0x16 /* Secondary status */ 154 #define PCI_CB_PRIMARY_BUS 0x18 /* PCI bus number */ 155 #define PCI_CB_CARD_BUS 0x19 /* CardBus bus number */ 156 #define PCI_CB_SUBORDINATE_BUS 0x1a /* Subordinate bus number */ 157 #define PCI_CB_LATENCY_TIMER 0x1b /* CardBus latency timer */ 158 #define PCI_CB_MEMORY_BASE_0 0x1c 159 #define PCI_CB_MEMORY_LIMIT_0 0x20 160 #define PCI_CB_MEMORY_BASE_1 0x24 161 #define PCI_CB_MEMORY_LIMIT_1 0x28 162 #define PCI_CB_IO_BASE_0 0x2c 163 #define PCI_CB_IO_BASE_0_HI 0x2e 164 #define PCI_CB_IO_LIMIT_0 0x30 165 #define PCI_CB_IO_LIMIT_0_HI 0x32 166 #define PCI_CB_IO_BASE_1 0x34 167 #define PCI_CB_IO_BASE_1_HI 0x36 168 #define PCI_CB_IO_LIMIT_1 0x38 169 #define PCI_CB_IO_LIMIT_1_HI 0x3a 170 #define PCI_CB_IO_RANGE_MASK ~0x03 169 171 /* 0x3c-0x3d are same as for htype 0 */ 170 #define PCI_CB_BRIDGE_CONTROL 0x3e 171 #define PCI_CB_BRIDGE_CTL_PARITY 0x01 /* Similar to standard bridge control register */ 172 #define PCI_CB_BRIDGE_CTL_SERR 0x02 173 #define PCI_CB_BRIDGE_CTL_ISA 0x04 174 #define PCI_CB_BRIDGE_CTL_VGA 0x08 175 #define PCI_CB_BRIDGE_CTL_MASTER_ABORT 0x20 176 #define PCI_CB_BRIDGE_CTL_CB_RESET 0x40 /* CardBus reset */ 177 #define PCI_CB_BRIDGE_CTL_16BIT_INT 0x80 /* Enable interrupt for 16-bit cards */ 178 #define PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 0x100 /* Prefetch enable for both memory regions */ 179 #define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200 180 #define PCI_CB_BRIDGE_CTL_POST_WRITES 0x400 181 #define PCI_CB_SUBSYSTEM_VENDOR_ID 0x40 182 #define PCI_CB_SUBSYSTEM_ID 0x42 183 #define PCI_CB_LEGACY_MODE_BASE 0x44 /* 16-bit PC Card legacy mode base address (ExCa) */ 172 173 #define PCI_CB_BRIDGE_CONTROL 0x3e 174 #define PCI_CB_BRIDGE_CTL_PARITY 0x01 /* Similar to standard bridge */ 175 /* control register */ 176 #define PCI_CB_BRIDGE_CTL_SERR 0x02 177 #define PCI_CB_BRIDGE_CTL_ISA 0x04 178 #define PCI_CB_BRIDGE_CTL_VGA 0x08 179 #define PCI_CB_BRIDGE_CTL_MASTER_ABORT 0x20 180 #define PCI_CB_BRIDGE_CTL_CB_RESET 0x40 /* CardBus reset */ 181 #define PCI_CB_BRIDGE_CTL_16BIT_INT 0x80 /* Enable interrupt for */ 182 /* 16-bit cards */ 183 #define PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 0x100 /* Prefetch enable for */ 184 /* both memory regions */ 185 #define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200 186 #define PCI_CB_BRIDGE_CTL_POST_WRITES 0x400 187 188 #define PCI_CB_SUBSYSTEM_VENDOR_ID 0x40 189 #define PCI_CB_SUBSYSTEM_ID 0x42 190 191 /* 16-bit PC Card legacy mode base address (ExCa) */ 192 #define PCI_CB_LEGACY_MODE_BASE 0x44 193 184 194 /* 0x48-0x7f reserved */ 185 195 186 196 /* Device classes and subclasses */ 187 197 188 #define PCI_CLASS_NOT_DEFINED 189 #define PCI_CLASS_NOT_DEFINED_VGA 190 191 #define PCI_BASE_CLASS_STORAGE 192 #define PCI_CLASS_STORAGE_SCSI 193 #define PCI_CLASS_STORAGE_IDE 194 #define PCI_CLASS_STORAGE_FLOPPY 195 #define PCI_CLASS_STORAGE_IPI 196 #define PCI_CLASS_STORAGE_RAID 197 #define PCI_CLASS_STORAGE_OTHER 198 199 #define PCI_BASE_CLASS_NETWORK 200 #define PCI_CLASS_NETWORK_ETHERNET 201 #define PCI_CLASS_NETWORK_TOKEN_RING 202 #define PCI_CLASS_NETWORK_FDDI 203 #define PCI_CLASS_NETWORK_ATM 204 #define PCI_CLASS_NETWORK_OTHER 205 206 #define PCI_BASE_CLASS_DISPLAY 207 #define PCI_CLASS_DISPLAY_VGA 208 #define PCI_CLASS_DISPLAY_XGA 209 #define PCI_CLASS_DISPLAY_OTHER 210 211 #define PCI_BASE_CLASS_MULTIMEDIA 212 #define PCI_CLASS_MULTIMEDIA_VIDEO 213 #define PCI_CLASS_MULTIMEDIA_AUDIO 214 #define PCI_CLASS_MULTIMEDIA_OTHER 215 216 #define PCI_BASE_CLASS_MEMORY 217 #define PCI_CLASS_MEMORY_RAM0x0500218 #define PCI_CLASS_MEMORY_FLASH0x0501219 #define PCI_CLASS_MEMORY_OTHER0x0580220 221 #define PCI_BASE_CLASS_BRIDGE 222 #define PCI_CLASS_BRIDGE_HOST0x0600223 #define PCI_CLASS_BRIDGE_ISA0x0601224 #define PCI_CLASS_BRIDGE_EISA0x0602225 #define PCI_CLASS_BRIDGE_MC0x0603226 #define PCI_CLASS_BRIDGE_PCI0x0604227 #define PCI_CLASS_BRIDGE_PCMCIA0x0605228 #define PCI_CLASS_BRIDGE_NUBUS0x0606229 #define PCI_CLASS_BRIDGE_CARDBUS0x0607230 #define PCI_CLASS_BRIDGE_OTHER0x0680231 232 #define PCI_BASE_CLASS_COMMUNICATION 233 #define PCI_CLASS_COMMUNICATION_SERIAL 198 #define PCI_CLASS_NOT_DEFINED 0x0000 199 #define PCI_CLASS_NOT_DEFINED_VGA 0x0001 200 201 #define PCI_BASE_CLASS_STORAGE 0x01 202 #define PCI_CLASS_STORAGE_SCSI 0x0100 203 #define PCI_CLASS_STORAGE_IDE 0x0101 204 #define PCI_CLASS_STORAGE_FLOPPY 0x0102 205 #define PCI_CLASS_STORAGE_IPI 0x0103 206 #define PCI_CLASS_STORAGE_RAID 0x0104 207 #define PCI_CLASS_STORAGE_OTHER 0x0180 208 209 #define PCI_BASE_CLASS_NETWORK 0x02 210 #define PCI_CLASS_NETWORK_ETHERNET 0x0200 211 #define PCI_CLASS_NETWORK_TOKEN_RING 0x0201 212 #define PCI_CLASS_NETWORK_FDDI 0x0202 213 #define PCI_CLASS_NETWORK_ATM 0x0203 214 #define PCI_CLASS_NETWORK_OTHER 0x0280 215 216 #define PCI_BASE_CLASS_DISPLAY 0x03 217 #define PCI_CLASS_DISPLAY_VGA 0x0300 218 #define PCI_CLASS_DISPLAY_XGA 0x0301 219 #define PCI_CLASS_DISPLAY_OTHER 0x0380 220 221 #define PCI_BASE_CLASS_MULTIMEDIA 0x04 222 #define PCI_CLASS_MULTIMEDIA_VIDEO 0x0400 223 #define PCI_CLASS_MULTIMEDIA_AUDIO 0x0401 224 #define PCI_CLASS_MULTIMEDIA_OTHER 0x0480 225 226 #define PCI_BASE_CLASS_MEMORY 0x05 227 #define PCI_CLASS_MEMORY_RAM 0x0500 228 #define PCI_CLASS_MEMORY_FLASH 0x0501 229 #define PCI_CLASS_MEMORY_OTHER 0x0580 230 231 #define PCI_BASE_CLASS_BRIDGE 0x06 232 #define PCI_CLASS_BRIDGE_HOST 0x0600 233 #define PCI_CLASS_BRIDGE_ISA 0x0601 234 #define PCI_CLASS_BRIDGE_EISA 0x0602 235 #define PCI_CLASS_BRIDGE_MC 0x0603 236 #define PCI_CLASS_BRIDGE_PCI 0x0604 237 #define PCI_CLASS_BRIDGE_PCMCIA 0x0605 238 #define PCI_CLASS_BRIDGE_NUBUS 0x0606 239 #define PCI_CLASS_BRIDGE_CARDBUS 0x0607 240 #define PCI_CLASS_BRIDGE_OTHER 0x0680 241 242 #define PCI_BASE_CLASS_COMMUNICATION 0x07 243 #define PCI_CLASS_COMMUNICATION_SERIAL 0x0700 234 244 #define PCI_CLASS_COMMUNICATION_PARALLEL 0x0701 235 #define PCI_CLASS_COMMUNICATION_OTHER 236 237 #define PCI_BASE_CLASS_SYSTEM 238 #define PCI_CLASS_SYSTEM_PIC 239 #define PCI_CLASS_SYSTEM_DMA 240 #define PCI_CLASS_SYSTEM_TIMER 241 #define PCI_CLASS_SYSTEM_RTC 242 #define PCI_CLASS_SYSTEM_OTHER 243 244 #define PCI_BASE_CLASS_INPUT 245 #define PCI_CLASS_INPUT_KEYBOARD 246 #define PCI_CLASS_INPUT_PEN 247 #define PCI_CLASS_INPUT_MOUSE 248 #define PCI_CLASS_INPUT_OTHER 249 250 #define PCI_BASE_CLASS_DOCKING 251 #define PCI_CLASS_DOCKING_GENERIC 252 #define PCI_CLASS_DOCKING_OTHER 253 254 #define PCI_BASE_CLASS_PROCESSOR 255 #define PCI_CLASS_PROCESSOR_386 256 #define PCI_CLASS_PROCESSOR_486 257 #define PCI_CLASS_PROCESSOR_PENTIUM 258 #define PCI_CLASS_PROCESSOR_ALPHA 259 #define PCI_CLASS_PROCESSOR_POWERPC 260 #define PCI_CLASS_PROCESSOR_CO 261 262 #define PCI_BASE_CLASS_SERIAL 263 #define PCI_CLASS_SERIAL_FIREWIRE 264 #define PCI_CLASS_SERIAL_ACCESS 265 #define PCI_CLASS_SERIAL_SSA 266 #define PCI_CLASS_SERIAL_USB 267 #define PCI_CLASS_SERIAL_FIBER 268 269 #define PCI_CLASS_OTHERS 245 #define PCI_CLASS_COMMUNICATION_OTHER 0x0780 246 247 #define PCI_BASE_CLASS_SYSTEM 0x08 248 #define PCI_CLASS_SYSTEM_PIC 0x0800 249 #define PCI_CLASS_SYSTEM_DMA 0x0801 250 #define PCI_CLASS_SYSTEM_TIMER 0x0802 251 #define PCI_CLASS_SYSTEM_RTC 0x0803 252 #define PCI_CLASS_SYSTEM_OTHER 0x0880 253 254 #define PCI_BASE_CLASS_INPUT 0x09 255 #define PCI_CLASS_INPUT_KEYBOARD 0x0900 256 #define PCI_CLASS_INPUT_PEN 0x0901 257 #define PCI_CLASS_INPUT_MOUSE 0x0902 258 #define PCI_CLASS_INPUT_OTHER 0x0980 259 260 #define PCI_BASE_CLASS_DOCKING 0x0a 261 #define PCI_CLASS_DOCKING_GENERIC 0x0a00 262 #define PCI_CLASS_DOCKING_OTHER 0x0a01 263 264 #define PCI_BASE_CLASS_PROCESSOR 0x0b 265 #define PCI_CLASS_PROCESSOR_386 0x0b00 266 #define PCI_CLASS_PROCESSOR_486 0x0b01 267 #define PCI_CLASS_PROCESSOR_PENTIUM 0x0b02 268 #define PCI_CLASS_PROCESSOR_ALPHA 0x0b10 269 #define PCI_CLASS_PROCESSOR_POWERPC 0x0b20 270 #define PCI_CLASS_PROCESSOR_CO 0x0b40 271 272 #define PCI_BASE_CLASS_SERIAL 0x0c 273 #define PCI_CLASS_SERIAL_FIREWIRE 0x0c00 274 #define PCI_CLASS_SERIAL_ACCESS 0x0c01 275 #define PCI_CLASS_SERIAL_SSA 0x0c02 276 #define PCI_CLASS_SERIAL_USB 0x0c03 277 #define PCI_CLASS_SERIAL_FIBER 0x0c04 278 279 #define PCI_CLASS_OTHERS 0xff 270 280 271 281 /* … … 274 284 * <linux-pcisupport@cck.uni-kl.de>. 275 285 */ 276 #define PCI_VENDOR_ID_COMPAQ 0x0e11 277 #define PCI_DEVICE_ID_COMPAQ_1280 0x3033 278 #define PCI_DEVICE_ID_COMPAQ_TRIFLEX 0x4000 279 #define PCI_DEVICE_ID_COMPAQ_SMART2P 0xae10 280 #define PCI_DEVICE_ID_COMPAQ_NETEL100 0xae32 281 #define PCI_DEVICE_ID_COMPAQ_NETEL10 0xae34 282 #define PCI_DEVICE_ID_COMPAQ_NETFLEX3I 0xae35 283 #define PCI_DEVICE_ID_COMPAQ_NETEL100D 0xae40 284 #define PCI_DEVICE_ID_COMPAQ_NETEL100PI 0xae43 285 #define PCI_DEVICE_ID_COMPAQ_NETEL100I 0xb011 286 #define PCI_DEVICE_ID_COMPAQ_THUNDER 0xf130 287 #define PCI_DEVICE_ID_COMPAQ_NETFLEX3B 0xf150 288 289 #define PCI_VENDOR_ID_NCR 0x1000 290 #define PCI_DEVICE_ID_NCR_53C810 0x0001 291 #define PCI_DEVICE_ID_NCR_53C820 0x0002 292 #define PCI_DEVICE_ID_NCR_53C825 0x0003 293 #define PCI_DEVICE_ID_NCR_53C815 0x0004 294 #define PCI_DEVICE_ID_NCR_53C860 0x0006 295 #define PCI_DEVICE_ID_NCR_53C896 0x000b 296 #define PCI_DEVICE_ID_NCR_53C895 0x000c 297 #define PCI_DEVICE_ID_NCR_53C885 0x000d 298 #define PCI_DEVICE_ID_NCR_53C875 0x000f 299 #define PCI_DEVICE_ID_NCR_53C875J 0x008f 300 301 #define PCI_VENDOR_ID_ATI 0x1002 302 #define PCI_DEVICE_ID_ATI_68800 0x4158 303 #define PCI_DEVICE_ID_ATI_215CT222 0x4354 304 #define PCI_DEVICE_ID_ATI_210888CX 0x4358 305 #define PCI_DEVICE_ID_ATI_215GB 0x4742 306 #define PCI_DEVICE_ID_ATI_215GD 0x4744 307 #define PCI_DEVICE_ID_ATI_215GI 0x4749 308 #define PCI_DEVICE_ID_ATI_215GP 0x4750 309 #define PCI_DEVICE_ID_ATI_215GQ 0x4751 310 #define PCI_DEVICE_ID_ATI_215GT 0x4754 311 #define PCI_DEVICE_ID_ATI_215GTB 0x4755 312 #define PCI_DEVICE_ID_ATI_210888GX 0x4758 313 #define PCI_DEVICE_ID_ATI_215LG 0x4c47 314 #define PCI_DEVICE_ID_ATI_264LT 0x4c54 315 #define PCI_DEVICE_ID_ATI_264VT 0x5654 316 317 #define PCI_VENDOR_ID_VLSI 0x1004 318 #define PCI_DEVICE_ID_VLSI_82C592 0x0005 319 #define PCI_DEVICE_ID_VLSI_82C593 0x0006 320 #define PCI_DEVICE_ID_VLSI_82C594 0x0007 321 #define PCI_DEVICE_ID_VLSI_82C597 0x0009 322 #define PCI_DEVICE_ID_VLSI_82C541 0x000c 323 #define PCI_DEVICE_ID_VLSI_82C543 0x000d 324 #define PCI_DEVICE_ID_VLSI_82C532 0x0101 325 #define PCI_DEVICE_ID_VLSI_82C534 0x0102 326 #define PCI_DEVICE_ID_VLSI_82C535 0x0104 327 #define PCI_DEVICE_ID_VLSI_82C147 0x0105 328 #define PCI_DEVICE_ID_VLSI_VAS96011 0x0702 329 330 #define PCI_VENDOR_ID_ADL 0x1005 331 #define PCI_DEVICE_ID_ADL_2301 0x2301 332 333 #define PCI_VENDOR_ID_NS 0x100b 334 #define PCI_DEVICE_ID_NS_87415 0x0002 335 #define PCI_DEVICE_ID_NS_87410 0xd001 336 337 #define PCI_VENDOR_ID_TSENG 0x100c 338 #define PCI_DEVICE_ID_TSENG_W32P_2 0x3202 339 #define PCI_DEVICE_ID_TSENG_W32P_b 0x3205 340 #define PCI_DEVICE_ID_TSENG_W32P_c 0x3206 341 #define PCI_DEVICE_ID_TSENG_W32P_d 0x3207 342 #define PCI_DEVICE_ID_TSENG_ET6000 0x3208 343 344 #define PCI_VENDOR_ID_WEITEK 0x100e 345 #define PCI_DEVICE_ID_WEITEK_P9000 0x9001 346 #define PCI_DEVICE_ID_WEITEK_P9100 0x9100 347 348 #define PCI_VENDOR_ID_DEC 0x1011 349 #define PCI_DEVICE_ID_DEC_BRD 0x0001 350 #define PCI_DEVICE_ID_DEC_TULIP 0x0002 351 #define PCI_DEVICE_ID_DEC_TGA 0x0004 352 #define PCI_DEVICE_ID_DEC_TULIP_FAST 0x0009 353 #define PCI_DEVICE_ID_DEC_TGA2 0x000D 354 #define PCI_DEVICE_ID_DEC_FDDI 0x000F 355 #define PCI_DEVICE_ID_DEC_TULIP_PLUS 0x0014 356 #define PCI_DEVICE_ID_DEC_21142 0x0019 357 #define PCI_DEVICE_ID_DEC_21052 0x0021 358 #define PCI_DEVICE_ID_DEC_21150 0x0022 359 #define PCI_DEVICE_ID_DEC_21152 0x0024 360 361 #define PCI_VENDOR_ID_CIRRUS 0x1013 362 #define PCI_DEVICE_ID_CIRRUS_7548 0x0038 363 #define PCI_DEVICE_ID_CIRRUS_5430 0x00a0 364 #define PCI_DEVICE_ID_CIRRUS_5434_4 0x00a4 365 #define PCI_DEVICE_ID_CIRRUS_5434_8 0x00a8 366 #define PCI_DEVICE_ID_CIRRUS_5436 0x00ac 367 #define PCI_DEVICE_ID_CIRRUS_5446 0x00b8 368 #define PCI_DEVICE_ID_CIRRUS_5480 0x00bc 369 #define PCI_DEVICE_ID_CIRRUS_5464 0x00d4 370 #define PCI_DEVICE_ID_CIRRUS_5465 0x00d6 371 #define PCI_DEVICE_ID_CIRRUS_6729 0x1100 372 #define PCI_DEVICE_ID_CIRRUS_6832 0x1110 373 #define PCI_DEVICE_ID_CIRRUS_7542 0x1200 374 #define PCI_DEVICE_ID_CIRRUS_7543 0x1202 375 #define PCI_DEVICE_ID_CIRRUS_7541 0x1204 376 377 #define PCI_VENDOR_ID_IBM 0x1014 378 #define PCI_DEVICE_ID_IBM_FIRE_CORAL 0x000a 379 #define PCI_DEVICE_ID_IBM_TR 0x0018 380 #define PCI_DEVICE_ID_IBM_82G2675 0x001d 381 #define PCI_DEVICE_ID_IBM_MCA 0x0020 382 #define PCI_DEVICE_ID_IBM_82351 0x0022 383 #define PCI_DEVICE_ID_IBM_SERVERAID 0x002e 384 #define PCI_DEVICE_ID_IBM_TR_WAKE 0x003e 385 #define PCI_DEVICE_ID_IBM_MPIC 0x0046 386 #define PCI_DEVICE_ID_IBM_3780IDSP 0x007d 387 #define PCI_DEVICE_ID_IBM_MPIC_2 0xffff 388 389 #define PCI_VENDOR_ID_WD 0x101c 390 #define PCI_DEVICE_ID_WD_7197 0x3296 391 392 #define PCI_VENDOR_ID_AMD 0x1022 393 #define PCI_DEVICE_ID_AMD_LANCE 0x2000 394 #define PCI_DEVICE_ID_AMD_SCSI 0x2020 395 396 #define PCI_VENDOR_ID_TRIDENT 0x1023 397 #define PCI_DEVICE_ID_TRIDENT_9397 0x9397 398 #define PCI_DEVICE_ID_TRIDENT_9420 0x9420 399 #define PCI_DEVICE_ID_TRIDENT_9440 0x9440 400 #define PCI_DEVICE_ID_TRIDENT_9660 0x9660 401 #define PCI_DEVICE_ID_TRIDENT_9750 0x9750 402 403 #define PCI_VENDOR_ID_AI 0x1025 404 #define PCI_DEVICE_ID_AI_M1435 0x1435 405 406 #define PCI_VENDOR_ID_MATROX 0x102B 407 #define PCI_DEVICE_ID_MATROX_MGA_2 0x0518 408 #define PCI_DEVICE_ID_MATROX_MIL 0x0519 409 #define PCI_DEVICE_ID_MATROX_MYS 0x051A 410 #define PCI_DEVICE_ID_MATROX_MIL_2 0x051b 411 #define PCI_DEVICE_ID_MATROX_MIL_2_AGP 0x051f 412 #define PCI_DEVICE_ID_MATROX_MGA_IMP 0x0d10 413 414 #define PCI_VENDOR_ID_CT 0x102c 415 #define PCI_DEVICE_ID_CT_65545 0x00d8 416 #define PCI_DEVICE_ID_CT_65548 0x00dc 417 #define PCI_DEVICE_ID_CT_65550 0x00e0 418 #define PCI_DEVICE_ID_CT_65554 0x00e4 419 #define PCI_DEVICE_ID_CT_65555 0x00e5 420 421 #define PCI_VENDOR_ID_MIRO 0x1031 422 #define PCI_DEVICE_ID_MIRO_36050 0x5601 423 424 #define PCI_VENDOR_ID_NEC 0x1033 425 #define PCI_DEVICE_ID_NEC_PCX2 0x0046 426 427 #define PCI_VENDOR_ID_FD 0x1036 428 #define PCI_DEVICE_ID_FD_36C70 0x0000 429 430 #define PCI_VENDOR_ID_SI 0x1039 431 #define PCI_DEVICE_ID_SI_5591_AGP 0x0001 432 #define PCI_DEVICE_ID_SI_6202 0x0002 433 #define PCI_DEVICE_ID_SI_503 0x0008 434 #define PCI_DEVICE_ID_SI_ACPI 0x0009 435 #define PCI_DEVICE_ID_SI_5597_VGA 0x0200 436 #define PCI_DEVICE_ID_SI_6205 0x0205 437 #define PCI_DEVICE_ID_SI_501 0x0406 438 #define PCI_DEVICE_ID_SI_496 0x0496 439 #define PCI_DEVICE_ID_SI_601 0x0601 440 #define PCI_DEVICE_ID_SI_5107 0x5107 441 #define PCI_DEVICE_ID_SI_5511 0x5511 442 #define PCI_DEVICE_ID_SI_5513 0x5513 443 #define PCI_DEVICE_ID_SI_5571 0x5571 444 #define PCI_DEVICE_ID_SI_5591 0x5591 445 #define PCI_DEVICE_ID_SI_5597 0x5597 446 #define PCI_DEVICE_ID_SI_7001 0x7001 447 448 #define PCI_VENDOR_ID_HP 0x103c 449 #define PCI_DEVICE_ID_HP_J2585A 0x1030 450 #define PCI_DEVICE_ID_HP_J2585B 0x1031 451 452 #define PCI_VENDOR_ID_PCTECH 0x1042 453 #define PCI_DEVICE_ID_PCTECH_RZ1000 0x1000 454 #define PCI_DEVICE_ID_PCTECH_RZ1001 0x1001 455 #define PCI_DEVICE_ID_PCTECH_SAMURAI_0 0x3000 456 #define PCI_DEVICE_ID_PCTECH_SAMURAI_1 0x3010 457 #define PCI_DEVICE_ID_PCTECH_SAMURAI_IDE 0x3020 458 459 #define PCI_VENDOR_ID_DPT 0x1044 460 #define PCI_DEVICE_ID_DPT 0xa400 461 462 #define PCI_VENDOR_ID_OPTI 0x1045 463 #define PCI_DEVICE_ID_OPTI_92C178 0xc178 464 #define PCI_DEVICE_ID_OPTI_82C557 0xc557 465 #define PCI_DEVICE_ID_OPTI_82C558 0xc558 466 #define PCI_DEVICE_ID_OPTI_82C621 0xc621 467 #define PCI_DEVICE_ID_OPTI_82C700 0xc700 468 #define PCI_DEVICE_ID_OPTI_82C701 0xc701 469 #define PCI_DEVICE_ID_OPTI_82C814 0xc814 470 #define PCI_DEVICE_ID_OPTI_82C822 0xc822 471 #define PCI_DEVICE_ID_OPTI_82C825 0xd568 472 473 #define PCI_VENDOR_ID_SGS 0x104a 474 #define PCI_DEVICE_ID_SGS_2000 0x0008 475 #define PCI_DEVICE_ID_SGS_1764 0x0009 476 477 #define PCI_VENDOR_ID_BUSLOGIC 0x104B 478 #define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER_NC 0x0140 479 #define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER 0x1040 480 #define PCI_DEVICE_ID_BUSLOGIC_FLASHPOINT 0x8130 481 482 #define PCI_VENDOR_ID_TI 0x104c 483 #define PCI_DEVICE_ID_TI_TVP4010 0x3d04 484 #define PCI_DEVICE_ID_TI_TVP4020 0x3d07 485 #define PCI_DEVICE_ID_TI_PCI1130 0xac12 486 #define PCI_DEVICE_ID_TI_PCI1031 0xac13 487 #define PCI_DEVICE_ID_TI_PCI1131 0xac15 488 #define PCI_DEVICE_ID_TI_PCI1250 0xac16 489 #define PCI_DEVICE_ID_TI_PCI1220 0xac17 490 491 #define PCI_VENDOR_ID_OAK 0x104e 492 #define PCI_DEVICE_ID_OAK_OTI107 0x0107 493 494 /* Winbond have two vendor IDs! See 0x10ad as well */ 495 #define PCI_VENDOR_ID_WINBOND2 0x1050 496 #define PCI_DEVICE_ID_WINBOND2_89C940 0x0940 497 498 #define PCI_VENDOR_ID_MOTOROLA 0x1057 499 #define PCI_DEVICE_ID_MOTOROLA_MPC105 0x0001 500 #define PCI_DEVICE_ID_MOTOROLA_MPC106 0x0002 501 #define PCI_DEVICE_ID_MOTOROLA_RAVEN 0x4801 502 503 #define PCI_VENDOR_ID_PROMISE 0x105a 504 #define PCI_DEVICE_ID_PROMISE_20246 0x4d33 505 #define PCI_DEVICE_ID_PROMISE_5300 0x5300 506 507 #define PCI_VENDOR_ID_N9 0x105d 508 #define PCI_DEVICE_ID_N9_I128 0x2309 509 #define PCI_DEVICE_ID_N9_I128_2 0x2339 510 #define PCI_DEVICE_ID_N9_I128_T2R 0x493d 511 512 #define PCI_VENDOR_ID_UMC 0x1060 513 #define PCI_DEVICE_ID_UMC_UM8673F 0x0101 514 #define PCI_DEVICE_ID_UMC_UM8891A 0x0891 515 #define PCI_DEVICE_ID_UMC_UM8886BF 0x673a 516 #define PCI_DEVICE_ID_UMC_UM8886A 0x886a 517 #define PCI_DEVICE_ID_UMC_UM8881F 0x8881 518 #define PCI_DEVICE_ID_UMC_UM8886F 0x8886 519 #define PCI_DEVICE_ID_UMC_UM9017F 0x9017 520 #define PCI_DEVICE_ID_UMC_UM8886N 0xe886 521 #define PCI_DEVICE_ID_UMC_UM8891N 0xe891 522 523 #define PCI_VENDOR_ID_X 0x1061 524 #define PCI_DEVICE_ID_X_AGX016 0x0001 525 526 #define PCI_VENDOR_ID_PICOP 0x1066 527 #define PCI_DEVICE_ID_PICOP_PT86C52X 0x0001 528 #define PCI_DEVICE_ID_PICOP_PT80C524 0x8002 529 530 #define PCI_VENDOR_ID_APPLE 0x106b 531 #define PCI_DEVICE_ID_APPLE_BANDIT 0x0001 532 #define PCI_DEVICE_ID_APPLE_GC 0x0002 533 #define PCI_DEVICE_ID_APPLE_HYDRA 0x000e 534 535 #define PCI_VENDOR_ID_NEXGEN 0x1074 536 #define PCI_DEVICE_ID_NEXGEN_82C501 0x4e78 537 538 #define PCI_VENDOR_ID_QLOGIC 0x1077 539 #define PCI_DEVICE_ID_QLOGIC_ISP1020 0x1020 540 #define PCI_DEVICE_ID_QLOGIC_ISP1022 0x1022 541 542 #define PCI_VENDOR_ID_CYRIX 0x1078 543 #define PCI_DEVICE_ID_CYRIX_5510 0x0000 544 #define PCI_DEVICE_ID_CYRIX_PCI_MASTER 0x0001 545 #define PCI_DEVICE_ID_CYRIX_5520 0x0002 546 #define PCI_DEVICE_ID_CYRIX_5530_LEGACY 0x0100 547 #define PCI_DEVICE_ID_CYRIX_5530_SMI 0x0101 548 #define PCI_DEVICE_ID_CYRIX_5530_IDE 0x0102 549 #define PCI_DEVICE_ID_CYRIX_5530_AUDIO 0x0103 550 #define PCI_DEVICE_ID_CYRIX_5530_VIDEO 0x0104 551 552 #define PCI_VENDOR_ID_LEADTEK 0x107d 553 #define PCI_DEVICE_ID_LEADTEK_805 0x0000 554 555 #define PCI_VENDOR_ID_CONTAQ 0x1080 556 #define PCI_DEVICE_ID_CONTAQ_82C599 0x0600 557 #define PCI_DEVICE_ID_CONTAQ_82C693 0xc693 558 559 #define PCI_VENDOR_ID_FOREX 0x1083 560 561 #define PCI_VENDOR_ID_OLICOM 0x108d 562 #define PCI_DEVICE_ID_OLICOM_OC3136 0x0001 563 #define PCI_DEVICE_ID_OLICOM_OC2315 0x0011 564 #define PCI_DEVICE_ID_OLICOM_OC2325 0x0012 565 #define PCI_DEVICE_ID_OLICOM_OC2183 0x0013 566 #define PCI_DEVICE_ID_OLICOM_OC2326 0x0014 567 #define PCI_DEVICE_ID_OLICOM_OC6151 0x0021 568 569 #define PCI_VENDOR_ID_SUN 0x108e 570 #define PCI_DEVICE_ID_SUN_EBUS 0x1000 571 #define PCI_DEVICE_ID_SUN_HAPPYMEAL 0x1001 572 #define PCI_DEVICE_ID_SUN_SIMBA 0x5000 573 #define PCI_DEVICE_ID_SUN_PBM 0x8000 574 #define PCI_DEVICE_ID_SUN_SABRE 0xa000 575 576 #define PCI_VENDOR_ID_CMD 0x1095 577 #define PCI_DEVICE_ID_CMD_640 0x0640 578 #define PCI_DEVICE_ID_CMD_643 0x0643 579 #define PCI_DEVICE_ID_CMD_646 0x0646 580 #define PCI_DEVICE_ID_CMD_647 0x0647 581 #define PCI_DEVICE_ID_CMD_670 0x0670 582 583 #define PCI_VENDOR_ID_VISION 0x1098 584 #define PCI_DEVICE_ID_VISION_QD8500 0x0001 585 #define PCI_DEVICE_ID_VISION_QD8580 0x0002 586 587 #define PCI_VENDOR_ID_BROOKTREE 0x109e 588 #define PCI_DEVICE_ID_BROOKTREE_848 0x0350 589 #define PCI_DEVICE_ID_BROOKTREE_849A 0x0351 590 #define PCI_DEVICE_ID_BROOKTREE_8474 0x8474 591 592 #define PCI_VENDOR_ID_SIERRA 0x10a8 593 #define PCI_DEVICE_ID_SIERRA_STB 0x0000 594 595 #define PCI_VENDOR_ID_ACC 0x10aa 596 #define PCI_DEVICE_ID_ACC_2056 0x0000 597 598 #define PCI_VENDOR_ID_WINBOND 0x10ad 599 #define PCI_DEVICE_ID_WINBOND_83769 0x0001 600 #define PCI_DEVICE_ID_WINBOND_82C105 0x0105 601 #define PCI_DEVICE_ID_WINBOND_83C553 0x0565 602 603 #define PCI_VENDOR_ID_DATABOOK 0x10b3 604 #define PCI_DEVICE_ID_DATABOOK_87144 0xb106 605 606 #define PCI_VENDOR_ID_PLX 0x10b5 607 #define PCI_DEVICE_ID_PLX_9050 0x9050 608 #define PCI_DEVICE_ID_PLX_9060 0x9060 609 #define PCI_DEVICE_ID_PLX_9060ES 0x906E 610 #define PCI_DEVICE_ID_PLX_9060SD 0x906D 611 #define PCI_DEVICE_ID_PLX_9080 0x9080 612 613 #define PCI_VENDOR_ID_MADGE 0x10b6 614 #define PCI_DEVICE_ID_MADGE_MK2 0x0002 615 #define PCI_DEVICE_ID_MADGE_C155S 0x1001 616 617 #define PCI_VENDOR_ID_3COM 0x10b7 618 #define PCI_DEVICE_ID_3COM_3C339 0x3390 619 #define PCI_DEVICE_ID_3COM_3C590 0x5900 620 #define PCI_DEVICE_ID_3COM_3C595TX 0x5950 621 #define PCI_DEVICE_ID_3COM_3C595T4 0x5951 622 #define PCI_DEVICE_ID_3COM_3C595MII 0x5952 623 #define PCI_DEVICE_ID_3COM_3C900TPO 0x9000 624 #define PCI_DEVICE_ID_3COM_3C900COMBO 0x9001 625 #define PCI_DEVICE_ID_3COM_3C905TX 0x9050 626 #define PCI_DEVICE_ID_3COM_3C905T4 0x9051 627 #define PCI_DEVICE_ID_3COM_3C905B_TX 0x9055 628 629 #define PCI_VENDOR_ID_SMC 0x10b8 630 #define PCI_DEVICE_ID_SMC_EPIC100 0x0005 631 632 #define PCI_VENDOR_ID_AL 0x10b9 633 #define PCI_DEVICE_ID_AL_M1445 0x1445 634 #define PCI_DEVICE_ID_AL_M1449 0x1449 635 #define PCI_DEVICE_ID_AL_M1451 0x1451 636 #define PCI_DEVICE_ID_AL_M1461 0x1461 637 #define PCI_DEVICE_ID_AL_M1489 0x1489 638 #define PCI_DEVICE_ID_AL_M1511 0x1511 639 #define PCI_DEVICE_ID_AL_M1513 0x1513 640 #define PCI_DEVICE_ID_AL_M1521 0x1521 641 #define PCI_DEVICE_ID_AL_M1523 0x1523 642 #define PCI_DEVICE_ID_AL_M1531 0x1531 643 #define PCI_DEVICE_ID_AL_M1533 0x1533 644 #define PCI_DEVICE_ID_AL_M3307 0x3307 645 #define PCI_DEVICE_ID_AL_M4803 0x5215 646 #define PCI_DEVICE_ID_AL_M5219 0x5219 647 #define PCI_DEVICE_ID_AL_M5229 0x5229 648 #define PCI_DEVICE_ID_AL_M5237 0x5237 649 #define PCI_DEVICE_ID_AL_M7101 0x7101 650 651 #define PCI_VENDOR_ID_MITSUBISHI 0x10ba 652 653 #define PCI_VENDOR_ID_SURECOM 0x10bd 654 #define PCI_DEVICE_ID_SURECOM_NE34 0x0e34 655 656 #define PCI_VENDOR_ID_NEOMAGIC 0x10c8 657 #define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_NM2070 0x0001 658 #define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128V 0x0002 659 #define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128ZV 0x0003 660 #define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_NM2160 0x0004 661 662 #define PCI_VENDOR_ID_ASP 0x10cd 663 #define PCI_DEVICE_ID_ASP_ABP940 0x1200 664 #define PCI_DEVICE_ID_ASP_ABP940U 0x1300 665 #define PCI_DEVICE_ID_ASP_ABP940UW 0x2300 666 667 #define PCI_VENDOR_ID_MACRONIX 0x10d9 668 #define PCI_DEVICE_ID_MACRONIX_MX98713 0x0512 669 #define PCI_DEVICE_ID_MACRONIX_MX987x5 0x0531 670 671 #define PCI_VENDOR_ID_CERN 0x10dc 672 #define PCI_DEVICE_ID_CERN_SPSB_PMC 0x0001 673 #define PCI_DEVICE_ID_CERN_SPSB_PCI 0x0002 674 #define PCI_DEVICE_ID_CERN_HIPPI_DST 0x0021 675 #define PCI_DEVICE_ID_CERN_HIPPI_SRC 0x0022 676 677 #define PCI_VENDOR_ID_NVIDIA 0x10de 678 679 #define PCI_VENDOR_ID_IMS 0x10e0 680 #define PCI_DEVICE_ID_IMS_8849 0x8849 681 682 #define PCI_VENDOR_ID_TEKRAM2 0x10e1 683 #define PCI_DEVICE_ID_TEKRAM2_690c 0x690c 684 685 #define PCI_VENDOR_ID_TUNDRA 0x10e3 686 #define PCI_DEVICE_ID_TUNDRA_CA91C042 0x0000 687 688 #define PCI_VENDOR_ID_AMCC 0x10e8 689 #define PCI_DEVICE_ID_AMCC_MYRINET 0x8043 690 #define PCI_DEVICE_ID_AMCC_PARASTATION 0x8062 691 #define PCI_DEVICE_ID_AMCC_S5933 0x807d 692 #define PCI_DEVICE_ID_AMCC_S5933_HEPC3 0x809c 693 694 #define PCI_VENDOR_ID_INTERG 0x10ea 695 #define PCI_DEVICE_ID_INTERG_1680 0x1680 696 #define PCI_DEVICE_ID_INTERG_1682 0x1682 697 698 #define PCI_VENDOR_ID_REALTEK 0x10ec 699 #define PCI_DEVICE_ID_REALTEK_8029 0x8029 700 #define PCI_DEVICE_ID_REALTEK_8129 0x8129 701 #define PCI_DEVICE_ID_REALTEK_8139 0x8139 702 703 #define PCI_VENDOR_ID_TRUEVISION 0x10fa 704 #define PCI_DEVICE_ID_TRUEVISION_T1000 0x000c 705 706 #define PCI_VENDOR_ID_INIT 0x1101 707 #define PCI_DEVICE_ID_INIT_320P 0x9100 708 #define PCI_DEVICE_ID_INIT_360P 0x9500 709 710 #define PCI_VENDOR_ID_TTI 0x1103 711 #define PCI_DEVICE_ID_TTI_HPT343 0x0003 712 713 #define PCI_VENDOR_ID_VIA 0x1106 714 #define PCI_DEVICE_ID_VIA_82C505 0x0505 715 #define PCI_DEVICE_ID_VIA_82C561 0x0561 716 #define PCI_DEVICE_ID_VIA_82C586_1 0x0571 717 #define PCI_DEVICE_ID_VIA_82C576 0x0576 718 #define PCI_DEVICE_ID_VIA_82C585 0x0585 719 #define PCI_DEVICE_ID_VIA_82C586_0 0x0586 720 #define PCI_DEVICE_ID_VIA_82C595 0x0595 721 #define PCI_DEVICE_ID_VIA_82C597_0 0x0597 722 #define PCI_DEVICE_ID_VIA_82C926 0x0926 723 #define PCI_DEVICE_ID_VIA_82C416 0x1571 724 #define PCI_DEVICE_ID_VIA_82C595_97 0x1595 725 #define PCI_DEVICE_ID_VIA_82C586_2 0x3038 726 #define PCI_DEVICE_ID_VIA_82C586_3 0x3040 727 #define PCI_DEVICE_ID_VIA_86C100A 0x6100 728 #define PCI_DEVICE_ID_VIA_82C597_1 0x8597 729 730 #define PCI_VENDOR_ID_VORTEX 0x1119 731 #define PCI_DEVICE_ID_VORTEX_GDT60x0 0x0000 732 #define PCI_DEVICE_ID_VORTEX_GDT6000B 0x0001 733 #define PCI_DEVICE_ID_VORTEX_GDT6x10 0x0002 734 #define PCI_DEVICE_ID_VORTEX_GDT6x20 0x0003 735 #define PCI_DEVICE_ID_VORTEX_GDT6530 0x0004 736 #define PCI_DEVICE_ID_VORTEX_GDT6550 0x0005 737 #define PCI_DEVICE_ID_VORTEX_GDT6x17 0x0006 738 #define PCI_DEVICE_ID_VORTEX_GDT6x27 0x0007 739 #define PCI_DEVICE_ID_VORTEX_GDT6537 0x0008 740 #define PCI_DEVICE_ID_VORTEX_GDT6557 0x0009 741 #define PCI_DEVICE_ID_VORTEX_GDT6x15 0x000a 742 #define PCI_DEVICE_ID_VORTEX_GDT6x25 0x000b 743 #define PCI_DEVICE_ID_VORTEX_GDT6535 0x000c 744 #define PCI_DEVICE_ID_VORTEX_GDT6555 0x000d 745 #define PCI_DEVICE_ID_VORTEX_GDT6x17RP 0x0100 746 #define PCI_DEVICE_ID_VORTEX_GDT6x27RP 0x0101 747 #define PCI_DEVICE_ID_VORTEX_GDT6537RP 0x0102 748 #define PCI_DEVICE_ID_VORTEX_GDT6557RP 0x0103 749 #define PCI_DEVICE_ID_VORTEX_GDT6x11RP 0x0104 750 #define PCI_DEVICE_ID_VORTEX_GDT6x21RP 0x0105 751 #define PCI_DEVICE_ID_VORTEX_GDT6x17RP1 0x0110 752 #define PCI_DEVICE_ID_VORTEX_GDT6x27RP1 0x0111 753 #define PCI_DEVICE_ID_VORTEX_GDT6537RP1 0x0112 754 #define PCI_DEVICE_ID_VORTEX_GDT6557RP1 0x0113 755 #define PCI_DEVICE_ID_VORTEX_GDT6x11RP1 0x0114 756 #define PCI_DEVICE_ID_VORTEX_GDT6x21RP1 0x0115 757 #define PCI_DEVICE_ID_VORTEX_GDT6x17RP2 0x0120 758 #define PCI_DEVICE_ID_VORTEX_GDT6x27RP2 0x0121 759 #define PCI_DEVICE_ID_VORTEX_GDT6537RP2 0x0122 760 #define PCI_DEVICE_ID_VORTEX_GDT6557RP2 0x0123 761 #define PCI_DEVICE_ID_VORTEX_GDT6x11RP2 0x0124 762 #define PCI_DEVICE_ID_VORTEX_GDT6x21RP2 0x0125 763 764 #define PCI_VENDOR_ID_EF 0x111a 765 #define PCI_DEVICE_ID_EF_ATM_FPGA 0x0000 766 #define PCI_DEVICE_ID_EF_ATM_ASIC 0x0002 767 768 #define PCI_VENDOR_ID_FORE 0x1127 769 #define PCI_DEVICE_ID_FORE_PCA200PC 0x0210 770 #define PCI_DEVICE_ID_FORE_PCA200E 0x0300 771 772 #define PCI_VENDOR_ID_IMAGINGTECH 0x112f 773 #define PCI_DEVICE_ID_IMAGINGTECH_ICPCI 0x0000 774 775 #define PCI_VENDOR_ID_PHILIPS 0x1131 776 #define PCI_DEVICE_ID_PHILIPS_SAA7145 0x7145 777 #define PCI_DEVICE_ID_PHILIPS_SAA7146 0x7146 778 779 #define PCI_VENDOR_ID_CYCLONE 0x113c 780 #define PCI_DEVICE_ID_CYCLONE_SDK 0x0001 781 782 #define PCI_VENDOR_ID_ALLIANCE 0x1142 783 #define PCI_DEVICE_ID_ALLIANCE_PROMOTIO 0x3210 784 #define PCI_DEVICE_ID_ALLIANCE_PROVIDEO 0x6422 785 #define PCI_DEVICE_ID_ALLIANCE_AT24 0x6424 786 #define PCI_DEVICE_ID_ALLIANCE_AT3D 0x643d 787 788 #define PCI_VENDOR_ID_SK 0x1148 789 #define PCI_DEVICE_ID_SK_FP 0x4000 790 #define PCI_DEVICE_ID_SK_TR 0x4200 791 #define PCI_DEVICE_ID_SK_GE 0x4300 792 793 #define PCI_VENDOR_ID_VMIC 0x114a 794 #define PCI_DEVICE_ID_VMIC_VME 0x7587 795 796 #define PCI_VENDOR_ID_DIGI 0x114f 797 #define PCI_DEVICE_ID_DIGI_EPC 0x0002 798 #define PCI_DEVICE_ID_DIGI_RIGHTSWITCH 0x0003 799 #define PCI_DEVICE_ID_DIGI_XEM 0x0004 800 #define PCI_DEVICE_ID_DIGI_XR 0x0005 801 #define PCI_DEVICE_ID_DIGI_CX 0x0006 802 #define PCI_DEVICE_ID_DIGI_XRJ 0x0009 803 #define PCI_DEVICE_ID_DIGI_EPCJ 0x000a 804 #define PCI_DEVICE_ID_DIGI_XR_920 0x0027 805 806 #define PCI_VENDOR_ID_MUTECH 0x1159 807 #define PCI_DEVICE_ID_MUTECH_MV1000 0x0001 808 809 #define PCI_VENDOR_ID_RENDITION 0x1163 810 #define PCI_DEVICE_ID_RENDITION_VERITE 0x0001 811 #define PCI_DEVICE_ID_RENDITION_VERITE2100 0x2000 812 813 #define PCI_VENDOR_ID_TOSHIBA 0x1179 814 #define PCI_DEVICE_ID_TOSHIBA_601 0x0601 815 #define PCI_DEVICE_ID_TOSHIBA_TOPIC95 0x060a 816 #define PCI_DEVICE_ID_TOSHIBA_TOPIC97 0x060f 817 818 #define PCI_VENDOR_ID_RICOH 0x1180 819 #define PCI_DEVICE_ID_RICOH_RL5C465 0x0465 820 #define PCI_DEVICE_ID_RICOH_RL5C466 0x0466 821 #define PCI_DEVICE_ID_RICOH_RL5C475 0x0475 822 #define PCI_DEVICE_ID_RICOH_RL5C478 0x0478 823 824 #define PCI_VENDOR_ID_ARTOP 0x1191 825 #define PCI_DEVICE_ID_ARTOP_ATP8400 0x0004 826 #define PCI_DEVICE_ID_ARTOP_ATP850UF 0x0005 827 828 #define PCI_VENDOR_ID_ZEITNET 0x1193 829 #define PCI_DEVICE_ID_ZEITNET_1221 0x0001 830 #define PCI_DEVICE_ID_ZEITNET_1225 0x0002 831 832 #define PCI_VENDOR_ID_OMEGA 0x119b 833 #define PCI_DEVICE_ID_OMEGA_82C092G 0x1221 834 835 #define PCI_VENDOR_ID_LITEON 0x11ad 836 #define PCI_DEVICE_ID_LITEON_LNE100TX 0x0002 837 838 #define PCI_VENDOR_ID_NP 0x11bc 839 #define PCI_DEVICE_ID_NP_PCI_FDDI 0x0001 840 841 #define PCI_VENDOR_ID_ATT 0x11c1 842 #define PCI_DEVICE_ID_ATT_L56XMF 0x0440 843 844 #define PCI_VENDOR_ID_SPECIALIX 0x11cb 845 #define PCI_DEVICE_ID_SPECIALIX_IO8 0x2000 846 #define PCI_DEVICE_ID_SPECIALIX_XIO 0x4000 847 #define PCI_DEVICE_ID_SPECIALIX_RIO 0x8000 848 849 #define PCI_VENDOR_ID_AURAVISION 0x11d1 850 #define PCI_DEVICE_ID_AURAVISION_VXP524 0x01f7 851 852 #define PCI_VENDOR_ID_IKON 0x11d5 853 #define PCI_DEVICE_ID_IKON_10115 0x0115 854 #define PCI_DEVICE_ID_IKON_10117 0x0117 855 856 #define PCI_VENDOR_ID_ZORAN 0x11de 857 #define PCI_DEVICE_ID_ZORAN_36057 0x6057 858 #define PCI_DEVICE_ID_ZORAN_36120 0x6120 859 860 #define PCI_VENDOR_ID_KINETIC 0x11f4 861 #define PCI_DEVICE_ID_KINETIC_2915 0x2915 862 863 #define PCI_VENDOR_ID_COMPEX 0x11f6 864 #define PCI_DEVICE_ID_COMPEX_ENET100VG4 0x0112 865 #define PCI_DEVICE_ID_COMPEX_RL2000 0x1401 866 867 #define PCI_VENDOR_ID_RP 0x11fe 868 #define PCI_DEVICE_ID_RP32INTF 0x0001 869 #define PCI_DEVICE_ID_RP8INTF 0x0002 870 #define PCI_DEVICE_ID_RP16INTF 0x0003 871 #define PCI_DEVICE_ID_RP4QUAD 0x0004 872 #define PCI_DEVICE_ID_RP8OCTA 0x0005 873 #define PCI_DEVICE_ID_RP8J 0x0006 874 #define PCI_DEVICE_ID_RPP4 0x000A 875 #define PCI_DEVICE_ID_RPP8 0x000B 876 #define PCI_DEVICE_ID_RP8M 0x000C 877 878 #define PCI_VENDOR_ID_CYCLADES 0x120e 879 #define PCI_DEVICE_ID_CYCLOM_Y_Lo 0x0100 880 #define PCI_DEVICE_ID_CYCLOM_Y_Hi 0x0101 881 #define PCI_DEVICE_ID_CYCLOM_Z_Lo 0x0200 882 #define PCI_DEVICE_ID_CYCLOM_Z_Hi 0x0201 883 884 #define PCI_VENDOR_ID_ESSENTIAL 0x120f 885 #define PCI_DEVICE_ID_ESSENTIAL_ROADRUNNER 0x0001 886 887 #define PCI_VENDOR_ID_O2 0x1217 888 #define PCI_DEVICE_ID_O2_6729 0x6729 889 #define PCI_DEVICE_ID_O2_6730 0x673a 890 #define PCI_DEVICE_ID_O2_6832 0x6832 891 #define PCI_DEVICE_ID_O2_6836 0x6836 892 893 #define PCI_VENDOR_ID_3DFX 0x121a 894 #define PCI_DEVICE_ID_3DFX_VOODOO 0x0001 895 #define PCI_DEVICE_ID_3DFX_VOODOO2 0x0002 896 897 #define PCI_VENDOR_ID_SIGMADES 0x1236 898 #define PCI_DEVICE_ID_SIGMADES_6425 0x6401 899 900 #define PCI_VENDOR_ID_CCUBE 0x123f 901 902 #define PCI_VENDOR_ID_DIPIX 0x1246 903 904 #define PCI_VENDOR_ID_STALLION 0x124d 905 #define PCI_DEVICE_ID_STALLION_ECHPCI832 0x0000 906 #define PCI_DEVICE_ID_STALLION_ECHPCI864 0x0002 907 #define PCI_DEVICE_ID_STALLION_EIOPCI 0x0003 908 909 #define PCI_VENDOR_ID_OPTIBASE 0x1255 910 #define PCI_DEVICE_ID_OPTIBASE_FORGE 0x1110 911 #define PCI_DEVICE_ID_OPTIBASE_FUSION 0x1210 912 #define PCI_DEVICE_ID_OPTIBASE_VPLEX 0x2110 913 #define PCI_DEVICE_ID_OPTIBASE_VPLEXCC 0x2120 914 #define PCI_DEVICE_ID_OPTIBASE_VQUEST 0x2130 915 916 #define PCI_VENDOR_ID_SATSAGEM 0x1267 917 #define PCI_DEVICE_ID_SATSAGEM_PCR2101 0x5352 918 #define PCI_DEVICE_ID_SATSAGEM_TELSATTURBO 0x5a4b 919 920 #define PCI_VENDOR_ID_HUGHES 0x1273 921 #define PCI_DEVICE_ID_HUGHES_DIRECPC 0x0002 922 923 #define PCI_VENDOR_ID_ENSONIQ 0x1274 924 #define PCI_DEVICE_ID_ENSONIQ_AUDIOPCI 0x5000 925 926 #define PCI_VENDOR_ID_ALTEON 0x12ae 927 #define PCI_DEVICE_ID_ALTEON_ACENIC 0x0001 928 929 #define PCI_VENDOR_ID_PICTUREL 0x12c5 930 #define PCI_DEVICE_ID_PICTUREL_PCIVST 0x0081 931 932 #define PCI_VENDOR_ID_NVIDIA_SGS 0x12d2 933 #define PCI_DEVICE_ID_NVIDIA_SGS_RIVA128 0x0018 934 935 #define PCI_VENDOR_ID_CBOARDS 0x1307 936 #define PCI_DEVICE_ID_CBOARDS_DAS1602_16 0x0001 937 938 #define PCI_VENDOR_ID_SYMPHONY 0x1c1c 939 #define PCI_DEVICE_ID_SYMPHONY_101 0x0001 940 941 #define PCI_VENDOR_ID_TEKRAM 0x1de1 942 #define PCI_DEVICE_ID_TEKRAM_DC290 0xdc29 943 944 #define PCI_VENDOR_ID_3DLABS 0x3d3d 945 #define PCI_DEVICE_ID_3DLABS_300SX 0x0001 946 #define PCI_DEVICE_ID_3DLABS_500TX 0x0002 947 #define PCI_DEVICE_ID_3DLABS_DELTA 0x0003 948 #define PCI_DEVICE_ID_3DLABS_PERMEDIA 0x0004 949 #define PCI_DEVICE_ID_3DLABS_MX 0x0006 950 951 #define PCI_VENDOR_ID_AVANCE 0x4005 952 #define PCI_DEVICE_ID_AVANCE_ALG2064 0x2064 953 #define PCI_DEVICE_ID_AVANCE_2302 0x2302 954 955 #define PCI_VENDOR_ID_NETVIN 0x4a14 956 #define PCI_DEVICE_ID_NETVIN_NV5000SC 0x5000 957 958 #define PCI_VENDOR_ID_S3 0x5333 959 #define PCI_DEVICE_ID_S3_PLATO_PXS 0x0551 960 #define PCI_DEVICE_ID_S3_ViRGE 0x5631 961 #define PCI_DEVICE_ID_S3_TRIO 0x8811 962 #define PCI_DEVICE_ID_S3_AURORA64VP 0x8812 963 #define PCI_DEVICE_ID_S3_TRIO64UVP 0x8814 964 #define PCI_DEVICE_ID_S3_ViRGE_VX 0x883d 965 #define PCI_DEVICE_ID_S3_868 0x8880 966 #define PCI_DEVICE_ID_S3_928 0x88b0 967 #define PCI_DEVICE_ID_S3_864_1 0x88c0 968 #define PCI_DEVICE_ID_S3_864_2 0x88c1 969 #define PCI_DEVICE_ID_S3_964_1 0x88d0 970 #define PCI_DEVICE_ID_S3_964_2 0x88d1 971 #define PCI_DEVICE_ID_S3_968 0x88f0 972 #define PCI_DEVICE_ID_S3_TRIO64V2 0x8901 973 #define PCI_DEVICE_ID_S3_PLATO_PXG 0x8902 974 #define PCI_DEVICE_ID_S3_ViRGE_DXGX 0x8a01 975 #define PCI_DEVICE_ID_S3_ViRGE_GX2 0x8a10 976 #define PCI_DEVICE_ID_S3_ViRGE_MX 0x8c01 977 #define PCI_DEVICE_ID_S3_ViRGE_MXP 0x8c02 978 #define PCI_DEVICE_ID_S3_ViRGE_MXPMV 0x8c03 979 #define PCI_DEVICE_ID_S3_SONICVIBES 0xca00 980 981 #define PCI_VENDOR_ID_INTEL 0x8086 982 #define PCI_DEVICE_ID_INTEL_82375 0x0482 983 #define PCI_DEVICE_ID_INTEL_82424 0x0483 984 #define PCI_DEVICE_ID_INTEL_82378 0x0484 985 #define PCI_DEVICE_ID_INTEL_82430 0x0486 986 #define PCI_DEVICE_ID_INTEL_82434 0x04a3 987 #define PCI_DEVICE_ID_INTEL_82092AA_0 0x1221 988 #define PCI_DEVICE_ID_INTEL_82092AA_1 0x1222 989 #define PCI_DEVICE_ID_INTEL_7116 0x1223 990 #define PCI_DEVICE_ID_INTEL_82596 0x1226 991 #define PCI_DEVICE_ID_INTEL_82865 0x1227 992 #define PCI_DEVICE_ID_INTEL_82557 0x1229 993 #define PCI_DEVICE_ID_INTEL_82437 0x122d 994 #define PCI_DEVICE_ID_INTEL_82371FB_0 0x122e 995 #define PCI_DEVICE_ID_INTEL_82371FB_1 0x1230 996 #define PCI_DEVICE_ID_INTEL_82371MX 0x1234 997 #define PCI_DEVICE_ID_INTEL_82437MX 0x1235 998 #define PCI_DEVICE_ID_INTEL_82441 0x1237 999 #define PCI_DEVICE_ID_INTEL_82380FB 0x124b 1000 #define PCI_DEVICE_ID_INTEL_82439 0x1250 1001 #define PCI_DEVICE_ID_INTEL_82371SB_0 0x7000 1002 #define PCI_DEVICE_ID_INTEL_82371SB_1 0x7010 1003 #define PCI_DEVICE_ID_INTEL_82371SB_2 0x7020 1004 #define PCI_DEVICE_ID_INTEL_82437VX 0x7030 1005 #define PCI_DEVICE_ID_INTEL_82439TX 0x7100 1006 #define PCI_DEVICE_ID_INTEL_82371AB_0 0x7110 1007 #define PCI_DEVICE_ID_INTEL_82371AB 0x7111 1008 #define PCI_DEVICE_ID_INTEL_82371AB_2 0x7112 1009 #define PCI_DEVICE_ID_INTEL_82371AB_3 0x7113 1010 #define PCI_DEVICE_ID_INTEL_82443LX_0 0x7180 1011 #define PCI_DEVICE_ID_INTEL_82443LX_1 0x7181 1012 #define PCI_DEVICE_ID_INTEL_82443BX_0 0x7190 1013 #define PCI_DEVICE_ID_INTEL_82443BX_1 0x7191 1014 #define PCI_DEVICE_ID_INTEL_82443BX_2 0x7192 1015 #define PCI_DEVICE_ID_INTEL_P6 0x84c4 1016 #define PCI_DEVICE_ID_INTEL_82450GX 0x84c5 1017 1018 #define PCI_VENDOR_ID_KTI 0x8e2e 1019 #define PCI_DEVICE_ID_KTI_ET32P2 0x3000 1020 1021 #define PCI_VENDOR_ID_ADAPTEC 0x9004 1022 #define PCI_DEVICE_ID_ADAPTEC_7810 0x1078 1023 #define PCI_DEVICE_ID_ADAPTEC_7850 0x5078 1024 #define PCI_DEVICE_ID_ADAPTEC_7855 0x5578 1025 #define PCI_DEVICE_ID_ADAPTEC_5800 0x5800 1026 #define PCI_DEVICE_ID_ADAPTEC_1480A 0x6075 1027 #define PCI_DEVICE_ID_ADAPTEC_7860 0x6078 1028 #define PCI_DEVICE_ID_ADAPTEC_7861 0x6178 1029 #define PCI_DEVICE_ID_ADAPTEC_7870 0x7078 1030 #define PCI_DEVICE_ID_ADAPTEC_7871 0x7178 1031 #define PCI_DEVICE_ID_ADAPTEC_7872 0x7278 1032 #define PCI_DEVICE_ID_ADAPTEC_7873 0x7378 1033 #define PCI_DEVICE_ID_ADAPTEC_7874 0x7478 1034 #define PCI_DEVICE_ID_ADAPTEC_7895 0x7895 1035 #define PCI_DEVICE_ID_ADAPTEC_7880 0x8078 1036 #define PCI_DEVICE_ID_ADAPTEC_7881 0x8178 1037 #define PCI_DEVICE_ID_ADAPTEC_7882 0x8278 1038 #define PCI_DEVICE_ID_ADAPTEC_7883 0x8378 1039 #define PCI_DEVICE_ID_ADAPTEC_7884 0x8478 1040 #define PCI_DEVICE_ID_ADAPTEC_1030 0x8b78 1041 1042 #define PCI_VENDOR_ID_ADAPTEC2 0x9005 1043 #define PCI_DEVICE_ID_ADAPTEC2_2940U2 0x0010 1044 #define PCI_DEVICE_ID_ADAPTEC2_7890 0x001f 1045 #define PCI_DEVICE_ID_ADAPTEC2_3940U2 0x0050 1046 #define PCI_DEVICE_ID_ADAPTEC2_7896 0x005f 1047 1048 #define PCI_VENDOR_ID_ATRONICS 0x907f 1049 #define PCI_DEVICE_ID_ATRONICS_2015 0x2015 1050 1051 #define PCI_VENDOR_ID_HOLTEK 0x9412 1052 #define PCI_DEVICE_ID_HOLTEK_6565 0x6565 1053 1054 #define PCI_VENDOR_ID_TIGERJET 0xe159 1055 #define PCI_DEVICE_ID_TIGERJET_300 0x0001 1056 1057 #define PCI_VENDOR_ID_ARK 0xedd8 1058 #define PCI_DEVICE_ID_ARK_STING 0xa091 1059 #define PCI_DEVICE_ID_ARK_STINGARK 0xa099 1060 #define PCI_DEVICE_ID_ARK_2000MT 0xa0a1 1061 286 #define PCI_VENDOR_ID_COMPAQ 0x0e11 287 #define PCI_DEVICE_ID_COMPAQ_1280 0x3033 288 #define PCI_DEVICE_ID_COMPAQ_TRIFLEX 0x4000 289 #define PCI_DEVICE_ID_COMPAQ_SMART2P 0xae10 290 #define PCI_DEVICE_ID_COMPAQ_NETEL100 0xae32 291 #define PCI_DEVICE_ID_COMPAQ_NETEL10 0xae34 292 #define PCI_DEVICE_ID_COMPAQ_NETFLEX3I 0xae35 293 #define PCI_DEVICE_ID_COMPAQ_NETEL100D 0xae40 294 #define PCI_DEVICE_ID_COMPAQ_NETEL100PI 0xae43 295 #define PCI_DEVICE_ID_COMPAQ_NETEL100I 0xb011 296 #define PCI_DEVICE_ID_COMPAQ_THUNDER 0xf130 297 #define PCI_DEVICE_ID_COMPAQ_NETFLEX3B 0xf150 298 299 #define PCI_VENDOR_ID_NCR 0x1000 300 #define PCI_DEVICE_ID_NCR_53C810 0x0001 301 #define PCI_DEVICE_ID_NCR_53C820 0x0002 302 #define PCI_DEVICE_ID_NCR_53C825 0x0003 303 #define PCI_DEVICE_ID_NCR_53C815 0x0004 304 #define PCI_DEVICE_ID_NCR_53C860 0x0006 305 #define PCI_DEVICE_ID_NCR_53C896 0x000b 306 #define PCI_DEVICE_ID_NCR_53C895 0x000c 307 #define PCI_DEVICE_ID_NCR_53C885 0x000d 308 #define PCI_DEVICE_ID_NCR_53C875 0x000f 309 #define PCI_DEVICE_ID_NCR_53C875J 0x008f 310 311 #define PCI_VENDOR_ID_ATI 0x1002 312 #define PCI_DEVICE_ID_ATI_68800 0x4158 313 #define PCI_DEVICE_ID_ATI_215CT222 0x4354 314 #define PCI_DEVICE_ID_ATI_210888CX 0x4358 315 #define PCI_DEVICE_ID_ATI_215GB 0x4742 316 #define PCI_DEVICE_ID_ATI_215GD 0x4744 317 #define PCI_DEVICE_ID_ATI_215GI 0x4749 318 #define PCI_DEVICE_ID_ATI_215GP 0x4750 319 #define PCI_DEVICE_ID_ATI_215GQ 0x4751 320 #define PCI_DEVICE_ID_ATI_215GT 0x4754 321 #define PCI_DEVICE_ID_ATI_215GTB 0x4755 322 #define PCI_DEVICE_ID_ATI_210888GX 0x4758 323 #define PCI_DEVICE_ID_ATI_215LG 0x4c47 324 #define PCI_DEVICE_ID_ATI_264LT 0x4c54 325 #define PCI_DEVICE_ID_ATI_264VT 0x5654 326 327 #define PCI_VENDOR_ID_VLSI 0x1004 328 #define PCI_DEVICE_ID_VLSI_82C592 0x0005 329 #define PCI_DEVICE_ID_VLSI_82C593 0x0006 330 #define PCI_DEVICE_ID_VLSI_82C594 0x0007 331 #define PCI_DEVICE_ID_VLSI_82C597 0x0009 332 #define PCI_DEVICE_ID_VLSI_82C541 0x000c 333 #define PCI_DEVICE_ID_VLSI_82C543 0x000d 334 #define PCI_DEVICE_ID_VLSI_82C532 0x0101 335 #define PCI_DEVICE_ID_VLSI_82C534 0x0102 336 #define PCI_DEVICE_ID_VLSI_82C535 0x0104 337 #define PCI_DEVICE_ID_VLSI_82C147 0x0105 338 #define PCI_DEVICE_ID_VLSI_VAS96011 0x0702 339 340 #define PCI_VENDOR_ID_ADL 0x1005 341 #define PCI_DEVICE_ID_ADL_2301 0x2301 342 343 #define PCI_VENDOR_ID_NS 0x100b 344 #define PCI_DEVICE_ID_NS_87415 0x0002 345 #define PCI_DEVICE_ID_NS_87410 0xd001 346 347 #define PCI_VENDOR_ID_TSENG 0x100c 348 #define PCI_DEVICE_ID_TSENG_W32P_2 0x3202 349 #define PCI_DEVICE_ID_TSENG_W32P_b 0x3205 350 #define PCI_DEVICE_ID_TSENG_W32P_c 0x3206 351 #define PCI_DEVICE_ID_TSENG_W32P_d 0x3207 352 #define PCI_DEVICE_ID_TSENG_ET6000 0x3208 353 354 #define PCI_VENDOR_ID_WEITEK 0x100e 355 #define PCI_DEVICE_ID_WEITEK_P9000 0x9001 356 #define PCI_DEVICE_ID_WEITEK_P9100 0x9100 357 358 #define PCI_VENDOR_ID_DEC 0x1011 359 #define PCI_DEVICE_ID_DEC_BRD 0x0001 360 #define PCI_DEVICE_ID_DEC_TULIP 0x0002 361 #define PCI_DEVICE_ID_DEC_TGA 0x0004 362 #define PCI_DEVICE_ID_DEC_TULIP_FAST 0x0009 363 #define PCI_DEVICE_ID_DEC_TGA2 0x000D 364 #define PCI_DEVICE_ID_DEC_FDDI 0x000F 365 #define PCI_DEVICE_ID_DEC_TULIP_PLUS 0x0014 366 #define PCI_DEVICE_ID_DEC_21142 0x0019 367 #define PCI_DEVICE_ID_DEC_21052 0x0021 368 #define PCI_DEVICE_ID_DEC_21150 0x0022 369 #define PCI_DEVICE_ID_DEC_21152 0x0024 370 371 #define PCI_VENDOR_ID_CIRRUS 0x1013 372 #define PCI_DEVICE_ID_CIRRUS_7548 0x0038 373 #define PCI_DEVICE_ID_CIRRUS_5430 0x00a0 374 #define PCI_DEVICE_ID_CIRRUS_5434_4 0x00a4 375 #define PCI_DEVICE_ID_CIRRUS_5434_8 0x00a8 376 #define PCI_DEVICE_ID_CIRRUS_5436 0x00ac 377 #define PCI_DEVICE_ID_CIRRUS_5446 0x00b8 378 #define PCI_DEVICE_ID_CIRRUS_5480 0x00bc 379 #define PCI_DEVICE_ID_CIRRUS_5464 0x00d4 380 #define PCI_DEVICE_ID_CIRRUS_5465 0x00d6 381 #define PCI_DEVICE_ID_CIRRUS_6729 0x1100 382 #define PCI_DEVICE_ID_CIRRUS_6832 0x1110 383 #define PCI_DEVICE_ID_CIRRUS_7542 0x1200 384 #define PCI_DEVICE_ID_CIRRUS_7543 0x1202 385 #define PCI_DEVICE_ID_CIRRUS_7541 0x1204 386 387 #define PCI_VENDOR_ID_IBM 0x1014 388 #define PCI_DEVICE_ID_IBM_FIRE_CORAL 0x000a 389 #define PCI_DEVICE_ID_IBM_TR 0x0018 390 #define PCI_DEVICE_ID_IBM_82G2675 0x001d 391 #define PCI_DEVICE_ID_IBM_MCA 0x0020 392 #define PCI_DEVICE_ID_IBM_82351 0x0022 393 #define PCI_DEVICE_ID_IBM_SERVERAID 0x002e 394 #define PCI_DEVICE_ID_IBM_TR_WAKE 0x003e 395 #define PCI_DEVICE_ID_IBM_MPIC 0x0046 396 #define PCI_DEVICE_ID_IBM_3780IDSP 0x007d 397 #define PCI_DEVICE_ID_IBM_MPIC_2 0xffff 398 399 #define PCI_VENDOR_ID_WD 0x101c 400 #define PCI_DEVICE_ID_WD_7197 0x3296 401 402 #define PCI_VENDOR_ID_AMD 0x1022 403 #define PCI_DEVICE_ID_AMD_LANCE 0x2000 404 #define PCI_DEVICE_ID_AMD_SCSI 0x2020 405 406 #define PCI_VENDOR_ID_TRIDENT 0x1023 407 #define PCI_DEVICE_ID_TRIDENT_9397 0x9397 408 #define PCI_DEVICE_ID_TRIDENT_9420 0x9420 409 #define PCI_DEVICE_ID_TRIDENT_9440 0x9440 410 #define PCI_DEVICE_ID_TRIDENT_9660 0x9660 411 #define PCI_DEVICE_ID_TRIDENT_9750 0x9750 412 413 #define PCI_VENDOR_ID_AI 0x1025 414 #define PCI_DEVICE_ID_AI_M1435 0x1435 415 416 #define PCI_VENDOR_ID_MATROX 0x102B 417 #define PCI_DEVICE_ID_MATROX_MGA_2 0x0518 418 #define PCI_DEVICE_ID_MATROX_MIL 0x0519 419 #define PCI_DEVICE_ID_MATROX_MYS 0x051A 420 #define PCI_DEVICE_ID_MATROX_MIL_2 0x051b 421 #define PCI_DEVICE_ID_MATROX_MIL_2_AGP 0x051f 422 #define PCI_DEVICE_ID_MATROX_MGA_IMP 0x0d10 423 424 #define PCI_VENDOR_ID_CT 0x102c 425 #define PCI_DEVICE_ID_CT_65545 0x00d8 426 #define PCI_DEVICE_ID_CT_65548 0x00dc 427 #define PCI_DEVICE_ID_CT_65550 0x00e0 428 #define PCI_DEVICE_ID_CT_65554 0x00e4 429 #define PCI_DEVICE_ID_CT_65555 0x00e5 430 431 #define PCI_VENDOR_ID_MIRO 0x1031 432 #define PCI_DEVICE_ID_MIRO_36050 0x5601 433 434 #define PCI_VENDOR_ID_NEC 0x1033 435 #define PCI_DEVICE_ID_NEC_PCX2 0x0046 436 437 #define PCI_VENDOR_ID_FD 0x1036 438 #define PCI_DEVICE_ID_FD_36C70 0x0000 439 440 #define PCI_VENDOR_ID_SI 0x1039 441 #define PCI_DEVICE_ID_SI_5591_AGP 0x0001 442 #define PCI_DEVICE_ID_SI_6202 0x0002 443 #define PCI_DEVICE_ID_SI_503 0x0008 444 #define PCI_DEVICE_ID_SI_ACPI 0x0009 445 #define PCI_DEVICE_ID_SI_5597_VGA 0x0200 446 #define PCI_DEVICE_ID_SI_6205 0x0205 447 #define PCI_DEVICE_ID_SI_501 0x0406 448 #define PCI_DEVICE_ID_SI_496 0x0496 449 #define PCI_DEVICE_ID_SI_601 0x0601 450 #define PCI_DEVICE_ID_SI_5107 0x5107 451 #define PCI_DEVICE_ID_SI_5511 0x5511 452 #define PCI_DEVICE_ID_SI_5513 0x5513 453 #define PCI_DEVICE_ID_SI_5571 0x5571 454 #define PCI_DEVICE_ID_SI_5591 0x5591 455 #define PCI_DEVICE_ID_SI_5597 0x5597 456 #define PCI_DEVICE_ID_SI_7001 0x7001 457 458 #define PCI_VENDOR_ID_HP 0x103c 459 #define PCI_DEVICE_ID_HP_J2585A 0x1030 460 #define PCI_DEVICE_ID_HP_J2585B 0x1031 461 462 #define PCI_VENDOR_ID_PCTECH 0x1042 463 #define PCI_DEVICE_ID_PCTECH_RZ1000 0x1000 464 #define PCI_DEVICE_ID_PCTECH_RZ1001 0x1001 465 #define PCI_DEVICE_ID_PCTECH_SAMURAI_0 0x3000 466 #define PCI_DEVICE_ID_PCTECH_SAMURAI_1 0x3010 467 #define PCI_DEVICE_ID_PCTECH_SAMURAI_IDE 0x3020 468 469 #define PCI_VENDOR_ID_DPT 0x1044 470 #define PCI_DEVICE_ID_DPT 0xa400 471 472 #define PCI_VENDOR_ID_OPTI 0x1045 473 #define PCI_DEVICE_ID_OPTI_92C178 0xc178 474 #define PCI_DEVICE_ID_OPTI_82C557 0xc557 475 #define PCI_DEVICE_ID_OPTI_82C558 0xc558 476 #define PCI_DEVICE_ID_OPTI_82C621 0xc621 477 #define PCI_DEVICE_ID_OPTI_82C700 0xc700 478 #define PCI_DEVICE_ID_OPTI_82C701 0xc701 479 #define PCI_DEVICE_ID_OPTI_82C814 0xc814 480 #define PCI_DEVICE_ID_OPTI_82C822 0xc822 481 #define PCI_DEVICE_ID_OPTI_82C825 0xd568 482 483 #define PCI_VENDOR_ID_SGS 0x104a 484 #define PCI_DEVICE_ID_SGS_2000 0x0008 485 #define PCI_DEVICE_ID_SGS_1764 0x0009 486 487 #define PCI_VENDOR_ID_BUSLOGIC 0x104B 488 #define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER_NC 0x0140 489 #define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER 0x1040 490 #define PCI_DEVICE_ID_BUSLOGIC_FLASHPOINT 0x8130 491 492 #define PCI_VENDOR_ID_TI 0x104c 493 #define PCI_DEVICE_ID_TI_TVP4010 0x3d04 494 #define PCI_DEVICE_ID_TI_TVP4020 0x3d07 495 #define PCI_DEVICE_ID_TI_PCI1130 0xac12 496 #define PCI_DEVICE_ID_TI_PCI1031 0xac13 497 #define PCI_DEVICE_ID_TI_PCI1131 0xac15 498 #define PCI_DEVICE_ID_TI_PCI1250 0xac16 499 #define PCI_DEVICE_ID_TI_PCI1220 0xac17 500 501 #define PCI_VENDOR_ID_OAK 0x104e 502 #define PCI_DEVICE_ID_OAK_OTI107 0x0107 503 504 #define PCI_VENDOR_ID_WINBOND2 0x1050 505 #define PCI_DEVICE_ID_WINBOND2_89C940 0x0940 506 507 #define PCI_VENDOR_ID_MOTOROLA 0x1057 508 #define PCI_DEVICE_ID_MOTOROLA_MPC105 0x0001 509 #define PCI_DEVICE_ID_MOTOROLA_MPC106 0x0002 510 #define PCI_DEVICE_ID_MOTOROLA_RAVEN 0x4801 511 512 #define PCI_VENDOR_ID_PROMISE 0x105a 513 #define PCI_DEVICE_ID_PROMISE_20246 0x4d33 514 #define PCI_DEVICE_ID_PROMISE_5300 0x5300 515 516 #define PCI_VENDOR_ID_N9 0x105d 517 #define PCI_DEVICE_ID_N9_I128 0x2309 518 #define PCI_DEVICE_ID_N9_I128_2 0x2339 519 #define PCI_DEVICE_ID_N9_I128_T2R 0x493d 520 521 #define PCI_VENDOR_ID_UMC 0x1060 522 #define PCI_DEVICE_ID_UMC_UM8673F 0x0101 523 #define PCI_DEVICE_ID_UMC_UM8891A 0x0891 524 #define PCI_DEVICE_ID_UMC_UM8886BF 0x673a 525 #define PCI_DEVICE_ID_UMC_UM8886A 0x886a 526 #define PCI_DEVICE_ID_UMC_UM8881F 0x8881 527 #define PCI_DEVICE_ID_UMC_UM8886F 0x8886 528 #define PCI_DEVICE_ID_UMC_UM9017F 0x9017 529 #define PCI_DEVICE_ID_UMC_UM8886N 0xe886 530 #define PCI_DEVICE_ID_UMC_UM8891N 0xe891 531 532 #define PCI_VENDOR_ID_X 0x1061 533 #define PCI_DEVICE_ID_X_AGX016 0x0001 534 535 #define PCI_VENDOR_ID_PICOP 0x1066 536 #define PCI_DEVICE_ID_PICOP_PT86C52X 0x0001 537 #define PCI_DEVICE_ID_PICOP_PT80C524 0x8002 538 539 #define PCI_VENDOR_ID_APPLE 0x106b 540 #define PCI_DEVICE_ID_APPLE_BANDIT 0x0001 541 #define PCI_DEVICE_ID_APPLE_GC 0x0002 542 #define PCI_DEVICE_ID_APPLE_HYDRA 0x000e 543 544 #define PCI_VENDOR_ID_NEXGEN 0x1074 545 #define PCI_DEVICE_ID_NEXGEN_82C501 0x4e78 546 547 #define PCI_VENDOR_ID_QLOGIC 0x1077 548 #define PCI_DEVICE_ID_QLOGIC_ISP1020 0x1020 549 #define PCI_DEVICE_ID_QLOGIC_ISP1022 0x1022 550 551 #define PCI_VENDOR_ID_CYRIX 0x1078 552 #define PCI_DEVICE_ID_CYRIX_5510 0x0000 553 #define PCI_DEVICE_ID_CYRIX_PCI_MASTER 0x0001 554 #define PCI_DEVICE_ID_CYRIX_5520 0x0002 555 #define PCI_DEVICE_ID_CYRIX_5530_LEGACY 0x0100 556 #define PCI_DEVICE_ID_CYRIX_5530_SMI 0x0101 557 #define PCI_DEVICE_ID_CYRIX_5530_IDE 0x0102 558 #define PCI_DEVICE_ID_CYRIX_5530_AUDIO 0x0103 559 #define PCI_DEVICE_ID_CYRIX_5530_VIDEO 0x0104 560 561 #define PCI_VENDOR_ID_LEADTEK 0x107d 562 #define PCI_DEVICE_ID_LEADTEK_805 0x0000 563 564 #define PCI_VENDOR_ID_CONTAQ 0x1080 565 #define PCI_DEVICE_ID_CONTAQ_82C599 0x0600 566 #define PCI_DEVICE_ID_CONTAQ_82C693 0xc693 567 568 #define PCI_VENDOR_ID_FOREX 0x1083 569 570 #define PCI_VENDOR_ID_OLICOM 0x108d 571 #define PCI_DEVICE_ID_OLICOM_OC3136 0x0001 572 #define PCI_DEVICE_ID_OLICOM_OC2315 0x0011 573 #define PCI_DEVICE_ID_OLICOM_OC2325 0x0012 574 #define PCI_DEVICE_ID_OLICOM_OC2183 0x0013 575 #define PCI_DEVICE_ID_OLICOM_OC2326 0x0014 576 #define PCI_DEVICE_ID_OLICOM_OC6151 0x0021 577 578 #define PCI_VENDOR_ID_SUN 0x108e 579 #define PCI_DEVICE_ID_SUN_EBUS 0x1000 580 #define PCI_DEVICE_ID_SUN_HAPPYMEAL 0x1001 581 #define PCI_DEVICE_ID_SUN_SIMBA 0x5000 582 #define PCI_DEVICE_ID_SUN_PBM 0x8000 583 #define PCI_DEVICE_ID_SUN_SABRE 0xa000 584 585 #define PCI_VENDOR_ID_CMD 0x1095 586 #define PCI_DEVICE_ID_CMD_640 0x0640 587 #define PCI_DEVICE_ID_CMD_643 0x0643 588 #define PCI_DEVICE_ID_CMD_646 0x0646 589 #define PCI_DEVICE_ID_CMD_647 0x0647 590 #define PCI_DEVICE_ID_CMD_670 0x0670 591 592 #define PCI_VENDOR_ID_VISION 0x1098 593 #define PCI_DEVICE_ID_VISION_QD8500 0x0001 594 #define PCI_DEVICE_ID_VISION_QD8580 0x0002 595 596 #define PCI_VENDOR_ID_BROOKTREE 0x109e 597 #define PCI_DEVICE_ID_BROOKTREE_848 0x0350 598 #define PCI_DEVICE_ID_BROOKTREE_849A 0x0351 599 #define PCI_DEVICE_ID_BROOKTREE_8474 0x8474 600 601 #define PCI_VENDOR_ID_SIERRA 0x10a8 602 #define PCI_DEVICE_ID_SIERRA_STB 0x0000 603 604 #define PCI_VENDOR_ID_ACC 0x10aa 605 #define PCI_DEVICE_ID_ACC_2056 0x0000 606 607 #define PCI_VENDOR_ID_WINBOND 0x10ad 608 #define PCI_DEVICE_ID_WINBOND_83769 0x0001 609 #define PCI_DEVICE_ID_WINBOND_82C105 0x0105 610 #define PCI_DEVICE_ID_WINBOND_83C553 0x0565 611 612 #define PCI_VENDOR_ID_DATABOOK 0x10b3 613 #define PCI_DEVICE_ID_DATABOOK_87144 0xb106 614 615 #define PCI_VENDOR_ID_PLX 0x10b5 616 #define PCI_DEVICE_ID_PLX_9050 0x9050 617 #define PCI_DEVICE_ID_PLX_9060 0x9060 618 #define PCI_DEVICE_ID_PLX_9060ES 0x906E 619 #define PCI_DEVICE_ID_PLX_9060SD 0x906D 620 #define PCI_DEVICE_ID_PLX_9080 0x9080 621 622 #define PCI_VENDOR_ID_MADGE 0x10b6 623 #define PCI_DEVICE_ID_MADGE_MK2 0x0002 624 #define PCI_DEVICE_ID_MADGE_C155S 0x1001 625 626 #define PCI_VENDOR_ID_3COM 0x10b7 627 #define PCI_DEVICE_ID_3COM_3C339 0x3390 628 #define PCI_DEVICE_ID_3COM_3C590 0x5900 629 #define PCI_DEVICE_ID_3COM_3C595TX 0x5950 630 #define PCI_DEVICE_ID_3COM_3C595T4 0x5951 631 #define PCI_DEVICE_ID_3COM_3C595MII 0x5952 632 #define PCI_DEVICE_ID_3COM_3C900TPO 0x9000 633 #define PCI_DEVICE_ID_3COM_3C900COMBO 0x9001 634 #define PCI_DEVICE_ID_3COM_3C905TX 0x9050 635 #define PCI_DEVICE_ID_3COM_3C905T4 0x9051 636 #define PCI_DEVICE_ID_3COM_3C905B_TX 0x9055 637 638 #define PCI_VENDOR_ID_SMC 0x10b8 639 #define PCI_DEVICE_ID_SMC_EPIC100 0x0005 640 641 #define PCI_VENDOR_ID_AL 0x10b9 642 #define PCI_DEVICE_ID_AL_M1445 0x1445 643 #define PCI_DEVICE_ID_AL_M1449 0x1449 644 #define PCI_DEVICE_ID_AL_M1451 0x1451 645 #define PCI_DEVICE_ID_AL_M1461 0x1461 646 #define PCI_DEVICE_ID_AL_M1489 0x1489 647 #define PCI_DEVICE_ID_AL_M1511 0x1511 648 #define PCI_DEVICE_ID_AL_M1513 0x1513 649 #define PCI_DEVICE_ID_AL_M1521 0x1521 650 #define PCI_DEVICE_ID_AL_M1523 0x1523 651 #define PCI_DEVICE_ID_AL_M1531 0x1531 652 #define PCI_DEVICE_ID_AL_M1533 0x1533 653 #define PCI_DEVICE_ID_AL_M3307 0x3307 654 #define PCI_DEVICE_ID_AL_M4803 0x5215 655 #define PCI_DEVICE_ID_AL_M5219 0x5219 656 #define PCI_DEVICE_ID_AL_M5229 0x5229 657 #define PCI_DEVICE_ID_AL_M5237 0x5237 658 #define PCI_DEVICE_ID_AL_M7101 0x7101 659 660 #define PCI_VENDOR_ID_MITSUBISHI 0x10ba 661 662 #define PCI_VENDOR_ID_SURECOM 0x10bd 663 #define PCI_DEVICE_ID_SURECOM_NE34 0x0e34 664 665 #define PCI_VENDOR_ID_NEOMAGIC 0x10c8 666 #define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_NM2070 0x0001 667 #define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128V 0x0002 668 #define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128ZV 0x0003 669 #define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_NM2160 0x0004 670 671 #define PCI_VENDOR_ID_ASP 0x10cd 672 #define PCI_DEVICE_ID_ASP_ABP940 0x1200 673 #define PCI_DEVICE_ID_ASP_ABP940U 0x1300 674 #define PCI_DEVICE_ID_ASP_ABP940UW 0x2300 675 676 #define PCI_VENDOR_ID_MACRONIX 0x10d9 677 #define PCI_DEVICE_ID_MACRONIX_MX98713 0x0512 678 #define PCI_DEVICE_ID_MACRONIX_MX987x5 0x0531 679 680 #define PCI_VENDOR_ID_CERN 0x10dc 681 #define PCI_DEVICE_ID_CERN_SPSB_PMC 0x0001 682 #define PCI_DEVICE_ID_CERN_SPSB_PCI 0x0002 683 #define PCI_DEVICE_ID_CERN_HIPPI_DST 0x0021 684 #define PCI_DEVICE_ID_CERN_HIPPI_SRC 0x0022 685 686 #define PCI_VENDOR_ID_NVIDIA 0x10de 687 688 #define PCI_VENDOR_ID_IMS 0x10e0 689 #define PCI_DEVICE_ID_IMS_8849 0x8849 690 691 #define PCI_VENDOR_ID_TEKRAM2 0x10e1 692 #define PCI_DEVICE_ID_TEKRAM2_690c 0x690c 693 694 #define PCI_VENDOR_ID_TUNDRA 0x10e3 695 #define PCI_DEVICE_ID_TUNDRA_CA91C042 0x0000 696 697 #define PCI_VENDOR_ID_AMCC 0x10e8 698 #define PCI_DEVICE_ID_AMCC_MYRINET 0x8043 699 #define PCI_DEVICE_ID_AMCC_PARASTATION 0x8062 700 #define PCI_DEVICE_ID_AMCC_S5933 0x807d 701 #define PCI_DEVICE_ID_AMCC_S5933_HEPC3 0x809c 702 703 #define PCI_VENDOR_ID_INTERG 0x10ea 704 #define PCI_DEVICE_ID_INTERG_1680 0x1680 705 #define PCI_DEVICE_ID_INTERG_1682 0x1682 706 707 #define PCI_VENDOR_ID_REALTEK 0x10ec 708 #define PCI_DEVICE_ID_REALTEK_8029 0x8029 709 #define PCI_DEVICE_ID_REALTEK_8129 0x8129 710 #define PCI_DEVICE_ID_REALTEK_8139 0x8139 711 712 #define PCI_VENDOR_ID_TRUEVISION 0x10fa 713 #define PCI_DEVICE_ID_TRUEVISION_T1000 0x000c 714 715 #define PCI_VENDOR_ID_INIT 0x1101 716 #define PCI_DEVICE_ID_INIT_320P 0x9100 717 #define PCI_DEVICE_ID_INIT_360P 0x9500 718 719 #define PCI_VENDOR_ID_TTI 0x1103 720 #define PCI_DEVICE_ID_TTI_HPT343 0x0003 721 722 #define PCI_VENDOR_ID_VIA 0x1106 723 #define PCI_DEVICE_ID_VIA_82C505 0x0505 724 #define PCI_DEVICE_ID_VIA_82C561 0x0561 725 #define PCI_DEVICE_ID_VIA_82C586_1 0x0571 726 #define PCI_DEVICE_ID_VIA_82C576 0x0576 727 #define PCI_DEVICE_ID_VIA_82C585 0x0585 728 #define PCI_DEVICE_ID_VIA_82C586_0 0x0586 729 #define PCI_DEVICE_ID_VIA_82C595 0x0595 730 #define PCI_DEVICE_ID_VIA_82C597_0 0x0597 731 #define PCI_DEVICE_ID_VIA_82C926 0x0926 732 #define PCI_DEVICE_ID_VIA_82C416 0x1571 733 #define PCI_DEVICE_ID_VIA_82C595_97 0x1595 734 #define PCI_DEVICE_ID_VIA_82C586_2 0x3038 735 #define PCI_DEVICE_ID_VIA_82C586_3 0x3040 736 #define PCI_DEVICE_ID_VIA_86C100A 0x6100 737 #define PCI_DEVICE_ID_VIA_82C597_1 0x8597 738 739 #define PCI_VENDOR_ID_VORTEX 0x1119 740 #define PCI_DEVICE_ID_VORTEX_GDT60x0 0x0000 741 #define PCI_DEVICE_ID_VORTEX_GDT6000B 0x0001 742 #define PCI_DEVICE_ID_VORTEX_GDT6x10 0x0002 743 #define PCI_DEVICE_ID_VORTEX_GDT6x20 0x0003 744 #define PCI_DEVICE_ID_VORTEX_GDT6530 0x0004 745 #define PCI_DEVICE_ID_VORTEX_GDT6550 0x0005 746 #define PCI_DEVICE_ID_VORTEX_GDT6x17 0x0006 747 #define PCI_DEVICE_ID_VORTEX_GDT6x27 0x0007 748 #define PCI_DEVICE_ID_VORTEX_GDT6537 0x0008 749 #define PCI_DEVICE_ID_VORTEX_GDT6557 0x0009 750 #define PCI_DEVICE_ID_VORTEX_GDT6x15 0x000a 751 #define PCI_DEVICE_ID_VORTEX_GDT6x25 0x000b 752 #define PCI_DEVICE_ID_VORTEX_GDT6535 0x000c 753 #define PCI_DEVICE_ID_VORTEX_GDT6555 0x000d 754 #define PCI_DEVICE_ID_VORTEX_GDT6x17RP 0x0100 755 #define PCI_DEVICE_ID_VORTEX_GDT6x27RP 0x0101 756 #define PCI_DEVICE_ID_VORTEX_GDT6537RP 0x0102 757 #define PCI_DEVICE_ID_VORTEX_GDT6557RP 0x0103 758 #define PCI_DEVICE_ID_VORTEX_GDT6x11RP 0x0104 759 #define PCI_DEVICE_ID_VORTEX_GDT6x21RP 0x0105 760 #define PCI_DEVICE_ID_VORTEX_GDT6x17RP1 0x0110 761 #define PCI_DEVICE_ID_VORTEX_GDT6x27RP1 0x0111 762 #define PCI_DEVICE_ID_VORTEX_GDT6537RP1 0x0112 763 #define PCI_DEVICE_ID_VORTEX_GDT6557RP1 0x0113 764 #define PCI_DEVICE_ID_VORTEX_GDT6x11RP1 0x0114 765 #define PCI_DEVICE_ID_VORTEX_GDT6x21RP1 0x0115 766 #define PCI_DEVICE_ID_VORTEX_GDT6x17RP2 0x0120 767 #define PCI_DEVICE_ID_VORTEX_GDT6x27RP2 0x0121 768 #define PCI_DEVICE_ID_VORTEX_GDT6537RP2 0x0122 769 #define PCI_DEVICE_ID_VORTEX_GDT6557RP2 0x0123 770 #define PCI_DEVICE_ID_VORTEX_GDT6x11RP2 0x0124 771 #define PCI_DEVICE_ID_VORTEX_GDT6x21RP2 0x0125 772 773 #define PCI_VENDOR_ID_EF 0x111a 774 #define PCI_DEVICE_ID_EF_ATM_FPGA 0x0000 775 #define PCI_DEVICE_ID_EF_ATM_ASIC 0x0002 776 777 #define PCI_VENDOR_ID_FORE 0x1127 778 #define PCI_DEVICE_ID_FORE_PCA200PC 0x0210 779 #define PCI_DEVICE_ID_FORE_PCA200E 0x0300 780 781 #define PCI_VENDOR_ID_IMAGINGTECH 0x112f 782 #define PCI_DEVICE_ID_IMAGINGTECH_ICPCI 0x0000 783 784 #define PCI_VENDOR_ID_PHILIPS 0x1131 785 #define PCI_DEVICE_ID_PHILIPS_SAA7145 0x7145 786 #define PCI_DEVICE_ID_PHILIPS_SAA7146 0x7146 787 788 #define PCI_VENDOR_ID_CYCLONE 0x113c 789 #define PCI_DEVICE_ID_CYCLONE_SDK 0x0001 790 791 #define PCI_VENDOR_ID_ALLIANCE 0x1142 792 #define PCI_DEVICE_ID_ALLIANCE_PROMOTIO 0x3210 793 #define PCI_DEVICE_ID_ALLIANCE_PROVIDEO 0x6422 794 #define PCI_DEVICE_ID_ALLIANCE_AT24 0x6424 795 #define PCI_DEVICE_ID_ALLIANCE_AT3D 0x643d 796 797 #define PCI_VENDOR_ID_SK 0x1148 798 #define PCI_DEVICE_ID_SK_FP 0x4000 799 #define PCI_DEVICE_ID_SK_TR 0x4200 800 #define PCI_DEVICE_ID_SK_GE 0x4300 801 802 #define PCI_VENDOR_ID_VMIC 0x114a 803 #define PCI_DEVICE_ID_VMIC_VME 0x7587 804 805 #define PCI_VENDOR_ID_DIGI 0x114f 806 #define PCI_DEVICE_ID_DIGI_EPC 0x0002 807 #define PCI_DEVICE_ID_DIGI_RIGHTSWITCH 0x0003 808 #define PCI_DEVICE_ID_DIGI_XEM 0x0004 809 #define PCI_DEVICE_ID_DIGI_XR 0x0005 810 #define PCI_DEVICE_ID_DIGI_CX 0x0006 811 #define PCI_DEVICE_ID_DIGI_XRJ 0x0009 812 #define PCI_DEVICE_ID_DIGI_EPCJ 0x000a 813 #define PCI_DEVICE_ID_DIGI_XR_920 0x0027 814 815 #define PCI_VENDOR_ID_MUTECH 0x1159 816 #define PCI_DEVICE_ID_MUTECH_MV1000 0x0001 817 818 #define PCI_VENDOR_ID_RENDITION 0x1163 819 #define PCI_DEVICE_ID_RENDITION_VERITE 0x0001 820 #define PCI_DEVICE_ID_RENDITION_VERITE2100 0x2000 821 822 #define PCI_VENDOR_ID_TOSHIBA 0x1179 823 #define PCI_DEVICE_ID_TOSHIBA_601 0x0601 824 #define PCI_DEVICE_ID_TOSHIBA_TOPIC95 0x060a 825 #define PCI_DEVICE_ID_TOSHIBA_TOPIC97 0x060f 826 827 #define PCI_VENDOR_ID_RICOH 0x1180 828 #define PCI_DEVICE_ID_RICOH_RL5C465 0x0465 829 #define PCI_DEVICE_ID_RICOH_RL5C466 0x0466 830 #define PCI_DEVICE_ID_RICOH_RL5C475 0x0475 831 #define PCI_DEVICE_ID_RICOH_RL5C478 0x0478 832 833 #define PCI_VENDOR_ID_ARTOP 0x1191 834 #define PCI_DEVICE_ID_ARTOP_ATP8400 0x0004 835 #define PCI_DEVICE_ID_ARTOP_ATP850UF 0x0005 836 837 #define PCI_VENDOR_ID_ZEITNET 0x1193 838 #define PCI_DEVICE_ID_ZEITNET_1221 0x0001 839 #define PCI_DEVICE_ID_ZEITNET_1225 0x0002 840 841 #define PCI_VENDOR_ID_OMEGA 0x119b 842 #define PCI_DEVICE_ID_OMEGA_82C092G 0x1221 843 844 #define PCI_VENDOR_ID_LITEON 0x11ad 845 #define PCI_DEVICE_ID_LITEON_LNE100TX 0x0002 846 847 #define PCI_VENDOR_ID_NP 0x11bc 848 #define PCI_DEVICE_ID_NP_PCI_FDDI 0x0001 849 850 #define PCI_VENDOR_ID_ATT 0x11c1 851 #define PCI_DEVICE_ID_ATT_L56XMF 0x0440 852 853 #define PCI_VENDOR_ID_SPECIALIX 0x11cb 854 #define PCI_DEVICE_ID_SPECIALIX_IO8 0x2000 855 #define PCI_DEVICE_ID_SPECIALIX_XIO 0x4000 856 #define PCI_DEVICE_ID_SPECIALIX_RIO 0x8000 857 858 #define PCI_VENDOR_ID_AURAVISION 0x11d1 859 #define PCI_DEVICE_ID_AURAVISION_VXP524 0x01f7 860 861 #define PCI_VENDOR_ID_IKON 0x11d5 862 #define PCI_DEVICE_ID_IKON_10115 0x0115 863 #define PCI_DEVICE_ID_IKON_10117 0x0117 864 865 #define PCI_VENDOR_ID_ZORAN 0x11de 866 #define PCI_DEVICE_ID_ZORAN_36057 0x6057 867 #define PCI_DEVICE_ID_ZORAN_36120 0x6120 868 869 #define PCI_VENDOR_ID_KINETIC 0x11f4 870 #define PCI_DEVICE_ID_KINETIC_2915 0x2915 871 872 #define PCI_VENDOR_ID_COMPEX 0x11f6 873 #define PCI_DEVICE_ID_COMPEX_ENET100VG4 0x0112 874 #define PCI_DEVICE_ID_COMPEX_RL2000 0x1401 875 876 #define PCI_VENDOR_ID_RP 0x11fe 877 #define PCI_DEVICE_ID_RP32INTF 0x0001 878 #define PCI_DEVICE_ID_RP8INTF 0x0002 879 #define PCI_DEVICE_ID_RP16INTF 0x0003 880 #define PCI_DEVICE_ID_RP4QUAD 0x0004 881 #define PCI_DEVICE_ID_RP8OCTA 0x0005 882 #define PCI_DEVICE_ID_RP8J 0x0006 883 #define PCI_DEVICE_ID_RPP4 0x000A 884 #define PCI_DEVICE_ID_RPP8 0x000B 885 #define PCI_DEVICE_ID_RP8M 0x000C 886 887 #define PCI_VENDOR_ID_CYCLADES 0x120e 888 #define PCI_DEVICE_ID_CYCLOM_Y_Lo 0x0100 889 #define PCI_DEVICE_ID_CYCLOM_Y_Hi 0x0101 890 #define PCI_DEVICE_ID_CYCLOM_Z_Lo 0x0200 891 #define PCI_DEVICE_ID_CYCLOM_Z_Hi 0x0201 892 893 #define PCI_VENDOR_ID_ESSENTIAL 0x120f 894 #define PCI_DEVICE_ID_ESSENTIAL_ROADRUNNER 0x0001 895 896 #define PCI_VENDOR_ID_O2 0x1217 897 #define PCI_DEVICE_ID_O2_6729 0x6729 898 #define PCI_DEVICE_ID_O2_6730 0x673a 899 #define PCI_DEVICE_ID_O2_6832 0x6832 900 #define PCI_DEVICE_ID_O2_6836 0x6836 901 902 #define PCI_VENDOR_ID_3DFX 0x121a 903 #define PCI_DEVICE_ID_3DFX_VOODOO 0x0001 904 #define PCI_DEVICE_ID_3DFX_VOODOO2 0x0002 905 906 #define PCI_VENDOR_ID_SIGMADES 0x1236 907 #define PCI_DEVICE_ID_SIGMADES_6425 0x6401 908 909 #define PCI_VENDOR_ID_CCUBE 0x123f 910 911 #define PCI_VENDOR_ID_DIPIX 0x1246 912 913 #define PCI_VENDOR_ID_STALLION 0x124d 914 #define PCI_DEVICE_ID_STALLION_ECHPCI832 0x0000 915 #define PCI_DEVICE_ID_STALLION_ECHPCI864 0x0002 916 #define PCI_DEVICE_ID_STALLION_EIOPCI 0x0003 917 918 #define PCI_VENDOR_ID_OPTIBASE 0x1255 919 #define PCI_DEVICE_ID_OPTIBASE_FORGE 0x1110 920 #define PCI_DEVICE_ID_OPTIBASE_FUSION 0x1210 921 #define PCI_DEVICE_ID_OPTIBASE_VPLEX 0x2110 922 #define PCI_DEVICE_ID_OPTIBASE_VPLEXCC 0x2120 923 #define PCI_DEVICE_ID_OPTIBASE_VQUEST 0x2130 924 925 #define PCI_VENDOR_ID_SATSAGEM 0x1267 926 #define PCI_DEVICE_ID_SATSAGEM_PCR2101 0x5352 927 #define PCI_DEVICE_ID_SATSAGEM_TELSATTURBO 0x5a4b 928 929 #define PCI_VENDOR_ID_HUGHES 0x1273 930 #define PCI_DEVICE_ID_HUGHES_DIRECPC 0x0002 931 932 #define PCI_VENDOR_ID_ENSONIQ 0x1274 933 #define PCI_DEVICE_ID_ENSONIQ_AUDIOPCI 0x5000 934 935 #define PCI_VENDOR_ID_ALTEON 0x12ae 936 #define PCI_DEVICE_ID_ALTEON_ACENIC 0x0001 937 938 #define PCI_VENDOR_ID_PICTUREL 0x12c5 939 #define PCI_DEVICE_ID_PICTUREL_PCIVST 0x0081 940 941 #define PCI_VENDOR_ID_NVIDIA_SGS 0x12d2 942 #define PCI_DEVICE_ID_NVIDIA_SGS_RIVA128 0x0018 943 944 #define PCI_VENDOR_ID_CBOARDS 0x1307 945 #define PCI_DEVICE_ID_CBOARDS_DAS1602_16 0x0001 946 947 #define PCI_VENDOR_ID_SYMPHONY 0x1c1c 948 #define PCI_DEVICE_ID_SYMPHONY_101 0x0001 949 950 #define PCI_VENDOR_ID_TEKRAM 0x1de1 951 #define PCI_DEVICE_ID_TEKRAM_DC290 0xdc29 952 953 #define PCI_VENDOR_ID_3DLABS 0x3d3d 954 #define PCI_DEVICE_ID_3DLABS_300SX 0x0001 955 #define PCI_DEVICE_ID_3DLABS_500TX 0x0002 956 #define PCI_DEVICE_ID_3DLABS_DELTA 0x0003 957 #define PCI_DEVICE_ID_3DLABS_PERMEDIA 0x0004 958 #define PCI_DEVICE_ID_3DLABS_MX 0x0006 959 960 #define PCI_VENDOR_ID_AVANCE 0x4005 961 #define PCI_DEVICE_ID_AVANCE_ALG2064 0x2064 962 #define PCI_DEVICE_ID_AVANCE_2302 0x2302 963 964 #define PCI_VENDOR_ID_NETVIN 0x4a14 965 #define PCI_DEVICE_ID_NETVIN_NV5000SC 0x5000 966 967 #define PCI_VENDOR_ID_S3 0x5333 968 #define PCI_DEVICE_ID_S3_PLATO_PXS 0x0551 969 #define PCI_DEVICE_ID_S3_ViRGE 0x5631 970 #define PCI_DEVICE_ID_S3_TRIO 0x8811 971 #define PCI_DEVICE_ID_S3_AURORA64VP 0x8812 972 #define PCI_DEVICE_ID_S3_TRIO64UVP 0x8814 973 #define PCI_DEVICE_ID_S3_ViRGE_VX 0x883d 974 #define PCI_DEVICE_ID_S3_868 0x8880 975 #define PCI_DEVICE_ID_S3_928 0x88b0 976 #define PCI_DEVICE_ID_S3_864_1 0x88c0 977 #define PCI_DEVICE_ID_S3_864_2 0x88c1 978 #define PCI_DEVICE_ID_S3_964_1 0x88d0 979 #define PCI_DEVICE_ID_S3_964_2 0x88d1 980 #define PCI_DEVICE_ID_S3_968 0x88f0 981 #define PCI_DEVICE_ID_S3_TRIO64V2 0x8901 982 #define PCI_DEVICE_ID_S3_PLATO_PXG 0x8902 983 #define PCI_DEVICE_ID_S3_ViRGE_DXGX 0x8a01 984 #define PCI_DEVICE_ID_S3_ViRGE_GX2 0x8a10 985 #define PCI_DEVICE_ID_S3_ViRGE_MX 0x8c01 986 #define PCI_DEVICE_ID_S3_ViRGE_MXP 0x8c02 987 #define PCI_DEVICE_ID_S3_ViRGE_MXPMV 0x8c03 988 #define PCI_DEVICE_ID_S3_SONICVIBES 0xca00 989 990 #define PCI_VENDOR_ID_INTEL 0x8086 991 #define PCI_DEVICE_ID_INTEL_82375 0x0482 992 #define PCI_DEVICE_ID_INTEL_82424 0x0483 993 #define PCI_DEVICE_ID_INTEL_82378 0x0484 994 #define PCI_DEVICE_ID_INTEL_82430 0x0486 995 #define PCI_DEVICE_ID_INTEL_82434 0x04a3 996 #define PCI_DEVICE_ID_INTEL_82092AA_0 0x1221 997 #define PCI_DEVICE_ID_INTEL_82092AA_1 0x1222 998 #define PCI_DEVICE_ID_INTEL_7116 0x1223 999 #define PCI_DEVICE_ID_INTEL_82596 0x1226 1000 #define PCI_DEVICE_ID_INTEL_82865 0x1227 1001 #define PCI_DEVICE_ID_INTEL_82557 0x1229 1002 #define PCI_DEVICE_ID_INTEL_82437 0x122d 1003 #define PCI_DEVICE_ID_INTEL_82371FB_0 0x122e 1004 #define PCI_DEVICE_ID_INTEL_82371FB_1 0x1230 1005 #define PCI_DEVICE_ID_INTEL_82371MX 0x1234 1006 #define PCI_DEVICE_ID_INTEL_82437MX 0x1235 1007 #define PCI_DEVICE_ID_INTEL_82441 0x1237 1008 #define PCI_DEVICE_ID_INTEL_82380FB 0x124b 1009 #define PCI_DEVICE_ID_INTEL_82439 0x1250 1010 #define PCI_DEVICE_ID_INTEL_82371SB_0 0x7000 1011 #define PCI_DEVICE_ID_INTEL_82371SB_1 0x7010 1012 #define PCI_DEVICE_ID_INTEL_82371SB_2 0x7020 1013 #define PCI_DEVICE_ID_INTEL_82437VX 0x7030 1014 #define PCI_DEVICE_ID_INTEL_82439TX 0x7100 1015 #define PCI_DEVICE_ID_INTEL_82371AB_0 0x7110 1016 #define PCI_DEVICE_ID_INTEL_82371AB 0x7111 1017 #define PCI_DEVICE_ID_INTEL_82371AB_2 0x7112 1018 #define PCI_DEVICE_ID_INTEL_82371AB_3 0x7113 1019 #define PCI_DEVICE_ID_INTEL_82443LX_0 0x7180 1020 #define PCI_DEVICE_ID_INTEL_82443LX_1 0x7181 1021 #define PCI_DEVICE_ID_INTEL_82443BX_0 0x7190 1022 #define PCI_DEVICE_ID_INTEL_82443BX_1 0x7191 1023 #define PCI_DEVICE_ID_INTEL_82443BX_2 0x7192 1024 #define PCI_DEVICE_ID_INTEL_P6 0x84c4 1025 #define PCI_DEVICE_ID_INTEL_82450GX 0x84c5 1026 1027 #define PCI_VENDOR_ID_KTI 0x8e2e 1028 #define PCI_DEVICE_ID_KTI_ET32P2 0x3000 1029 1030 #define PCI_VENDOR_ID_ADAPTEC 0x9004 1031 #define PCI_DEVICE_ID_ADAPTEC_7810 0x1078 1032 #define PCI_DEVICE_ID_ADAPTEC_7850 0x5078 1033 #define PCI_DEVICE_ID_ADAPTEC_7855 0x5578 1034 #define PCI_DEVICE_ID_ADAPTEC_5800 0x5800 1035 #define PCI_DEVICE_ID_ADAPTEC_1480A 0x6075 1036 #define PCI_DEVICE_ID_ADAPTEC_7860 0x6078 1037 #define PCI_DEVICE_ID_ADAPTEC_7861 0x6178 1038 #define PCI_DEVICE_ID_ADAPTEC_7870 0x7078 1039 #define PCI_DEVICE_ID_ADAPTEC_7871 0x7178 1040 #define PCI_DEVICE_ID_ADAPTEC_7872 0x7278 1041 #define PCI_DEVICE_ID_ADAPTEC_7873 0x7378 1042 #define PCI_DEVICE_ID_ADAPTEC_7874 0x7478 1043 #define PCI_DEVICE_ID_ADAPTEC_7895 0x7895 1044 #define PCI_DEVICE_ID_ADAPTEC_7880 0x8078 1045 #define PCI_DEVICE_ID_ADAPTEC_7881 0x8178 1046 #define PCI_DEVICE_ID_ADAPTEC_7882 0x8278 1047 #define PCI_DEVICE_ID_ADAPTEC_7883 0x8378 1048 #define PCI_DEVICE_ID_ADAPTEC_7884 0x8478 1049 #define PCI_DEVICE_ID_ADAPTEC_1030 0x8b78 1050 1051 #define PCI_VENDOR_ID_ADAPTEC2 0x9005 1052 #define PCI_DEVICE_ID_ADAPTEC2_2940U2 0x0010 1053 #define PCI_DEVICE_ID_ADAPTEC2_7890 0x001f 1054 #define PCI_DEVICE_ID_ADAPTEC2_3940U2 0x0050 1055 #define PCI_DEVICE_ID_ADAPTEC2_7896 0x005f 1056 1057 #define PCI_VENDOR_ID_ATRONICS 0x907f 1058 #define PCI_DEVICE_ID_ATRONICS_2015 0x2015 1059 1060 #define PCI_VENDOR_ID_HOLTEK 0x9412 1061 #define PCI_DEVICE_ID_HOLTEK_6565 0x6565 1062 1063 #define PCI_VENDOR_ID_TIGERJET 0xe159 1064 #define PCI_DEVICE_ID_TIGERJET_300 0x0001 1065 1066 #define PCI_VENDOR_ID_ARK 0xedd8 1067 #define PCI_DEVICE_ID_ARK_STING 0xa091 1068 #define PCI_DEVICE_ID_ARK_STINGARK 0xa099 1069 #define PCI_DEVICE_ID_ARK_2000MT 0xa0a1 1062 1070 /* 1063 1071 * The PCI interface treats multi-function devices as independent … … 1065 1073 * in a single byte as follows: 1066 1074 * 1067 * 1068 * 1075 * 7:3 = slot 1076 * 2:0 = function 1069 1077 */ 1070 #define PCI_DEVFN( slot,func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))1071 #define PCI_SLOT( devfn) (((devfn) >> 3) & 0x1f)1072 #define PCI_FUNC( devfn) ((devfn) & 0x07)1078 #define PCI_DEVFN(_slot,_func) ((((_slot) & 0x1f) << 3) | ((_func) & 0x07)) 1079 #define PCI_SLOT(_devfn) (((_devfn) >> 3) & 0x1f) 1080 #define PCI_FUNC(_devfn) ((_devfn) & 0x07) 1073 1081 1074 1082 /* 1075 1083 * Error values that may be returned by the PCI bios. 1076 1084 */ 1077 #define PCIBIOS_SUCCESSFUL 1078 #define PCIBIOS_FUNC_NOT_SUPPORTED 1079 #define PCIBIOS_BAD_VENDOR_ID 1080 #define PCIBIOS_DEVICE_NOT_FOUND 1081 #define PCIBIOS_BAD_REGISTER_NUMBER 1082 #define PCIBIOS_SET_FAILED 1083 #define PCIBIOS_BUFFER_TOO_SMALL 1085 #define PCIBIOS_SUCCESSFUL 0x00 1086 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81 1087 #define PCIBIOS_BAD_VENDOR_ID 0x83 1088 #define PCIBIOS_DEVICE_NOT_FOUND 0x86 1089 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87 1090 #define PCIBIOS_SET_FAILED 0x88 1091 #define PCIBIOS_BUFFER_TOO_SMALL 0x89 1084 1092 1085 1093 /* T. Straumann, 7/31/2001: increased to 32 - PMC slots are not 1086 1094 * scanned on mvme2306 otherwise 1087 1095 */ 1088 #define PCI_MAX_DEVICES 1089 #define PCI_MAX_FUNCTIONS 1096 #define PCI_MAX_DEVICES 32 1097 #define PCI_MAX_FUNCTIONS 8 1090 1098 1091 1099 typedef struct { 1092 int (*read_config_byte)(unsigned char, unsigned char, unsigned char, 1093 unsigned char, unsigned char *); 1094 int (*read_config_word)(unsigned char, unsigned char, unsigned char, 1095 unsigned char, unsigned short *); 1096 int (*read_config_dword)(unsigned char, unsigned char, unsigned char, 1097 unsigned char, unsigned int *); 1098 int (*write_config_byte)(unsigned char, unsigned char, unsigned char, 1099 unsigned char, unsigned char); 1100 int (*write_config_word)(unsigned char, unsigned char, unsigned char, 1101 unsigned char, unsigned short); 1102 int (*write_config_dword)(unsigned char, unsigned char, unsigned char, 1103 unsigned char, unsigned int); 1104 }pci_config_access_functions; 1100 int (*read_config_byte)(unsigned char, unsigned char, unsigned char, 1101 unsigned char, unsigned char *); 1102 int (*read_config_word)(unsigned char, unsigned char, unsigned char, 1103 unsigned char, unsigned short *); 1104 int (*read_config_dword)(unsigned char, unsigned char, unsigned char, 1105 unsigned char, unsigned int *); 1106 int (*write_config_byte)(unsigned char, unsigned char, unsigned char, 1107 unsigned char, unsigned char); 1108 int (*write_config_word)(unsigned char, unsigned char, unsigned char, 1109 unsigned char, unsigned short); 1110 int (*write_config_dword)(unsigned char, unsigned char, unsigned char, 1111 unsigned char, unsigned int); 1112 } pci_config_access_functions; 1113 1114 /* Error codes for pci_initialize */ 1115 #define PCIB_ERR_SUCCESS (0) 1116 #define PCIB_ERR_UNINITIALIZED (-1) /* PCI BIOS is not initilized */ 1117 #define PCIB_ERR_NOTPRESENT (-2) /* PCI BIOS not present */ 1118 #define PCIB_ERR_NOFUNC (-3) /* Function not supported */ 1119 #define PCIB_ERR_BADVENDOR (-4) /* Bad Vendor ID */ 1120 #define PCIB_ERR_DEVNOTFOUND (-5) /* Device not found */ 1121 #define PCIB_ERR_BADREG (-6) /* Bad register number */ 1122 1123 extern int pci_initialize(); 1105 1124 1106 1125 typedef struct { 1107 volatile unsigned char* 1108 volatile unsigned char* 1109 const pci_config_access_functions* 1126 volatile unsigned char* pci_config_addr; 1127 volatile unsigned char* pci_config_data; 1128 const pci_config_access_functions* pci_functions; 1110 1129 } pci_config; 1111 1130 … … 1113 1132 1114 1133 extern inline int 1115 pci_read_config_byte(unsigned char bus, unsigned char slot, unsigned char function, 1116 unsigned char where, unsigned char * val) { 1117 return BSP_pci_configuration.pci_functions->read_config_byte(bus, slot, function, where, val); 1134 pci_read_config_byte( 1135 unsigned char bus, 1136 unsigned char slot, 1137 unsigned char function, 1138 unsigned char where, 1139 unsigned char * val) 1140 { 1141 return BSP_pci_configuration.pci_functions->read_config_byte( 1142 bus, slot, function, where, val); 1118 1143 } 1119 1144 1120 1145 extern inline int 1121 pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char function, 1122 unsigned char where, unsigned short * val) { 1123 return BSP_pci_configuration.pci_functions->read_config_word(bus, slot, function, where, val); 1146 pci_read_config_word( 1147 unsigned char bus, 1148 unsigned char slot, 1149 unsigned char function, 1150 unsigned char where, 1151 unsigned short * val) 1152 { 1153 return BSP_pci_configuration.pci_functions->read_config_word( 1154 bus, slot, function, where, val); 1124 1155 } 1125 1156 1126 1157 extern inline int 1127 pci_read_config_dword(unsigned char bus, unsigned char slot, unsigned char function, 1128 unsigned char where, unsigned int * val) { 1129 return BSP_pci_configuration.pci_functions->read_config_dword(bus, slot, function, where, val); 1158 pci_read_config_dword( 1159 unsigned char bus, 1160 unsigned char slot, 1161 unsigned char function, 1162 unsigned char where, 1163 unsigned int * val) 1164 { 1165 return BSP_pci_configuration.pci_functions->read_config_dword(bus, slot, function, where, val); 1130 1166 } 1131 1167 1132 1168 extern inline int 1133 pci_write_config_byte(unsigned char bus, unsigned char slot, unsigned char function, 1134 unsigned char where, unsigned char val) { 1135 return BSP_pci_configuration.pci_functions->write_config_byte(bus, slot, function, where, val); 1169 pci_write_config_byte( 1170 unsigned char bus, 1171 unsigned char slot, 1172 unsigned char function, 1173 unsigned char where, 1174 unsigned char val) 1175 { 1176 return BSP_pci_configuration.pci_functions->write_config_byte( 1177 bus, slot, function, where, val); 1136 1178 } 1137 1179 1138 1180 extern inline int 1139 pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char function, 1140 unsigned char where, unsigned short val) { 1141 return BSP_pci_configuration.pci_functions->write_config_word(bus, slot, function, where, val); 1181 pci_write_config_word( 1182 unsigned char bus, 1183 unsigned char slot, 1184 unsigned char function, 1185 unsigned char where, 1186 unsigned short val) 1187 { 1188 return BSP_pci_configuration.pci_functions->write_config_word( 1189 bus, slot, function, where, val); 1142 1190 } 1143 1191 1144 1192 extern inline int 1145 pci_write_config_dword(unsigned char bus, unsigned char slot, unsigned char function, 1146 unsigned char where, unsigned int val) { 1147 return BSP_pci_configuration.pci_functions->write_config_dword(bus, slot, function, where, val); 1193 pci_write_config_dword( 1194 unsigned char bus, 1195 unsigned char slot, 1196 unsigned char function, 1197 unsigned char where, 1198 unsigned int val) 1199 { 1200 return BSP_pci_configuration.pci_functions->write_config_dword( 1201 bus, slot, function, where, val); 1148 1202 } 1149 1203 … … 1152 1206 */ 1153 1207 extern unsigned char BusCountPCI(); 1154 extern void InitializePCI();1155 1208 1156 1209 #endif /* _RTEMS_PCI_H */
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