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Changeset b335c503 in rtems
- Timestamp:
- 04/20/01 13:14:55 (22 years ago)
- Branches:
- 4.10, 4.11, 4.8, 4.9, 5, master
- Children:
- b85df34
- Parents:
- 831aba1
- Location:
- c/src/lib/libbsp/mips/jmr3904
- Files:
-
- 5 edited
-
ChangeLog (modified) (1 diff)
-
include/bsp.h (modified) (1 diff)
-
start/start.S (modified) (9 diffs)
-
startup/linkcmds (modified) (1 diff)
-
timer/timer.c (modified) (2 diffs)
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libbsp/mips/jmr3904/ChangeLog
r831aba1 rb335c503 1 2001-04-20 Joel Sherrill <joel@OARcorp.com> 2 3 * include/bsp.h (Clear_tm27_intr): Stop the timer and disable 4 the interrupt. This was not quite right before and we were 5 getting uncontrolled interrupt nesting in tm27. 6 * timer/timer.c (Timer_Initialize): Added an extra reset and 7 changed the ITMR register so we will never get an interrupt. 8 (Read_timer): Fixed so the timer actually stops before it 9 is read. Before some times reported were outraguously high. 10 * start/start.S: Major clean including using stack in linkcmds, 11 deleting unused code, and zeroing the BSS using the linkcmds 12 information. 13 * startup/linkcmds: Put heap in lower memory than workspace 14 and move _clear_end so both are zeroed. 15 1 16 2001-01-12 Joel Sherrill <joel@OARcorp.com> 2 17 -
c/src/lib/libbsp/mips/jmr3904/include/bsp.h
r831aba1 rb335c503 75 75 76 76 #define Clear_tm27_intr() \ 77 TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TCR, 0x03 ); 77 do { \ 78 TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_ITMR, 0x0001 ); \ 79 TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CCDR, 0x3 ); \ 80 TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TISR, 0x00 ); \ 81 } while(0) 78 82 79 83 #define Lower_tm27_intr() \ -
c/src/lib/libbsp/mips/jmr3904/start/start.S
r831aba1 rb335c503 18 18 */ 19 19 20 #include <asm.h> 21 #include "regs.S" 22 20 23 #ifdef __mips16 21 24 /* This file contains 32 bit assembly code. */ 22 25 .set nomips16 23 26 #endif 24 25 #include <asm.h>26 #include "regs.S"27 28 /*29 * Set up some room for a stack. We just grab a chunk of memory.30 */31 #define STACK_SIZE 0x400032 #define GLOBAL_SIZE 0x200033 34 #define STARTUP_STACK_SIZE 0x010035 27 36 28 /* This is for referencing addresses that are not in the .sdata or … … 45 37 # define LA(t,x) la t,x 46 38 #endif /* __mips_embedded_pic */ 47 48 .comm __memsize, 1249 .comm __lstack, STARTUP_STACK_SIZE50 .comm __stackbase,451 39 52 40 .text … … 63 51 _start: 64 52 .set noreorder 53 # Get the address of start into $5 in a position independent fashion. 54 # This lets us know whether we have been relocated or not. 55 56 $LF1 = . + 8 57 bal $LF1 58 nop 59 _branch: 60 move $5, $31 # $5 == where are we 61 li $6, 0x8800000c # $6 == where we want to be 62 #la $6,_branch 63 beq $5, $6, _start_in_ram 64 nop 65 # relocate the code from EEPROM to RAM 66 la $7, _edata 67 relocate: 68 lw $8, ($5) # $8 = *EEPROM 69 addu $5, $5, 4 # EEPROM++ 70 sw $8, ($6) # *RAM = $8 71 addu $6, $6, 4 # RAM++ 72 bne $6, $7, relocate # copied all the way to edata? 73 nop 74 la $6, _start_in_ram 75 jr $6 76 nop 77 .end _start 78 79 80 .globl _start_in_ram 81 .ent _start_in_ram 82 _start_in_ram: 83 nop 84 65 85 #ifdef __mips_embedded_pic 66 86 PICBASE = .+8 … … 112 132 */ 113 133 .globl __memsize 114 .globl get_mem_info .text115 .globl __stack116 .globl __global117 134 .globl zerobss 118 135 .ent zerobss … … 125 142 addiu v0,v0,4 # executed in delay slot 126 143 127 la t0, __lstack # make a small stack so we 128 addiu sp, t0, STARTUP_STACK_SIZE # can run some C code 129 la a0, __memsize # get the usable memory size 130 jal get_mem_info 131 nop 132 133 /* setup the stack pointer */ 134 LA (t0, __stack) # is __stack set ? 135 bne t0,zero,4f 136 nop 137 138 /* NOTE: a0[0] contains the amount of memory available, and 139 not the last memory address. */ 140 lw t0,0(a0) # last address of memory available 141 la t1,K0BASE # cached kernel memory 142 addu t0,t0,t1 # get the end of memory address 144 la t0, _stack_init # initialize stack so we 143 145 /* We must subtract 24 bytes for the 3 8 byte arguments to main, in 144 146 case main wants to write them back to the stack. The caller is … … 150 152 32, which satisifes the stack for the arguments and keeps the 151 153 stack pointer better aligned. */ 152 subu t0,t0,32 # and generate a starting stack-pointer 153 4: 154 subu t0,t0,32 154 155 move sp,t0 # set stack pointer 155 sw sp,__stackbase # keep this for future ref156 156 .end zerobss 157 157 158 /*159 * initialize target specific stuff. Only execute these160 * functions it they exist.161 */162 #if 0163 .globl hardware_init_hook .text164 .globl software_init_hook .text165 .globl __do_global_dtors .text166 .globl atexit .text167 #endif168 158 .globl exit .text 169 159 .globl init 170 160 .ent init 171 161 init: 172 #if 0173 LA (t9, hardware_init_hook) # init the hardware if needed174 beq t9,zero,6f175 nop176 jal t9177 nop178 6:179 LA (t9, software_init_hook) # init the hardware if needed180 beq t9,zero,7f181 nop182 jal t9183 nop184 7:185 LA (a0, __do_global_dtors)186 jal atexit187 nop188 #endif189 190 #ifdef GCRT0191 .globl _ftext192 .globl _extext193 LA (a0, _ftext)194 LA (a1, _etext)195 jal monstartup196 nop197 #endif198 162 199 163 move a0,zero # set argc to 0 … … 202 166 203 167 # fall through to the "exit" routine 204 jal exit# call libc exit to run the G++168 jal _sys_exit # call libc exit to run the G++ 205 169 # destructors 206 170 move a0,v0 # pass through the exit code … … 208 172 209 173 /* 210 * Exit from the application. Normally we cause a user trap211 * to return to the ROM monitor for another run. NOTE: This is212 * the only other routine we provide in the crt0.o object, since213 * it may be tied to the "_start" routine. It also allows214 * executables that contain a complete world to be linked with215 * just the crt0.o object.174 * _sys_exit -- Exit from the application. Normally we cause a user trap 175 * to return to the ROM monitor for another run. NOTE: This is 176 * the only other routine we provide in the crt0.o object, since 177 * it may be tied to the "_start" routine. It also allows 178 * executables that contain a complete world to be linked with 179 * just the crt0.o object. 216 180 */ 217 218 FRAME(_sys_exit,sp,0,ra) 181 .globl _sys_exit 182 .ent _sys_exit 183 _sys_exit: 219 184 7: 220 185 #ifdef GCRT0 … … 227 192 b 7b # but loop back just in-case 228 193 nop 229 ENDFRAME(_sys_exit) 194 .end _sys_exit 230 195 231 196 /* EOF crt0.S */ -
c/src/lib/libbsp/mips/jmr3904/startup/linkcmds
r831aba1 rb335c503 109 109 __stack = .; 110 110 _stack_init = .; 111 _clear_end = .; 111 HeapBase = .; 112 . += HeapSize; /* reserve some memory for heap */ 112 113 WorkspaceBase = .; 113 114 /* HACK -- tied to value bspstart */ 114 115 . += 4096K; /* reserve some memory for workspace */ 115 HeapBase = .; 116 . += HeapSize; /* reserve some memory for heap */ 116 _clear_end = .; 117 117 } 118 118 end = .; -
c/src/lib/libbsp/mips/jmr3904/timer/timer.c
r831aba1 rb335c503 32 32 */ 33 33 34 TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TCR, 0x20 ); 34 35 TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_CCDR, 0x3 ); 35 36 TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TRR, 0x0 ); 36 37 TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_CPRA, 0xFFFFFFFF ); 37 38 TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TISR, 0x00 ); 38 TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_ITMR, 0x8001 ); 39 TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TCR, 0x20 ); 39 TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_ITMR, 0x0001 ); 40 40 TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TCR, 0xe0 ); 41 41 } … … 50 50 rtems_unsigned32 total; 51 51 52 TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TCR, 0x03 );53 52 total = TX3904_TIMER_READ( TX3904_TIMER1_BASE, TX3904_TIMER_TRR ); 54 53
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