Changeset b2da982 in rtems


Ignore:
Timestamp:
Apr 21, 2020, 9:57:50 AM (17 months ago)
Author:
Daniel Hellstrom <daniel@…>
Branches:
master
Children:
a26a326
Parents:
89d90c0
git-author:
Daniel Hellstrom <daniel@…> (04/21/20 09:57:50)
git-committer:
Daniel Hellstrom <daniel@…> (03/11/21 16:35:28)
Message:

leon,tn-0018: work around GRLIB-TN-0018 errata

Overview
========

The errata is worked around in the kernel without requiring toolchain
modifications. It is triggered the JMPL/RETT return from trap instruction
sequence never generated by the compiler and. There are also other
conditions that must must be true to trigger the errata, for example the
instruction that the trap returns to has to be a JMPL instruction. The
errata can only be triggered if certain data is corrected by ECC
(inflicted by radiation), thus it can not be triggered under normal
operation. For more information see:

www.gaisler.com/notes

Affected RTEMS target BSPs:

  • GR712RC
  • UT699
  • UT700/699E

The work around is enabled by defining FIX_LEON3_TN0018 at build time.
After applying the following GCC patch, GCC will set the define when
compiling for an affected multilib:

  • GR712RC (-mcpu=leon3 -mfix-gr712rc)
  • UT700/UT699E (-mpcu=leon3 -mfix-ut700)
  • UT699 (-mcpu=leon -mfix-ut699)

When building for another multilib and TN0018 is still required, it
is possible to enable it on the RTEMS kernel configure line using the
TARGET_CFLAGS (-DFIX_LEON3FT_TN0018) or other by other means.

The following GCC patch sets FIX_LEON3FT_TN0018 for the affected RTEMS
multilibs:


diff --git a/gcc/config/sparc/rtemself.h b/gcc/config/sparc/rtemself.h
index 6570590..ddec98c 100644
--- a/gcc/config/sparc/rtemself.h
+++ b/gcc/config/sparc/rtemself.h
@@ -33,6 +33,8 @@

builtin_assert ("system=rtems"); \
if (sparc_fix_b2bst) \

builtin_define ("FIX_LEON3FT_B2BST"); \

+ if (sparc_fix_gr712rc sparc_fix_ut700 sparc_fix_ut699) \
+ builtin_define ("FIX_LEON3FT_TN0018"); \

} \

while (0)


Workaround Implementation
=========================

In general there are two approaches that the workaround uses:

A) avoid ECC restarting the RETT instruction
B) avoid returning from trap to a JMPL instruction

Where A) comes at a higher performance cost than B), so B) is used
where posssible. B) can be achived for certain returns from trap
handlers if trap entry is controlled by assembly, such as system calls.

A)
A special JMPL/RETT sequence where instruction cache is disabled
temporarily to avoid RETT containing ECC errors, and reading of RETT
source registers to "clean" them from incorrect ECC just before RETT
is executed.

B)
The work around prevents JMPL after system calls (TA instruction) and
modifies assembly code on return from traps jumping back to application
code. Note that for some traps the trapped instruction is always
re-executed and can therefore not trigger the errata, for example the
SAVE instruction causing window overflow or an float instruction causing
FPU disabled trap.

RTEMS SPARC traps workaround implementation:

NAME NOTE TRAP COMMENT

  • window overflow 1 - 0x05 always returns to a SAVE
  • window underflow 1 - 0x06 always returns to a RESTORE
  • interrupt traps 2 - 0x10..1f special rett sequence workaround
  • syscall 3 - 0x80 shutdown system - never returns
  • ABI flush windows 2 - 0x83 special rett sequence workaround
  • syscall_irqdis 4 - 0x89
  • syscall_irqen 4 - 0x8A
  • syscall_irqdis_fp 1 - 0x8B always jumps back to FP instruction
  • syscall_lazy_fp_switch 5 - 0x04 A) jumps back to FP instruction, or to

B) _Internal_error() starting with SAVE

Notes:
1) no workaround needed because trap always returns to non-JMPL instruction
2) workaround implemented by special rett sequence
3) no workaround needed because system call never returns
4) workaround implemented by inserting NOP in system call generation. Thus

fall into 1) when workaround is enabled and no trap handler fix needed.

5) trap handler branches into both 1) and returning to _Internal_error()

which starts with a SAVE and besides since it shuts down the system that
RETT should never be in cache (only executed once) so fix not necessary
in this case.

Any custom trap handlers may also have to be updated. To simplify that,
helper work around assembly code in macros are available in a separate
include file <libcpu/grlib-tn-0018.h>.

Close #4155.

Files:
1 added
6 edited

Legend:

Unmodified
Added
Removed
  • cpukit/score/cpu/sparc/cpu_asm.S

    r89d90c0 rb2da982  
    2424#include <rtems/asm.h>
    2525#include <rtems/score/percpu.h>
     26#include <libcpu/grlib-tn-0018.h>
    2627
    2728#if defined(SPARC_USE_SYNCHRONOUS_FP_SWITCH)
     
    896897
    897898good_task_window:
     899        TN0018_WAIT_IFLUSH %l3,%l4         ! GRLIB-TN-0018 work around macro
    898900
    899901        mov     %l0, %psr                  !  **** DISABLE TRAPS ****
     
    901903                                           !  and restore condition codes.
    902904        ld      [%g1 + ISF_G1_OFFSET], %g1 ! restore g1
     905        TN0018_FIX %l3,%l4                 ! GRLIB-TN-0018 work around macro
    903906        jmp     %l1                        ! transfer control and
    904907        rett    %l2                        ! go back to tasks window
  • cpukit/score/cpu/sparc/headers.am

    r89d90c0 rb2da982  
    22include_libcpu_HEADERS += score/cpu/sparc/include/libcpu/access.h
    33include_libcpu_HEADERS += score/cpu/sparc/include/libcpu/byteorder.h
     4include_libcpu_HEADERS += score/cpu/sparc/include/libcpu/grlib-tn-0018.h
    45include_machine_HEADERS += score/cpu/sparc/include/machine/elf_machdep.h
    56include_rtems_HEADERS += score/cpu/sparc/include/rtems/asm.h
  • cpukit/score/cpu/sparc/include/rtems/score/sparc.h

    r89d90c0 rb2da982  
    405405{
    406406  register uint32_t psr __asm__("g1"); /* return value of trap handler */
     407#ifdef __FIX_LEON3FT_TN0018
     408  __asm__ volatile ( "ta %1\n\tnop\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
     409#else
    407410  __asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
     411#endif
    408412  return psr;
    409413}
  • cpukit/score/cpu/sparc/sparc-counter-asm.S

    r89d90c0 rb2da982  
    117117         ld     [%o5 + 20], %o4
    118118        ta      SPARC_SWTRAP_IRQEN
     119#ifdef __FIX_LEON3FT_TN0018
     120        /* A nop is added to work around the GRLIB-TN-0018 errata */
     121        nop
     122#endif
    119123        jmp     %o7 + 8
    120124         sub    %o4, %o0, %o0
  • cpukit/score/cpu/sparc/window.S

    r89d90c0 rb2da982  
    2323
    2424#include <rtems/asm.h>
     25#include <libcpu/grlib-tn-0018.h>
    2526
    2627        .section    ".text"
     
    248249         */
    249250
    250         mov     %l3, %g1
    251251        mov     %l4, %g2
    252252        mov     %l5, %g3
     253
     254        TN0018_WAIT_IFLUSH %l4,%l5
     255        TN0018_WRITE_PSR %g1
     256
     257        mov     %l3, %g1
    253258        mov     %l6, %g4
    254259        mov     %l7, %g5
    255260
     261        TN0018_FIX %l4,%l5
     262
    256263        jmpl    %l2, %g0
    257264        rett    %l2 + 4
  • spec/build/cpukit/cpusparc.yml

    r89d90c0 rb2da982  
    1414  - cpukit/score/cpu/sparc/include/libcpu/access.h
    1515  - cpukit/score/cpu/sparc/include/libcpu/byteorder.h
     16  - cpukit/score/cpu/sparc/include/libcpu/grlib-tn-0018.h
    1617- destination: ${BSP_INCLUDEDIR}/machine
    1718  source:
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