Changeset b16f38a in rtems


Ignore:
Timestamp:
Jun 22, 2007, 7:15:44 PM (12 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, master
Children:
0fe59ec
Parents:
6f2208f
Message:

2007-06-22 Joel Sherrill <joel.sherrill@…>

  • clock/clock.c, network_5200/network.c: Convert to using clock driver template.
Location:
c/src/lib/libbsp/powerpc/gen5200
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/gen5200/ChangeLog

    r6f2208f rb16f38a  
     12007-06-22      Joel Sherrill <joel.sherrill@oarcorp.com>
     2
     3        * clock/clock.c, network_5200/network.c: Convert to using clock driver
     4        template.
     5
    162007-06-22      Joel Sherrill <joel.sherrill@OARcorp.com>
    27
  • c/src/lib/libbsp/powerpc/gen5200/clock/clock.c

    r6f2208f rb16f38a  
    1111|                    Germany                                      |
    1212|                    rtems@embedded-brains.de                     |
     13|                                                                 |
     14| Reworked by Joel Sherrill to use clockdrv_shell.c               |
    1315+-----------------------------------------------------------------+
    1416| The license and distribution terms for this file may be         |
     
    111113#include "../include/mpc5200.h"
    112114
    113 volatile uint32_t Clock_driver_ticks;
    114 
    115 void Clock_exit(void);
    116 
    117 uint32_t counter_value;
    118 
     115#define GPT (BSP_PERIODIC_TIMER - BSP_SIU_IRQ_TMR0)
     116
     117/* this lets us do nanoseconds since last tick */
     118uint64_t Clock_last_TBR;
     119volatile uint32_t counter_value;
    119120volatile int ClockInitialized = 0;
    120121
    121 
    122 /*
    123  * These are set by clock driver during its init
    124  */
    125 rtems_device_major_number rtems_clock_major = ~0;
    126 rtems_device_minor_number rtems_clock_minor;
    127 
    128 
    129 uint64_t Clock_last_TBR;
    130 
    131122/*
    132123 *  ISR Handlers
    133124 */
    134125void mpc5200_gpt_clock_isr(rtems_irq_hdl_param handle)
    135   {
     126{
    136127  uint32_t status;
    137128  struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)handle;
     
    139130  status = gpt->status;
    140131
    141 
    142   if(ClockInitialized  && (status & GPT_STATUS_TEXP))
    143     {
    144 
     132  if (ClockInitialized  && (status & GPT_STATUS_TEXP)) {
    145133    gpt->status |= GPT_STATUS_TEXP;
    146134    Clock_last_TBR = PPC_Get_timebase_register();
    147135
    148 
    149136    Clock_driver_ticks++;
    150137    rtems_clock_tick();
    151 
    152     }
    153 
    154   }
    155 
     138  }
     139}
    156140
    157141/*
     
    159143 */
    160144void mpc5200_init_gpt(uint32_t gpt_no)
    161   {
     145{
    162146  struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)(&mpc5200.gpt[gpt_no]);
    163147
    164148  gpt->status = GPT_STATUS_RESET;
    165   gpt->emsel  = GPT_EMSEL_CE | GPT_EMSEL_ST_CONT | GPT_EMSEL_INTEN | GPT_EMSEL_GPIO_OUT_HIGH | GPT_EMSEL_TIMER_MS_GPIO;
    166 
    167   }
    168 
     149  gpt->emsel  = GPT_EMSEL_CE | GPT_EMSEL_ST_CONT | GPT_EMSEL_INTEN |
     150                GPT_EMSEL_GPIO_OUT_HIGH | GPT_EMSEL_TIMER_MS_GPIO;
     151
     152}
    169153
    170154/*
     
    172156 */
    173157void mpc5200_set_gpt_count(uint32_t counter_value, uint32_t gpt_no)
    174   {
     158{
    175159  uint32_t prescaler_value = 1;
    176160  uint32_t counter = counter_value;
    177161  struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)(&mpc5200.gpt[gpt_no]);
    178162
    179   /* Calculate counter/prescaler value, e.g. IPB_Clock=33MHz -> Int. every 0,3 nsecs. - 130 secs.*/
    180   while((counter >= (1 << 16)) && (prescaler_value < (1 << 16)))
    181     {
    182       prescaler_value++;
    183       counter = counter_value / prescaler_value;
    184     }
     163  /* Calculate counter/prescaler value, e.g.
     164   *   IPB_Clock=33MHz -> Int. every 0,3 nsecs. - 130 secs
     165   */
     166  while ((counter >= (1 << 16)) && (prescaler_value < (1 << 16))) {
     167    prescaler_value++;
     168    counter = counter_value / prescaler_value;
     169  }
    185170
    186171  counter = (uint16_t)counter;
     
    188173  gpt->count_in = (prescaler_value << 16) + counter;
    189174
    190   }
     175}
    191176
    192177uint32_t bsp_clock_nanoseconds_since_last_tick(void)
     
    207192 */
    208193void mpc5200_enable_gpt_int(uint32_t gpt_no)
    209   {
     194{
    210195  struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)(&mpc5200.gpt[gpt_no]);
    211196
    212197  gpt->emsel |= GPT_EMSEL_CE | GPT_EMSEL_INTEN;
    213198  Clock_last_TBR = PPC_Get_timebase_register();
    214 
    215   }
    216 
     199}
    217200
    218201/*
     
    220203 */
    221204void mpc5200_disable_gpt_int(uint32_t gpt_no)
    222   {
     205{
    223206  struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)(&mpc5200.gpt[gpt_no]);
    224207
    225208  gpt->emsel &= ~(GPT_EMSEL_CE | GPT_EMSEL_INTEN);
    226 
    227   }
    228 
     209}
    229210
    230211/*
     
    232213 */
    233214uint32_t mpc5200_check_gpt_status(uint32_t gpt_no)
    234   {
     215{
    235216  struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)(&mpc5200.gpt[gpt_no]);
    236217
    237218  return ((gpt->emsel) & (GPT_EMSEL_CE | GPT_EMSEL_INTEN));
    238 
    239   }
    240 
     219}
    241220
    242221void clockOn(const rtems_irq_connect_data* irq)
    243   {
     222{
    244223  uint32_t gpt_no;
    245224
     
    252231  mpc5200_enable_gpt_int((uint32_t)gpt_no);
    253232
    254   Clock_driver_ticks = 0;
    255233  ClockInitialized = 1;
    256 
    257   }
    258 
     234}
    259235
    260236void clockOff(const rtems_irq_connect_data* irq)
    261   {
     237{
    262238  uint32_t gpt_no;
    263239
     
    267243
    268244  ClockInitialized = 0;
    269 
    270   }
    271 
     245}
    272246
    273247int clockIsOn(const rtems_irq_connect_data* irq)
    274   {
     248{
    275249  uint32_t gpt_no;
    276250
    277251  gpt_no = BSP_SIU_IRQ_TMR0 - (irq->name);
    278252
    279   if(mpc5200_check_gpt_status(gpt_no) && ClockInitialized)
     253  if (mpc5200_check_gpt_status(gpt_no) && ClockInitialized)
    280254    return ClockInitialized;
    281   else
    282     return 0;
    283   }
     255  return 0;
     256}
    284257
    285258
    286259int BSP_get_clock_irq_level()
    287   {
    288 
     260{
    289261  /*
    290262   * Caution : if you change this, you must change the
     
    292264    */
    293265  return BSP_PERIODIC_TIMER;
    294   }
     266}
    295267
    296268
    297269int BSP_disconnect_clock_handler (void)
    298   {
     270{
    299271  rtems_irq_connect_data clockIrqData;
    300272  clockIrqData.name   = BSP_PERIODIC_TIMER;
    301273
    302274
    303   if (!BSP_get_current_rtems_irq_handler(&clockIrqData))
    304     {
    305 
     275  if (!BSP_get_current_rtems_irq_handler(&clockIrqData)) {
    306276    printk("Unable to stop system clock\n");
    307277    rtems_fatal_error_occurred(1);
    308 
    309     }
     278  }
    310279
    311280  return BSP_remove_rtems_irq_handler (&clockIrqData);
    312 
    313   }
     281}
    314282
    315283
    316284int BSP_connect_clock_handler (uint32_t gpt_no)
    317   {
    318 
     285{
    319286  rtems_irq_hdl hdl = 0;
    320287  rtems_irq_connect_data clockIrqData;
    321 
    322288
    323289  /*
    324290   * Reinit structure
    325291   */
    326 
    327292  clockIrqData.name   = BSP_PERIODIC_TIMER;
    328293
    329   if(!BSP_get_current_rtems_irq_handler(&clockIrqData))
    330     {
    331 
     294  if (!BSP_get_current_rtems_irq_handler(&clockIrqData)) {
    332295    printk("Unable to get system clock handler\n");
    333296    rtems_fatal_error_occurred(1);
    334 
    335     }
    336 
    337   if(!BSP_remove_rtems_irq_handler (&clockIrqData))
    338     {
    339 
     297  }
     298
     299  if (!BSP_remove_rtems_irq_handler (&clockIrqData)) {
    340300    printk("Unable to remove current system clock handler\n");
    341301    rtems_fatal_error_occurred(1);
    342 
    343     }
    344 
    345   if ((gpt_no >= GPT0) ||
    346       (gpt_no <= GPT7)) {
     302  }
     303
     304  if ((gpt_no >= GPT0) || (gpt_no <= GPT7)) {
    347305    hdl = (rtems_irq_hdl_param )&mpc5200.gpt[gpt_no];
    348   }
    349   else {
     306  } else {
    350307    printk("Unable to set system clock handler\n");
    351308    rtems_fatal_error_occurred(1);
     
    359316
    360317  return BSP_install_rtems_irq_handler (&clockIrqData);
    361 
    362   }
    363 
    364 
    365 /*
    366  * Called via atexit()
    367  * Remove the clock interrupt handler by setting handler to NULL
    368  */
    369 void Clock_exit(void)
    370   {
    371 
    372   (void) BSP_disconnect_clock_handler ();
    373 
    374   }
    375 
    376 
    377 void Install_clock(rtems_device_minor_number gpt_no)
    378   {
    379 
    380   Clock_driver_ticks = 0;
    381 
    382   counter_value = rtems_configuration_get_microseconds_per_tick() *
    383                       rtems_cpu_configuration_get_clicks_per_usec();
    384 
    385   mpc5200_init_gpt((uint32_t)gpt_no);
    386   mpc5200_set_gpt_count(counter_value, (uint32_t)gpt_no);
    387 
    388 
    389   BSP_connect_clock_handler(gpt_no);
    390 
    391   ClockInitialized = 1;
    392 
    393     rtems_clock_set_nanoseconds_extension(
    394       bsp_clock_nanoseconds_since_last_tick
    395     );
    396   atexit(Clock_exit);
    397 
    398   }
    399 
    400 void ReInstall_clock(uint32_t gpt_no)
    401   {
    402 
    403   BSP_connect_clock_handler(gpt_no);
    404 
    405   }
    406 
    407 
    408 rtems_device_driver Clock_initialize
    409   (
    410   rtems_device_major_number major,
    411   rtems_device_minor_number minor,
    412   void *pargp
    413   )
    414   {
    415   /* force minor according to definitions in irq.h */
    416   minor = BSP_PERIODIC_TIMER - BSP_SIU_IRQ_TMR0;
    417 
    418   Install_clock((uint32_t)minor);
    419 
    420   /*
    421    * make major/minor avail to others such as shared memory driver
    422    */
    423   rtems_clock_major = major;
    424   rtems_clock_minor = minor;
    425 
    426   return RTEMS_SUCCESSFUL;
    427 
    428   }
    429 
    430 rtems_device_driver Clock_control
    431   (
    432   rtems_device_major_number major,
    433   rtems_device_minor_number minor,
    434   void *pargp
    435   )  {
    436 
    437   rtems_libio_ioctl_args_t *args = pargp;
    438 
    439   /* forec minor according to definitions in irq.h */
    440   minor = BSP_PERIODIC_TIMER - BSP_SIU_IRQ_TMR0;
    441 
    442   if(args != 0) {
    443     /*
    444      * This is hokey, but until we get a defined interface
    445      * to do this, it will just be this simple...
    446      */
    447     if(args->command == rtems_build_name('I', 'S', 'R', ' ')) {
    448       if ((minor >= GPT0) ||
    449           (minor <= GPT7)) {
    450         mpc5200_gpt_clock_isr((rtems_irq_hdl_param )&mpc5200.gpt[minor]);
    451       }
    452       else {
    453         printk("Unable to call system clock handler\n");
    454         rtems_fatal_error_occurred(1);
    455       }
    456     }
    457     else if(args->command == rtems_build_name('N', 'E', 'W', ' ')) {
    458       ReInstall_clock((uint32_t)minor);
    459     }
    460   }
    461   return RTEMS_SUCCESSFUL;
    462 
    463 }
     318}
     319
     320#define CLOCK_VECTOR 0
     321
     322#define Clock_driver_support_at_tick()                                   \
     323  do {                                                                   \
     324    uint32_t status;                                                     \
     325    struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)(&mpc5200.gpt[GPT]); \
     326    \
     327    status = gpt->status;                                                \
     328    \
     329    if (ClockInitialized  && (status & GPT_STATUS_TEXP)) {               \
     330      gpt->status |= GPT_STATUS_TEXP;                                    \
     331      Clock_last_TBR = PPC_Get_timebase_register();                      \
     332    }                                                                    \
     333  } while(0)
     334
     335#define Clock_driver_support_install_isr( _new, _old ) \
     336  do {                                                 \
     337      (_old) = NULL; /* avoid warning */;              \
     338      BSP_connect_clock_handler(GPT);                  \
     339  } while(0)
     340
     341/* This driver does this in clockOn called at connection time */
     342#define Clock_driver_support_initialize_hardware() \
     343  do {        \
     344    ;         \
     345  } while (0)
     346
     347#define Clock_driver_nanoseconds_since_last_tick \
     348    bsp_clock_nanoseconds_since_last_tick
     349
     350#define Clock_driver_support_shutdown_hardware() \
     351  do { \
     352    (void) BSP_disconnect_clock_handler (); \
     353  } while (0)
     354
     355#include "../../../shared/clockdrv_shell.c"
     356
  • c/src/lib/libbsp/powerpc/gen5200/network_5200/network.c

    r6f2208f rb16f38a  
    104104static TaskId txTaskId; /* SDMA TX task ID */
    105105
    106 /*#define ETH_DEBUG*/
     106#define ETH_DEBUG
    107107
    108108/*
     
    565565  {
    566566  int            counter = 0xffff;
     567 
    567568
    568569#if defined(ETH_DEBUG)
     
    12421243#if defined(ETH_DEBUG)
    12431244  int i;
     1245  unsigned short phyStatus;
    12441246 /*
    12451247  * Print PHY registers after initialization.
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