- Timestamp:
- 06/07/11 13:38:54 (13 years ago)
- Branches:
- 4.11, 5, master
- Children:
- 88dcb841
- Parents:
- e5da4340
- Location:
- c/src/lib/libbsp/powerpc
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libbsp/powerpc/gen5200/ChangeLog
re5da4340 rb125b46 1 2011-06-07 Sebastian Huber <sebastian.huber@embedded-brains.de> 2 3 * configure.ac, startup/bspstart.c: Use standard cache BSP options. 4 1 5 2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org> 2 6 -
c/src/lib/libbsp/powerpc/gen5200/configure.ac
re5da4340 rb125b46 16 16 RTEMS_PROG_CCAS 17 17 18 RTEMS_BSPOPTS_SET([DATA_CACHE_ENABLE],[*],[1]) 19 RTEMS_BSPOPTS_HELP([DATA_CACHE_ENABLE], 20 [If defined, the data cache will be enabled after address translation 21 is turned on.]) 18 RTEMS_BSPOPTS_SET_DATA_CACHE_ENABLED([*],[1]) 19 RTEMS_BSPOPTS_HELP_DATA_CACHE_ENABLED 22 20 23 RTEMS_BSPOPTS_SET([INSTRUCTION_CACHE_ENABLE],[*],[1]) 24 RTEMS_BSPOPTS_HELP([INSTRUCTION_CACHE_ENABLE], 25 [If defined, the instruction cache will be enabled after address translation 26 is turned on.]) 21 RTEMS_BSPOPTS_SET_INSTRUCTION_CACHE_ENABLED([*],[1]) 22 RTEMS_BSPOPTS_HELP_INSTRUCTION_CACHE_ENABLED 27 23 28 24 RTEMS_BSPOPTS_SET([BENCHMARK_IRQ_PROCESSING],[*],[0]) -
c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c
re5da4340 rb125b46 150 150 * Enable instruction and data caches. Do not force writethrough mode. 151 151 */ 152 #if INSTRUCTION_CACHE_ENABLE152 #if BSP_INSTRUCTION_CACHE_ENABLED 153 153 rtems_cache_enable_instruction(); 154 154 #endif 155 #if DATA_CACHE_ENABLE155 #if BSP_DATA_CACHE_ENABLED 156 156 rtems_cache_enable_data(); 157 157 #endif -
c/src/lib/libbsp/powerpc/gen83xx/ChangeLog
re5da4340 rb125b46 1 2011-06-07 Sebastian Huber <sebastian.huber@embedded-brains.de> 2 3 * configure.ac, startup/bspstart.c: Use standard cache BSP options. 4 1 5 2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org> 2 6 -
c/src/lib/libbsp/powerpc/gen83xx/configure.ac
re5da4340 rb125b46 16 16 RTEMS_PROG_CCAS 17 17 18 RTEMS_BSPOPTS_SET([DATA_CACHE_ENABLE],[*],[1]) 19 RTEMS_BSPOPTS_HELP([DATA_CACHE_ENABLE], 20 [If defined, the data cache will be enabled after address translation 21 is turned on.]) 18 RTEMS_BSPOPTS_SET_DATA_CACHE_ENABLED([*],[1]) 19 RTEMS_BSPOPTS_HELP_DATA_CACHE_ENABLED 22 20 23 RTEMS_BSPOPTS_SET([INSTRUCTION_CACHE_ENABLE],[*],[1]) 24 RTEMS_BSPOPTS_HELP([INSTRUCTION_CACHE_ENABLE], 25 [If defined, the instruction cache will be enabled after address translation 26 is turned on.]) 21 RTEMS_BSPOPTS_SET_INSTRUCTION_CACHE_ENABLED([*],[1]) 22 RTEMS_BSPOPTS_HELP_INSTRUCTION_CACHE_ENABLED 27 23 28 24 RTEMS_BSPOPTS_SET([MPC8313ERDB],[mpc8313erdb],[1]) … … 59 55 RTEMS_BSPOPTS_HELP([HAS_UBOOT],[If defined, enables U-Boot support.]) 60 56 61 RTEMS_BSPOPTS_SET([PPC_USE_DATA_CACHE],[*],[1])62 RTEMS_BSPOPTS_HELP([PPC_USE_DATA_CACHE], [If defined, then the PowerPC specific63 code in RTEMS will use data cache instructions to optimize the context switch code.])64 65 57 RTEMS_BSPOPTS_SET([GEN83XX_ENABLE_INTERRUPT_NESTING],[*],[1]) 66 58 RTEMS_BSPOPTS_HELP([GEN83XX_ENABLE_INTERRUPT_NESTING],[enable interrupt nesting]) -
c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c
re5da4340 rb125b46 97 97 */ 98 98 99 #if INSTRUCTION_CACHE_ENABLE99 #if BSP_INSTRUCTION_CACHE_ENABLED 100 100 rtems_cache_enable_instruction(); 101 101 #endif 102 102 103 #if DATA_CACHE_ENABLE103 #if BSP_DATA_CACHE_ENABLED 104 104 rtems_cache_enable_data(); 105 105 #endif
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