Changeset b094233 in rtems


Ignore:
Timestamp:
Sep 11, 2009, 5:13:42 PM (10 years ago)
Author:
Till Straumann <strauman@…>
Branches:
4.10, 4.11, master
Children:
507d382
Parents:
1b290ce7
Message:

2009-09-11 Till Straumann <strauman@…>

  • Makefile.am, preinstall.am, irq/no_pic.c (REMOVED), irq/irq.h, irq/irq_init.c: use openpic from 'shared' area instead of no_pic.
  • inlude/psim.h: use openpic from 'shared' area instead of no_pic. Added 'extern' declaration for (linker-script defined) RamBase? and RamSize? symbols. Let CPP macros expand to these symbols instead of static constants. Added register definitions for OpenPIC in the register area. Added register definitions for ethernet controller in the register area.
  • startup/linkcmds: Increased RamSize? to 16M. Increased 'RAM' memory region to 32M (there is really no disadvantage in making this large). Added comment explaining the inter-relation between RamSize?, the size of the memory region, the device-tree property "oea-memory-size" and the DBAT setting.
  • tools/psim-shared: Try to determine RamSize? from executable and set 'oea-memory-size' accordingly. May be overridden if 'RAM_SIZE' envvar is set. Added openpic to device-tree. Added ethernet controller to device-tree (commented because a PSIM patch is currently required to use this device).
  • startup/bspstart: Increase DBAT0 mapping to size of 32M.
Location:
c/src/lib/libbsp/powerpc/psim
Files:
1 deleted
10 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/psim/ChangeLog

    r1b290ce7 rb094233  
     12009-09-11      Till Straumann <strauman@slac.stanford.edu>
     2
     3        * Makefile.am, preinstall.am, irq/no_pic.c (REMOVED),
     4        irq/irq.h, irq/irq_init.c:
     5        use openpic from 'shared' area instead of no_pic.
     6        * inlude/psim.h:
     7        use openpic from 'shared' area instead of no_pic.
     8        Added 'extern' declaration for (linker-script defined) RamBase
     9        and RamSize symbols. Let CPP macros expand to these symbols
     10        instead of static constants.
     11        Added register definitions for OpenPIC in the register area.
     12        Added register definitions for ethernet controller in the register
     13        area.
     14        * startup/linkcmds: Increased RamSize to 16M. Increased 'RAM'
     15        memory region to 32M (there is really no disadvantage in making
     16        this large). Added comment explaining the inter-relation between
     17        RamSize, the size of the memory region, the device-tree property
     18        "oea-memory-size" and the DBAT setting.
     19        * tools/psim-shared: Try to determine RamSize from executable
     20        and set 'oea-memory-size' accordingly. May be overridden if 'RAM_SIZE'
     21        envvar is set.
     22        Added openpic to device-tree.
     23        Added ethernet controller to device-tree (commented because a PSIM
     24        patch is currently required to use this device).
     25        * startup/bspstart: Increase DBAT0 mapping to size of 32M.
     26
    1272009-08-28      Joel Sherrill <joel.sherrill@OARcorp.com>
    228
  • c/src/lib/libbsp/powerpc/psim/Makefile.am

    r1b290ce7 rb094233  
    5151
    5252# irq
    53 include_bsp_HEADERS = irq/irq.h
    54 libbsp_a_SOURCES += irq/irq_init.c irq/no_pic.c
     53include_bsp_HEADERS = irq/irq.h ../shared/openpic/openpic.h
     54libbsp_a_SOURCES += irq/irq_init.c ../shared/irq/openpic_i8259_irq.c ../shared/openpic/openpic.c
    5555
    5656EXTRA_DIST = vectors/README
  • c/src/lib/libbsp/powerpc/psim/include/bsp.h

    r1b290ce7 rb094233  
    7070#endif /* ASM */
    7171
     72#define BSP_HAS_NO_VME
     73
    7274#ifdef __cplusplus
    7375}
  • c/src/lib/libbsp/powerpc/psim/include/psim.h

    r1b290ce7 rb094233  
    1212 * RAM Information
    1313 */
    14 #define PSIM_RAM_BASE (void *)0x00000000
    15 #define PSIM_RAM_SIZE 8388608
     14
     15extern char RamBase[];
     16extern char RamSize[];
     17
     18/*
     19 * RamBase/RamSize is defined by the linker script;
     20 * CPP symbols are AFAIK unused and deprecated.
     21 */
     22#define PSIM_RAM_SIZE ((unsigned long)RamSize)
     23#define PSIM_RAM_BASE ((void*)RamBase)
    1624
    1725/*
     
    5967  psim_sysv_sem_t Semaphore;
    6068
    61   /* 0x0c10001C - 0x0c10FFFF - NVRAM/RTC */
    62   uint8_t gap2[65508];
     69  /* 0x0c10001c - 0x0c10001f - NVRAM/RTC */
     70  uint8_t gap2[4];
     71
     72  /* 0x0c100020 - 0x0c10005F - Ethernet */
     73  volatile uint8_t Ethtap[ 64 ];
     74
     75  /* 0x0c100060 - 0x0c10FFFF - NVRAM/RTC */
     76  uint8_t gap3[65440];
    6377
    6478  /* 0x0c110000 - 0x0c12FFFF - System V IPC Shared Memory */
    6579  uint8_t SharedMemory[ 128 * 1024 ];
     80
     81  /* 0x0c130000 - 0x0c170000 - OpenPIC IRQ Controller */
     82  volatile uint8_t OpenPIC[ 256 * 1024 ];
    6683
    6784} psim_registers_t;
  • c/src/lib/libbsp/powerpc/psim/irq/irq.h

    r1b290ce7 rb094233  
    3333 */
    3434
     35/*
     36 * PCI IRQ handlers related definitions
     37 * CAUTION : BSP_PCI_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE
     38 */
     39#define BSP_PCI_IRQ_NUMBER              (16)
     40#define BSP_PCI_IRQ_LOWEST_OFFSET       (0)
     41#define BSP_PCI_IRQ_MAX_OFFSET          (BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER - 1)
     42
    3543#define BSP_PROCESSOR_IRQ_NUMBER            (1)
    36 #define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (0)
     44#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_PCI_IRQ_MAX_OFFSET)
    3745#define BSP_PROCESSOR_IRQ_MAX_OFFSET    (BSP_PROCESSOR_IRQ_LOWEST_OFFSET+BSP_PROCESSOR_IRQ_NUMBER-1)
     46
    3847
    3948  /*
     
    4150   */
    4251#define BSP_IRQ_NUMBER                  (BSP_PROCESSOR_IRQ_MAX_OFFSET + 1)
    43 #define BSP_LOWEST_OFFSET               (BSP_PROCESSOR_IRQ_LOWEST_OFFSET)
     52#define BSP_LOWEST_OFFSET               (BSP_PCI_IRQ_LOWEST_OFFSET)
    4453#define BSP_MAX_OFFSET                  (BSP_IRQ_NUMBER - 1)
    4554
  • c/src/lib/libbsp/powerpc/psim/irq/irq_init.c

    r1b290ce7 rb094233  
    2020#include <bsp/irq.h>
    2121#include <bsp.h>
     22#include <psim.h>
    2223#include <libcpu/raw_exception.h>
    2324#include <rtems/bspIo.h>
     25#include <bsp/openpic.h>
    2426
    2527static rtems_irq_connect_data      rtemsIrq[BSP_IRQ_NUMBER];
     
    4951   * First initialize the Interrupt management hardware
    5052   */
     53  OpenPIC = (void*)PSIM.OpenPIC;
     54  openpic_init(1,0,0,16,0,0);
    5155
    5256  /*
     
    6973  initial_config.irqPrioTbl   = irqPrioTable;
    7074
     75  for (i = BSP_PCI_IRQ_LOWEST_OFFSET; i< BSP_PCI_IRQ_NUMBER; i++ ) {
     76        irqPrioTable[i] = 8;
     77  }
     78
    7179  if (!BSP_rtems_irq_mngt_set(&initial_config)) {
    7280    /*
  • c/src/lib/libbsp/powerpc/psim/preinstall.am

    r1b290ce7 rb094233  
    7878PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
    7979
     80$(PROJECT_INCLUDE)/bsp/openpic.h: ../shared/openpic/openpic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
     81        $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/openpic.h
     82PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/openpic.h
     83
    8084$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
    8185        $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
  • c/src/lib/libbsp/powerpc/psim/startup/bspstart.c

    r1b290ce7 rb094233  
    1919#include <bsp.h>
    2020#include <bsp/irq.h>
     21#include <psim.h>
    2122#include <bsp/bootcard.h>
    2223#include <rtems/bspIo.h>
     
    5152 * Memory on this board.
    5253 */
    53 extern char RamSize[];
    54 uint32_t BSP_mem_size;
     54uint32_t BSP_mem_size = (uint32_t)RamSize;
    5555
    5656/*
     
    127127   */
    128128  /* Memory */
    129   setdbat(0, 0x0<<24, 0x0<<24, 1<<24, _PAGE_RW);
    130   setibat(0, 0x0<<24, 0x0<<24, 1<<24,        0);
     129  setdbat(0, 0x0<<24, 0x0<<24, 2<<24, _PAGE_RW);
     130  setibat(0, 0x0<<24, 0x0<<24, 2<<24,        0);
    131131  /* PCI    */
    132132  setdbat(1, 0x8<<24, 0x8<<24, 1<<24,  IO_PAGE);
  • c/src/lib/libbsp/powerpc/psim/startup/linkcmds

    r1b290ce7 rb094233  
    1818
    1919RamBase = DEFINED(RamBase) ? RamBase : 0x0;
    20 RamSize = DEFINED(RamSize) ? RamSize : 8M;
     20/*
     21 * make sure device tree (property /openprom/options/oea-memory-size)
     22 * provides at least 'RamSize'.
     23 * Also, the BATs must at map at least 'RamSize' (currently, they
     24 * map 32M -- see startup/bspstart.c).
     25 * Furthermore, the RAM region must be large enough (there is no
     26 * disadvantage in making that one very large as long as it doesn't
     27 * overlap another memory area).
     28 *
     29 */
     30RamSize = DEFINED(RamSize) ? RamSize : 16M;
    2131
    2232MEMORY
    2333  {
    24         RAM       : ORIGIN = 0, LENGTH = 8M
     34        RAM       : ORIGIN = 0, LENGTH = 32M
    2535        PSIM_REGS : ORIGIN = 0x0c000000, LENGTH = 16M
    2636        VECTORS   : ORIGIN = 0xFFF00000, LENGTH = 0x20000
  • c/src/lib/libbsp/powerpc/psim/tools/psim-shared

    r1b290ce7 rb094233  
    3838  fi
    3939
     40  if [ X${RAM_SIZE} = X ] ; then
     41    if [ X${NM} = X ] ; then
     42      NM=${rtemsTarget}-nm
     43    fi
     44    RAM_SIZE=`$NM ${1} | awk '/\<RamSize\>/{print "0x"$1}'`
     45  fi
     46
    4047cat <<EOF
    4148#
     
    4653/#address-cells 1
    4754/openprom/init/register/pvr 0xfffe0000
    48 /openprom/options/oea-memory-size 8388608
     55# This must be >= than linkcmds defined RamSize!
     56/openprom/options/oea-memory-size $RAM_SIZE
    4957##### EEPROM @ 0x0c000000 for 512K
    5058/eeprom@0x0c000000/reg 0x0c000000 0x80000
     
    6169/nvram@0x0c080000/reg 0x0c080000 524300
    6270/nvram@0x0c080000/timezone -3600
     71
     72##### OPENPIC @ 0x0c130000 - 0x0c170000 (512K)
     73/opic@0x0c130000/reg              0x0c130000 0 0x0c130000 0x40000
     74/opic@0x0c130000/interrupt-ranges 0 0 0 16
     75/opic@0x0c130000/device_type      open-pic
     76# interupt out -> CPU's interrupt pin
     77/opic@0x0c130000 > intr0 int /cpus/cpu@0
     78
     79##### ETHTAP @ 0x0c100020 for 0x40
     80##
     81## NOTE 'ethtap' currently (200902) requires psim to
     82##      be patched -- also, it is only supported on
     83##      a linux host.
     84##      the 'ethtap' device transfers data from/to the
     85##      simulated network interface to/from a 'ethertap'
     86##      interface on the linux host (consult tun/tap
     87##      device documentation).
     88##      A very useful tool is 'tunctl' which allows for
     89##      configuring user-accessible, persistent 'tap'
     90##      devices so that psim may be executed w/o special
     91##      (root) privileges.
     92#
     93#/ethtap@0x0c100020/reg           0x0c100020 0x40
     94## route interrupt to open-pic
     95#/ethtap@0x0c100020               > 0 irq0 /opic@0x0c130000
     96## 'tun' device on host
     97#/ethtap@0x0c100020/tun-device    "/dev/net/tun"
     98## name of 'tap' device to use
     99#/ethtap@0x0c100020/tap-ifname    "tap0"
     100## ethernet address of simulated IF
     101#/ethtap@0x0c100020/hw-address    "00:00:00:22:11:00"
     102## generate CRC and append to received packet before
     103## handing over to the simulation. This is mostly for
     104## debugging the rtems device driver. If unsure, leave 'false'.
     105#/ethtap@0x0c100020/enable-crc    false
    63106EOF
    64107
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