Changeset b03f4f2 in rtems


Ignore:
Timestamp:
01/08/01 18:11:35 (23 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
f692d7e0
Parents:
ec5afe0
Message:

2001-01-08 Joel Sherrill <joel@…>

  • Added r46xx directory.
  • Makefile.am, configure.in: Modified to reflect addition of r46xx.
  • shared/interrupts/installisrentries.c: Fixed typo.
  • r46xx/.cvsignore, r46xx/Makefile.am, r46xx/vectorisrs/.cvsignore, r46xx/vectorisrs/Makefile.am, r46xx/vectorisrs/vectorisrs.c: New files.
Location:
c/src/lib/libcpu/mips
Files:
5 added
4 edited

Legend:

Unmodified
Added
Removed

  • c/src/lib/libcpu/mips/ChangeLog

    rec5afe0 rb03f4f2  
     12001-01-08      Joel Sherrill <joel@OARcorp.com>
     2
     3        * Added r46xx directory.
     4        * Makefile.am, configure.in: Modified to reflect addition of r46xx.
     5        * shared/interrupts/installisrentries.c: Fixed typo.
     6        * r46xx/.cvsignore, r46xx/Makefile.am,
     7        r46xx/vectorisrs/.cvsignore, r46xx/vectorisrs/Makefile.am,
     8        r46xx/vectorisrs/vectorisrs.c: New files.
     9
    1102000-12-19      Joel Sherrill <joel@OARcorp.com>
    211

  • c/src/lib/libcpu/mips/Makefile.am

    rec5afe0 rb03f4f2  
    1313
    1414if r46xx
    15 CPU_SUBDIR = clock timer
     15CPU_SUBDIR = clock timer r46xx
    1616endif
    1717

  • c/src/lib/libcpu/mips/configure.in

    rec5afe0 rb03f4f2  
    3939shared/cache/Makefile
    4040shared/interrupts/Makefile
     41r46xx/Makefile
     42r46xx/vectorisrs/Makefile
     43timer/Makefile
    4144tx39/Makefile
    4245tx39/include/Makefile

  • c/src/lib/libcpu/mips/shared/interrupts/installisrentries.c

    rec5afe0 rb03f4f2  
    1717#elif __mips == 3
    1818  void exc_tlb_code(void);
    19   void exc_utlb_code(void);
     19  void exc_xtlb_code(void);
    2020  void exc_cache_code(void);
    2121  void exc_norm_code(void);
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