Index: c/src/lib/libcpu/arm/at91rm9200/irq/.cvsignore
===================================================================
--- c/src/lib/libcpu/arm/at91rm9200/irq/.cvsignore	(revision af854856a832a3dad6e0b5d4ebe84ad64eab6987)
+++ c/src/lib/libcpu/arm/at91rm9200/irq/.cvsignore	(revision af854856a832a3dad6e0b5d4ebe84ad64eab6987)
@@ -0,0 +1,14 @@
+Makefile
+Makefile.in
+aclocal.m4
+autom4te.cache
+config.cache
+config.guess
+config.log
+config.status
+config.sub
+configure
+depcomp
+install-sh
+missing
+mkinstalldirs
Index: c/src/lib/libcpu/arm/at91rm9200/irq/bsp_irq_asm.S
===================================================================
--- c/src/lib/libcpu/arm/at91rm9200/irq/bsp_irq_asm.S	(revision af854856a832a3dad6e0b5d4ebe84ad64eab6987)
+++ c/src/lib/libcpu/arm/at91rm9200/irq/bsp_irq_asm.S	(revision af854856a832a3dad6e0b5d4ebe84ad64eab6987)
@@ -0,0 +1,38 @@
+/*
+ * Atmel AT91RM9200 Interrupt handler
+ *
+ * Copyright (c) 2004 by Jay Monkman <jtm@lopgindog.com>
+ *      
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *
+ *  $Id$
+ */
+#define __asm__
+        
+        .globl ExecuteITHandler
+ExecuteITHandler :
+/*
+ * Look at interrupt status register to determine source.
+ * From source, determine offset into expanded vector table
+ * and load handler address into r0.
+ */
+        ldr     r0, =0xFFFFF100   /* AIC_CTL_BASE + AIC_IVR */
+        ldr     r1, [r0]                
+        str     r1, [r0]          /* write back in case we are using protect */
+
+        stmdb   sp!,{lr}
+        ldr     lr, =IRQ_return   /* prepare the return from handler  */
+
+        mov     pc, r1            /* execute handler */
+
+IRQ_return:
+        ldr   r2, =0xFFFFF130     /* AIC_CTL_BASE + AIC_EIOCR */
+        str   r1, [r2]
+       
+        ldmia sp!,{lr}
+
+        mov pc, lr
Index: c/src/lib/libcpu/arm/at91rm9200/irq/bsp_irq_init.c
===================================================================
--- c/src/lib/libcpu/arm/at91rm9200/irq/bsp_irq_init.c	(revision af854856a832a3dad6e0b5d4ebe84ad64eab6987)
+++ c/src/lib/libcpu/arm/at91rm9200/irq/bsp_irq_init.c	(revision af854856a832a3dad6e0b5d4ebe84ad64eab6987)
@@ -0,0 +1,29 @@
+/*
+ * Atmel AT91RM9200 Interrupt handler
+ *
+ * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com>
+ *      
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *
+ *  $Id$
+ */
+#include <irq.h>
+#include <bsp.h>
+#include <at91rm9200.h>
+
+extern void default_int_handler();
+
+/* 
+ * Interrupt system initialization. Disable interrupts, clear 
+ * any that are pending.
+ */
+void BSP_rtems_irq_mngt_init()
+{
+    /* disable all interrupts */
+    AIC_CTL_REG(AIC_IDCR) = 0xffffffff;
+}
+
Index: c/src/lib/libcpu/arm/at91rm9200/irq/irq.c
===================================================================
--- c/src/lib/libcpu/arm/at91rm9200/irq/irq.c	(revision af854856a832a3dad6e0b5d4ebe84ad64eab6987)
+++ c/src/lib/libcpu/arm/at91rm9200/irq/irq.c	(revision af854856a832a3dad6e0b5d4ebe84ad64eab6987)
@@ -0,0 +1,115 @@
+/*
+ * Atmel AT91RM9200 Interrupt handler
+ *
+ * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com>
+ *      
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+#include <bsp.h>
+#include <irq.h>
+#include <rtems/score/thread.h>
+#include <rtems/score/apiext.h>
+#include <at91rm9200.h>
+
+/*
+ * This function check that the value given for the irq line
+ * is valid.
+ */
+static int isValidInterrupt(int irq)
+{
+    if ( (irq < 0) || (irq >= AT91RM9200_MAX_INT)) {
+        return 0;
+    }
+    return 1;
+}
+
+/*
+ * Installs the interrupt handler.
+ */
+int BSP_install_rtems_irq_handler  (const rtems_irq_connect_data* irq)
+{
+    rtems_interrupt_level level;
+    
+    if (!isValidInterrupt(irq->name)) {
+        return 0;
+    }
+    
+    /*
+     * Check if default handler is actually connected. If not, issue 
+     * an error. Note: irq->name is a number corresponding to the 
+     * sources PID (see the at91rm9200_pid for this mapping).  We 
+     * convert it to a long word offset to get source's vector register 
+     */
+    if (AIC_SVR_REG(irq->name * 4) != default_int_handler) {
+        return 0;
+    }
+    
+    _CPU_ISR_Disable(level);
+    
+    /*
+     * store the new handler
+     */
+    AIC_SVR_REG(irq->name * 4) = irq->hdl;
+    
+    /*
+     * unmask interrupt
+     */
+    AIC_CTL_REG(AIC_IECR) = 1 << irq->name;
+    
+    /*
+     * Enable interrupt on device
+     */
+    if(irq->on) {
+        irq->on(irq);
+    }
+    
+    _CPU_ISR_Enable(level);
+    
+    return 1;
+}
+
+/* 
+ * Remove and interrupt handler
+ */
+int BSP_remove_rtems_irq_handler  (const rtems_irq_connect_data* irq)
+{
+    rtems_interrupt_level level;
+  
+    if (!isValidInterrupt(irq->name)) {
+        return 0;
+    }
+
+    /*
+     * Check if the handler is actually connected. If not, issue an error.
+     */
+    if (AIC_SVR_REG(irq->name * 4) != irq->hdl) {
+      return 0;
+    }
+    _CPU_ISR_Disable(level);
+
+    /*
+     * mask interrupt
+     */
+    AIC_CTL_REG(AIC_IDCR) = 1 << irq->name;
+    
+    /*
+     * Disable interrupt on device
+     */
+    if(irq->off) {
+        irq->off(irq);
+    }
+
+    /*
+     * restore the default irq value
+     */
+    AIC_SVR_REG(irq->name * 4) = default_int_handler;
+    
+    _CPU_ISR_Enable(level);
+
+    return 1;
+}
Index: c/src/lib/libcpu/arm/at91rm9200/irq/irq.h
===================================================================
--- c/src/lib/libcpu/arm/at91rm9200/irq/irq.h	(revision af854856a832a3dad6e0b5d4ebe84ad64eab6987)
+++ c/src/lib/libcpu/arm/at91rm9200/irq/irq.h	(revision af854856a832a3dad6e0b5d4ebe84ad64eab6987)
@@ -0,0 +1,137 @@
+/*
+ * Interrupt handler Header file
+ *
+ * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com>
+ *      
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *
+ *  $Id$
+ */
+
+#ifndef __IRQ_H__
+#define __IRQ_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef __asm__
+
+/*
+ * Include some preprocessor value also used by assember code
+ */
+  
+#include <rtems.h>
+#include <at91rm9200.h>
+
+extern void default_int_handler();
+/***********************************************************************
+ * Constants
+ **********************************************************************/
+/* enum of the possible interrupt sources on the AT91RM9200 */
+typedef enum {
+    AT91RM9200_INT_FIQ  = 0,
+    AT91RM9200_INT_SYSIRQ,
+    AT91RM9200_INT_PIOA,
+    AT91RM9200_INT_PIOB,
+    AT91RM9200_INT_PIOC,
+    AT91RM9200_INT_PIOD,
+    AT91RM9200_INT_US0,
+    AT91RM9200_INT_US1,
+    AT91RM9200_INT_US2,
+    AT91RM9200_INT_US3,
+    AT91RM9200_INT_MCI,
+    AT91RM9200_INT_UDP,
+    AT91RM9200_INT_TWI,
+    AT91RM9200_INT_SPI,
+    AT91RM9200_INT_SSC0,
+    AT91RM9200_INT_SSC1,
+    AT91RM9200_INT_SSC2,
+    AT91RM9200_INT_TC0,
+    AT91RM9200_INT_TC1,
+    AT91RM9200_INT_TC2,
+    AT91RM9200_INT_TC3,
+    AT91RM9200_INT_TC4,
+    AT91RM9200_INT_TC5,
+    AT91RM9200_INT_UHP,
+    AT91RM9200_INT_EMAC,
+    AT91RM9200_INT_IRQ0,
+    AT91RM9200_INT_IRQ1,
+    AT91RM9200_INT_IRQ2,
+    AT91RM9200_INT_IRQ3,
+    AT91RM9200_INT_IRQ4,
+    AT91RM9200_INT_IRQ5,
+    AT91RM9200_INT_IRQ6,
+    AT91RM9200_MAX_INT
+} rtems_irq_symbolic_name;
+
+/* vector table used by shared/irq_init.c */
+/* we can treat the AT91RM9200 AIC_SVR_BASE as */
+/* a vector table */
+#define VECTOR_TABLE AIC_SVR_BASE
+                                                                                           
+typedef unsigned char  rtems_irq_level;
+typedef unsigned char  rtems_irq_trigger;
+
+struct  __rtems_irq_connect_data__;     /* forward declaratiuon */
+
+typedef void (*rtems_irq_hdl)       (void);
+typedef void (*rtems_irq_enable)    (const struct __rtems_irq_connect_data__*);
+typedef void (*rtems_irq_disable)   (const struct __rtems_irq_connect_data__*);
+typedef int  (*rtems_irq_is_enabled)(const struct __rtems_irq_connect_data__*);
+
+typedef struct __rtems_irq_connect_data__ {
+    /* IRQ line */
+    rtems_irq_symbolic_name       name;
+
+    /* Handler */
+    rtems_irq_hdl                 hdl;
+
+    /* function for enabling interrupts at device level. */
+    rtems_irq_enable              on;
+
+    /* function for disabling interrupts at device level. */
+    rtems_irq_disable             off;
+
+    /* Function to test if interrupt is enabled */
+    rtems_irq_is_enabled        isOn;
+
+    /* priority level of interrupt */
+    rtems_irq_level               irqLevel;
+
+    /* Trigger method (rising/falling edge or high/low level) */
+    rtems_irq_trigger             irqTrigger;
+} rtems_irq_connect_data;
+
+/*
+ * function to initialize the interrupt for a specific BSP
+ */
+void BSP_rtems_irq_mngt_init();
+
+
+/*
+ * function to connect a particular irq handler.
+ */
+int BSP_install_rtems_irq_handler       (const rtems_irq_connect_data*);
+
+/*
+ * function to get the current RTEMS irq handler for ptr->name. 
+ */
+int BSP_get_current_rtems_irq_handler   (rtems_irq_connect_data* ptr);
+
+/*
+ * function to disconnect the RTEMS irq handler for ptr->name.
+ */
+int BSP_remove_rtems_irq_handler        (const rtems_irq_connect_data*);
+
+#endif /* __asm__ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __IRQ_H__ */
