Index: c/src/lib/libbsp/i386/force386/clock/ckinit.c
===================================================================
--- c/src/lib/libbsp/i386/force386/clock/ckinit.c	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
+++ c/src/lib/libbsp/i386/force386/clock/ckinit.c	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
@@ -0,0 +1,75 @@
+/*  Clock_initialize
+ *
+ *  This routine initializes the Motorola MFP 68901 on the
+ *  FORCE CPU386 board.  The tick frequency is 1 millisecond.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <bsp.h>
+#include <clockdrv.h>
+#include <stdlib.h>
+
+volatile rtems_unsigned32 Clock_driver_ticks;
+rtems_unsigned32 Clock_isrs;              /* ISRs until next tick */
+rtems_isr_entry  Old_ticker;
+
+rtems_device_driver Clock_initialize(
+  rtems_device_major_number major,
+  rtems_device_minor_number minor,
+  void *pargp,
+  rtems_id tid,
+  rtems_unsigned32 *rval
+)
+{
+  Install_clock( Clock_isr );
+}
+
+void ReInstall_clock(
+  rtems_isr_entry clock_isr
+)
+{
+  rtems_unsigned32 isrlevel = 0;
+
+  rtems_interrupt_disable( isrlevel );
+   (void) set_vector( clock_isr, 0x38, 1 );
+  rtems_interrupt_enable( isrlevel );
+}
+
+void Install_clock(
+  rtems_isr_entry clock_isr
+)
+{
+  Clock_driver_ticks = 0;
+  Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
+
+  if ( BSP_Configuration.ticks_per_timeslice ) {
+    Old_ticker = ( rtems_isr_entry ) set_vector( clock_isr, 0x38, 1 );
+    outport_byte( TBCR, 0x14 );  /* reset it, delay mode, 50X */
+    outport_byte( TBDR, 0x50 );  /* 1 millisecond */
+    outport_byte( IERA, 0x41 );  /* enable interrupt for B */
+  }
+  atexit( Clock_exit );
+}
+
+void Clock_exit( void )
+{
+  if ( BSP_Configuration.ticks_per_timeslice ) {
+    outport_byte( TBCR, 0x00 );  /* initial value */
+    outport_byte( IERA, 0x40 );  /* disable interrupt */
+    /* ??? Is "do not restore old vector" causing problems? */
+  }
+}
+
Index: c/src/lib/libbsp/i386/force386/console/console.c
===================================================================
--- c/src/lib/libbsp/i386/force386/console/console.c	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
+++ c/src/lib/libbsp/i386/force386/console/console.c	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
@@ -0,0 +1,219 @@
+/*
+ *  This file contains the Force CPU386 console IO package.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#define F386_INIT
+
+#include <stdlib.h>
+
+#include <rtems.h>
+#include "console.h"
+#include "bsp.h"
+
+/*  console_cleanup
+ *
+ *  This routine is called at exit to clean up the console hardware.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ */
+
+void console_cleanup( void )
+{
+  register rtems_unsigned8 ignored;
+  /*
+   *  FORCE technical support mentioned that it may be necessary to
+   *  read the DUSCC RX_BUFFER port four times to remove all junk.
+   *  This code is a little more paranoid.
+   */
+
+   inport_byte( RX_BUFFER, ignored );
+   inport_byte( RX_BUFFER, ignored );
+   inport_byte( RX_BUFFER, ignored );
+   inport_byte( RX_BUFFER, ignored );
+   inport_byte( RX_BUFFER, ignored );
+}
+
+/*  console_initialize
+ *
+ *  This routine initializes the console IO driver.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ */
+
+rtems_device_driver console_initialize(
+  rtems_device_major_number  major,
+  rtems_device_minor_number  minor,
+  void                      *arg,
+  rtems_id                   self,
+  rtems_unsigned32          *status
+)
+{
+   /*
+    *  flush the console now and at exit.  Just in case.
+    */
+
+   console_cleanup();
+
+   atexit( console_cleanup );
+}
+
+
+/*  is_character_ready
+ *
+ *  This routine returns TRUE if a character is available.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ */
+
+rtems_boolean is_character_ready(
+  char *ch
+)
+{
+  register rtems_unsigned8 status;
+
+  inport_byte( RX_STATUS, status );
+
+  if ( Is_rx_ready( status ) ) {
+     inport_byte( RX_BUFFER,  status );
+     *ch = status;
+     return TRUE;
+  }
+  return FALSE;
+}
+
+/*  inbyte
+ *
+ *  This routine reads a character from the UART.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ *    character read from UART
+ */
+
+char inbyte( void )
+{
+  register rtems_unsigned8 status;
+  char                     ch;
+
+  do {
+    inport_byte( RX_STATUS, status );
+  } while ( !Is_rx_ready( status ) );
+
+#if ( PORTB == 1 )
+  /*
+   *  Force example code resets the Channel B Receiver here.
+   *  It appears to cause XON's to be lost.
+   */
+
+   /* outport_byte( RX_STATUS, 0x10 );  */
+#endif
+
+  inport_byte( RX_BUFFER, ch );
+
+  return ch;
+}
+
+/*  outbyte
+ *
+ *  This routine transmits a character out the port.  It supports
+ *  XON/XOFF flow control.
+ *
+ *  Input parameters:
+ *    ch  - character to be transmitted
+ *
+ *  Output parameters:  NONE
+ */
+
+void outbyte(
+  char ch
+)
+{
+  rtems_unsigned8 status;
+
+  do {
+    inport_byte( TX_STATUS, status );
+  } while ( !Is_tx_ready( status ) );
+
+#if 0
+  while ( is_character_ready( &status ) == TRUE ) {      /* must be an XOFF */
+    if ( status == XOFF )
+      do {
+        while ( is_character_ready( &status ) == FALSE ) ;
+      } while ( status != XON );
+  }
+#endif
+
+  outport_byte( TX_BUFFER, ch );
+}
+
+/*
+ * __read  -- read bytes from the serial port. Ignore fd, since
+ *            we only have stdin.
+ */
+
+int __read(
+  int fd,
+  char *buf,
+  int nbytes
+)
+{
+  int i = 0;
+
+  for (i = 0; i < nbytes; i++) {
+    *(buf + i) = inbyte();
+    if ((*(buf + i) == '\n') || (*(buf + i) == '\r')) {
+      (*(buf + i++)) = '\n';
+      (*(buf + i)) = 0;
+      break;
+    }
+  }
+  return (i);
+}
+
+/*
+ * __write -- write bytes to the serial port. Ignore fd, since
+ *            stdout and stderr are the same. Since we have no filesystem,
+ *            open will only return an error.
+ */
+
+int __write(
+  int fd,
+  char *buf,
+  int nbytes
+)
+{
+  int i;
+
+  for (i = 0; i < nbytes; i++) {
+    if (*(buf + i) == '\n') {
+      outbyte ('\r');
+    }
+    outbyte (*(buf + i));
+  }
+  return (nbytes);
+}
Index: c/src/lib/libbsp/i386/force386/include/bsp.h
===================================================================
--- c/src/lib/libbsp/i386/force386/include/bsp.h	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
+++ c/src/lib/libbsp/i386/force386/include/bsp.h	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
@@ -0,0 +1,156 @@
+/*  bsp.h
+ *
+ *  This include file definitions related to the Force CPU-386 board.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#ifndef __FORCE386_h
+#define __FORCE386_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <rtems.h>
+#include <iosupp.h>
+
+/*
+ *  Define the time limits for RTEMS Test Suite test durations.
+ *  Long test and short test duration limits are provided.  These
+ *  values are in seconds and need to be converted to ticks for the
+ *  application.
+ *
+ */
+
+#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
+#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
+
+/*
+ *  Define the interrupt mechanism for Time Test 27
+ *
+ *  NOTE: Use a software interrupt for the i386.
+ */
+
+#define MUST_WAIT_FOR_INTERRUTPT 0
+
+#define Install_tm27_vector( handler ) set_vector( (handler), 0x90, 1 )
+
+#define Cause_tm27_intr()              asm volatile( "int $0x90" : : );
+
+#define Clear_tm27_intr()
+
+#define Lower_tm27_intr()
+
+/*
+ *  Simple spin delay in microsecond units for device drivers.
+ *  This is very dependent on the clock speed of the target.
+ */
+
+#define delay( _microseconds ) \
+  { \
+    rtems_unsigned32 _counter; \
+    \
+    _counter = (_microseconds); \
+    \
+    asm volatile ( "0: nop;" \
+                   " mov %0,%0 ;" \
+                   " loop 0b" : "=c" (_counter) \
+                              : "0"  (_counter) \
+                 ); \
+    \
+  }
+
+/* Constants */
+
+#define RAM_START 0
+#define RAM_END   0x100000
+
+/* I/O addressing */
+
+/*
+ *  The following determines whether Port B or the Console should
+ *  be used for test I/O.  Setting ONE (and only ONE) of these to 1
+ *  enables I/O on that port.
+ *
+ *  PORT A - DUSCC MC68562 Channel A
+ *  PORT B - DUSCC MC68562 Channel B
+ *  PORT C - MFP MC68901 Channel      (*** FORCEbug console ***)
+ */
+
+#define PORTB         1               /* use port b as test port */
+#define PORTC         0               /* use console port as test port */
+
+#if ( PORTB == 1 )
+#define TX_STATUS     0x1b6           /* DUSCC General Status Register */
+#define RX_STATUS     0x1b6           /* DUSCC General Status Register */
+#define TX_BUFFER     0x1e0           /* DUSCC Transmitter Channel B */
+#define RX_BUFFER     0x1e8           /* DUSCC Receiver Channel B */
+#define Is_tx_ready( _status ) ( (_status) & 0x20 )
+#define Is_rx_ready( _status ) ( (_status) & 0x10 )
+#endif
+
+#if ( PORTC == 1 )
+#define TX_STATUS     0x12c           /* MFP Transmit Status Register */
+#define RX_STATUS     0x12a           /* MFP Receive Status Register */
+#define TX_BUFFER     0x12e           /* MFP Transmitter Channel  */
+#define RX_BUFFER     0x12e           /* MFP Receiver Channel  */
+#define Is_tx_ready( _status ) ( (_status) & 0x80 )
+#define Is_rx_ready( _status ) ( (_status) & 0x80 )
+#endif
+
+/* Timer constants */
+
+#define IERA   0x106     /* Interrupt Enable Register A */
+#define IMRA   0x112     /* Interrupt Mask Register A */
+#define TACR   0x118     /* Timer A Control Register */
+#define TADR   0x11e     /* Timer A Data Register */
+
+#define IERB   0x108     /* Interrupt Enable Register B */
+#define TBCR   0x11a     /* Timer B Control Register */
+#define TBDR   0x120     /* Timer B Data Register */
+
+/* Structures */
+
+#ifdef F386_INIT
+#undef BSP_EXTERN
+#define BSP_EXTERN
+#else
+#undef BSP_EXTERN
+#define BSP_EXTERN extern
+#endif
+
+/* miscellaneous stuff assumed to exist */
+
+extern rtems_configuration_table BSP_Configuration;
+
+extern i386_IDT_slot Interrupt_descriptor_table[ 256 ];
+extern i386_GDT_slot Global_descriptor_table[ 8192 ];
+
+BSP_EXTERN unsigned short Idt[3];  /* Interrupt Descriptor Table Address */
+BSP_EXTERN unsigned short Gdt[3];  /* Global Descriptor Table Address */
+BSP_EXTERN unsigned int   Idt_base;
+BSP_EXTERN unsigned int   Gdt_base;
+
+/* routines */
+
+i386_isr set_vector(
+  rtems_isr_entry     handler,
+  rtems_vector_number vector,
+  int                 type
+);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */
Index: c/src/lib/libbsp/i386/force386/include/coverhd.h
===================================================================
--- c/src/lib/libbsp/i386/force386/include/coverhd.h	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
+++ c/src/lib/libbsp/i386/force386/include/coverhd.h	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
@@ -0,0 +1,104 @@
+/* coverhd.h
+ *
+ *  This include file has defines to represent the overhead associated
+ *  with calling a particular directive from C on this target.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#ifndef __COVERHD_h
+#define __COVERHD_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE      3
+#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE        3
+#define CALLING_OVERHEAD_TASK_CREATE               4
+#define CALLING_OVERHEAD_TASK_IDENT                4
+#define CALLING_OVERHEAD_TASK_START                4
+#define CALLING_OVERHEAD_TASK_RESTART              3
+#define CALLING_OVERHEAD_TASK_DELETE               3
+#define CALLING_OVERHEAD_TASK_SUSPEND              3
+#define CALLING_OVERHEAD_TASK_RESUME               3
+#define CALLING_OVERHEAD_TASK_SET_PRIORITY         4
+#define CALLING_OVERHEAD_TASK_MODE                 4
+#define CALLING_OVERHEAD_TASK_GET_NOTE             4
+#define CALLING_OVERHEAD_TASK_SET_NOTE             4
+#define CALLING_OVERHEAD_TASK_WAKE_WHEN            7
+#define CALLING_OVERHEAD_TASK_WAKE_AFTER           3
+#define CALLING_OVERHEAD_INTERRUPT_CATCH           4
+#define CALLING_OVERHEAD_CLOCK_GET                 7
+#define CALLING_OVERHEAD_CLOCK_SET                 7
+#define CALLING_OVERHEAD_CLOCK_TICK                2
+
+#define CALLING_OVERHEAD_TIMER_CREATE              3
+#define CALLING_OVERHEAD_TIMER_IDENT               3
+#define CALLING_OVERHEAD_TIMER_DELETE              3
+#define CALLING_OVERHEAD_TIMER_FIRE_AFTER          4
+#define CALLING_OVERHEAD_TIMER_FIRE_WHEN           8
+#define CALLING_OVERHEAD_TIMER_RESET               3
+#define CALLING_OVERHEAD_TIMER_CANCEL              3
+#define CALLING_OVERHEAD_SEMAPHORE_CREATE          4
+#define CALLING_OVERHEAD_SEMAPHORE_DELETE          3
+#define CALLING_OVERHEAD_SEMAPHORE_IDENT           4
+#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN          4
+#define CALLING_OVERHEAD_SEMAPHORE_RELEASE         3
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE      4
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT       4
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE      3
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND        3
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT      3
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST   4
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE     4
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH       3
+
+#define CALLING_OVERHEAD_EVENT_SEND                4
+#define CALLING_OVERHEAD_EVENT_RECEIVE             4
+#define CALLING_OVERHEAD_SIGNAL_CATCH              3
+#define CALLING_OVERHEAD_SIGNAL_SEND               3
+#define CALLING_OVERHEAD_PARTITION_CREATE          4
+#define CALLING_OVERHEAD_PARTITION_IDENT           4
+#define CALLING_OVERHEAD_PARTITION_DELETE          3
+#define CALLING_OVERHEAD_PARTITION_GET_BUFFER      4
+#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER   4
+#define CALLING_OVERHEAD_REGION_CREATE             4
+#define CALLING_OVERHEAD_REGION_IDENT              3
+#define CALLING_OVERHEAD_REGION_DELETE             3
+#define CALLING_OVERHEAD_REGION_GET_SEGMENT        4
+#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT     4
+#define CALLING_OVERHEAD_PORT_CREATE               4
+#define CALLING_OVERHEAD_PORT_IDENT                3
+#define CALLING_OVERHEAD_PORT_DELETE               3
+#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 4
+#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 4
+
+#define CALLING_OVERHEAD_IO_INITIALIZE             4
+#define CALLING_OVERHEAD_IO_OPEN                   4
+#define CALLING_OVERHEAD_IO_CLOSE                  4
+#define CALLING_OVERHEAD_IO_READ                   4
+#define CALLING_OVERHEAD_IO_WRITE                  4
+#define CALLING_OVERHEAD_IO_CONTROL                4
+#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED      3
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE     3
+#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT      3
+#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE     3
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL     3
+#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD     3
+#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE  2
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */
Index: c/src/lib/libbsp/i386/force386/shmsupp/addrconv.c
===================================================================
--- c/src/lib/libbsp/i386/force386/shmsupp/addrconv.c	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
+++ c/src/lib/libbsp/i386/force386/shmsupp/addrconv.c	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
@@ -0,0 +1,32 @@
+/*  Shm_Convert_address
+ *
+ *  The CPU386 has a "normal" view of the VME address space.
+ *  No address range conversion is required.
+ *
+ *  Input parameters:
+ *    address - address to convert
+ *
+ *  Output parameters:
+ *    returns - converted address
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <shm.h>
+
+void *Shm_Convert_address(
+  void *address
+)
+{
+  return ( address );
+}
Index: c/src/lib/libbsp/i386/force386/shmsupp/getcfg.c
===================================================================
--- c/src/lib/libbsp/i386/force386/shmsupp/getcfg.c	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
+++ c/src/lib/libbsp/i386/force386/shmsupp/getcfg.c	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
@@ -0,0 +1,73 @@
+/*  void Shm_Get_configuration( localnode, &shmcfg )
+ *
+ *  This routine initializes, if necessary, and returns a pointer
+ *  to the Shared Memory Configuration Table for the FORCE CPU-386
+ *
+ *  INPUT PARAMETERS:
+ *    localnode - local node number
+ *    shmcfg    - address of pointer to SHM Config Table
+ *
+ *  OUTPUT PARAMETERS:
+ *    *shmcfg   - pointer to SHM Config Table
+ *
+ *  NOTES:  The FORCE CPU-386 does not have an interprocessor interrupt.
+ *
+ *          The following table illustrates the configuration limitations:
+ *
+ *                                   BUS     MAX
+ *                          MODE    ENDIAN  NODES
+ *                        ========= ====== =======
+ *                         POLLED    BIG    2+
+ *                        INTERRUPT **** NOT SUPPORTED ****
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <shm.h>
+#include <bsp.h>
+
+#define INTERRUPT 0
+#define POLLING   1        /* FORCE CPU-386 target is polling ONLY!!! */
+
+
+shm_config_table BSP_shm_cfgtbl;
+
+void Shm_Get_configuration(
+  rtems_unsigned32   localnode,
+  shm_config_table **shmcfg
+)
+{
+   set_segment( get_ds(), 0x00002000, 0xffffd000  );
+
+   BSP_shm_cfgtbl.base         = i386_Physical_to_logical(
+                                    get_ds(),
+                                    (void *) 0x20000000
+                                  );
+
+   BSP_shm_cfgtbl.length       = 1 * MEGABYTE;
+   BSP_shm_cfgtbl.format       = SHM_BIG;
+
+   BSP_shm_cfgtbl.cause_intr   = Shm_Cause_interrupt;
+
+#ifdef NEUTRAL_BIG
+   BSP_shm_cfgtbl.convert      = NULL_CONVERT;
+#else
+   BSP_shm_cfgtbl.convert      = CPU_swap_u32;
+#endif
+
+   BSP_shm_cfgtbl.poll_intr    = POLLED_MODE;
+   BSP_shm_cfgtbl.Intr.address = NO_INTERRUPT;
+   BSP_shm_cfgtbl.Intr.value   = NO_INTERRUPT;
+   BSP_shm_cfgtbl.Intr.length  = NO_INTERRUPT;
+
+   *shmcfg = &BSP_shm_cfgtbl;
+}
Index: c/src/lib/libbsp/i386/force386/shmsupp/lock.c
===================================================================
--- c/src/lib/libbsp/i386/force386/shmsupp/lock.c	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
+++ c/src/lib/libbsp/i386/force386/shmsupp/lock.c	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
@@ -0,0 +1,83 @@
+/*  Shared Memory Lock Routines
+ *
+ *  This shared memory locked queue support routine need to be
+ *  able to lock the specified locked queue.  Interrupts are
+ *  disabled while the queue is locked to prevent preemption
+ *  and deadlock when two tasks poll for the same lock.
+ *  previous level.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <shm.h>
+
+/*
+ *  Shm_Initialize_lock
+ *
+ *  Initialize the lock for the specified locked queue.
+ */
+
+void Shm_Initialize_lock(
+  Shm_Locked_queue_Control *lq_cb
+)
+{
+  lq_cb->lock = LQ_UNLOCKED;
+}
+
+/*  void _Shm_Lock( &lq_cb )
+ *
+ *  This shared memory locked queue support routine locks the
+ *  specified locked queue.  It disables interrupts to prevent
+ *  a deadlock condition.
+ */
+
+void Shm_Lock(
+  Shm_Locked_queue_Control *lq_cb
+)
+{
+  rtems_unsigned32 isr_level;
+  volatile rtems_unsigned32 *lockptr = &lq_cb->lock;
+  rtems_unsigned32 lock_value;
+
+  lock_value = SHM_LOCK_VALUE;
+  rtems_interrupt_disable( isr_level );
+
+    Shm_isrstat = isr_level;
+    while ( 1 ) {
+      asm volatile( "lock ; xchg (%0),%1"
+                         : "=r" (lockptr), "=r" (lock_value)
+                         : "0" (lockptr),  "1" (lock_value)
+                  );
+      if ( lock_value == SHM_UNLOCK_VALUE )
+        break;
+      delay( 10 );   /* approximately 10 microseconds */
+   }
+}
+
+/*
+ *  Shm_Unlock
+ *
+ *  Unlock the lock for the specified locked queue.
+ */
+
+void Shm_Unlock(
+  Shm_Locked_queue_Control *lq_cb
+)
+{
+  rtems_unsigned32 isr_level;
+
+  lq_cb->lock = SHM_UNLOCK_VALUE;
+  isr_level = Shm_isrstat;
+  rtems_interrupt_enable( isr_level );
+}
+
Index: c/src/lib/libbsp/i386/force386/shmsupp/mpisr.c
===================================================================
--- c/src/lib/libbsp/i386/force386/shmsupp/mpisr.c	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
+++ c/src/lib/libbsp/i386/force386/shmsupp/mpisr.c	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
@@ -0,0 +1,31 @@
+/*  Shm_setvec
+ *
+ *  This driver routine sets the SHM interrupt vector to point to the
+ *  driver's SHM interrupt service routine.
+ *
+ *  NOTE: This routine is not used by the FORCE CPU-386 because it
+ *        only supports polling mode.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters: NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <shm.h>
+
+void Shm_setvec()
+{
+  /* NOT USED ON FORCE CPU-386!!! */
+}
Index: c/src/lib/libbsp/i386/force386/startup/bspstart.c
===================================================================
--- c/src/lib/libbsp/i386/force386/startup/bspstart.c	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
+++ c/src/lib/libbsp/i386/force386/startup/bspstart.c	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
@@ -0,0 +1,144 @@
+/*  bsp_start()
+ *
+ *  This routine starts the application.  It includes application,
+ *  board, and monitor specific initialization and configuration.
+ *  The generic CPU dependent initialization has been performed
+ *  before this routine is invoked.
+ *
+ *  INPUT:  NONE
+ *
+ *  OUTPUT: NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <libcsupport.h>
+
+#include <stackchk.h>
+
+/*
+ *  The original table from the application and our copy of it with
+ *  some changes.
+ */
+
+extern rtems_configuration_table  Configuration;
+rtems_configuration_table  BSP_Configuration;
+
+rtems_cpu_table Cpu_table;
+
+/*      Initialize whatever libc we are using
+ *      called from postdriver hook
+ */
+
+void bsp_libc_init()
+{
+    extern int end;
+    rtems_unsigned32        heap_start;
+
+    heap_start = (rtems_unsigned32) &end;
+    if (heap_start & (CPU_ALIGNMENT-1))
+        heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
+
+    RTEMS_Malloc_Initialize((void *) heap_start, 64 * 1024, 0);
+
+    /*
+     * Set up for the libc handling.
+     */
+
+    if (BSP_Configuration.ticks_per_timeslice > 0)
+        libc_init(1);                /* reentrant if possible */
+    else
+        libc_init(0);                /* non-reentrant */
+
+    /*
+     *  Initialize the stack bounds checker
+     */
+
+#ifdef STACK_CHECKER_ON
+    Stack_check_Initialize();
+#endif
+
+}
+
+int bsp_start(
+  int argc,
+  char **argv,
+  char **environp
+)
+{
+  /*
+   *  FORCE documentation incorrectly states that the bus request
+   *  level is initialized to 3.  It is actually initialized by
+   *  FORCEbug to 0.
+   */
+
+  outport_byte( 0x00, 0x3f );      /* resets VMEbus request level */
+
+  /*
+   *  we do not use the pretasking_hook.
+   */
+
+  Cpu_table.pretasking_hook = NULL;
+
+  Cpu_table.predriver_hook = bsp_libc_init;  /* RTEMS resources available */
+
+  Cpu_table.postdriver_hook = NULL;   /* Call our main() for constructors */
+
+  Cpu_table.idle_task = NULL;  /* do not override system IDLE task */
+
+  Cpu_table.do_zero_of_workspace = TRUE;
+
+  Cpu_table.interrupt_table_segment = get_ds();
+
+  Cpu_table.interrupt_table_offset = (void *)Interrupt_descriptor_table;
+
+  Cpu_table.interrupt_stack_size = 4096;
+
+  Cpu_table.extra_system_initialization_stack = 0;
+
+  /*
+   *  Copy the table
+   */
+
+  BSP_Configuration = Configuration;
+
+  BSP_Configuration.work_space_start = (void *)
+     RAM_END - BSP_Configuration.work_space_size;
+
+  /*
+   * Add 1 region for Malloc in libc_low
+   */
+
+  BSP_Configuration.maximum_regions++;
+
+  /*
+   * Add 1 extension for newlib libc
+   */
+
+#ifdef RTEMS_NEWLIB
+    BSP_Configuration.maximum_extensions++;
+#endif
+
+  /*
+   * Add another extension if using the stack checker
+   */
+
+#ifdef STACK_CHECKER_ON
+    BSP_Configuration.maximum_extensions++;
+#endif
+
+  rtems_initialize_executive( &BSP_Configuration, &Cpu_table );
+  /* does not return */
+  /* no cleanup necessary for Force CPU-386 */
+  return 0;
+}
Index: c/src/lib/libbsp/i386/force386/startup/exit.c
===================================================================
--- c/src/lib/libbsp/i386/force386/startup/exit.c	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
+++ c/src/lib/libbsp/i386/force386/startup/exit.c	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
@@ -0,0 +1,29 @@
+/*
+ *  exit
+ *
+ *  This routine returns control to FORCEbug.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <clockdrv.h>
+#include <iodrv.h>
+
+void _exit( )
+{
+   /* Clock or Timer cleanup is run by at_exit() */
+
+   Io_cleanup();
+
+   bsp_cleanup();
+}
Index: c/src/lib/libbsp/i386/force386/startup/ldsegs.s
===================================================================
--- c/src/lib/libbsp/i386/force386/startup/ldsegs.s	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
+++ c/src/lib/libbsp/i386/force386/startup/ldsegs.s	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
@@ -0,0 +1,86 @@
+/*  _load_segments
+ *
+ *  This file assists the board independent startup code by
+ *  loading the proper segment register values.  The values
+ *  loaded are board dependent.
+ *
+ *  NOTE:  No stack has been established when this routine
+ *         is invoked.  It returns by jumping back to bspentry.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include "asm.h"
+
+BEGIN_CODE
+
+/*
+ *  FORCEBUG loads us into a virtual address space which
+ *  really starts at PHYSICAL_ADDRESS_BASE.
+ */
+
+.set PHYSICAL_ADDRESS_BASE,    0x00002000
+
+/*
+ *  At reset time, FORCEBUG normally has the segment selectors preloaded.
+ *  If a human resets the instruction pointer, this will not have occurred.
+ *  However, no guarantee can be made of the other registers if cs:ip was
+ *  modified to restart the program.  Because of this, the BSP reloads all
+ *  segment registers (except cs) with the values they have following
+ *  a reset.
+ */
+
+
+.set RESET_SS, 0x40        # initial value of stack segment register
+.set RESET_DS, 0x40        # initial value of data segment register
+.set RESET_ES, 0x40        # initial value of extra segment register
+.set RESET_FS, 0x40        # initial value of "f" segment register
+.set RESET_GS, 0x30        # initial value of "g" segment register
+
+
+#define LOAD_SEGMENTS(_value,_segment) \
+        movw      $ ## _value, ax ; \
+        movw      _segment, ax
+
+        EXTERN (establish_stack)
+
+        PUBLIC (_load_segments)
+SYM (_load_segments):
+        LOAD_SEGMENTS( RESET_SS, ss )
+        LOAD_SEGMENTS( RESET_DS, ds )
+        LOAD_SEGMENTS( RESET_ES, es )
+        LOAD_SEGMENTS( RESET_FS, fs )
+        LOAD_SEGMENTS( RESET_GS, gs )
+
+        jmp     SYM (_establish_stack)  # return to the bsp entry code
+
+        PUBLIC (_return_to_monitor)
+SYM (_return_to_monitor):
+
+        call    SYM (Clock_exit)
+        movb    $0,al
+        int     $0x20                   # restart FORCEbug
+        jmp     SYM (start)             # FORCEbug does not reset PC
+
+END_CODE
+
+BEGIN_DATA
+
+        PUBLIC (_Do_Load_IDT)
+SYM (_Do_Load_IDT):
+       .byte 1
+
+        PUBLIC (_Do_Load_GDT)
+SYM (_Do_Load_GDT):
+       .byte 0
+
+END_DATA
+END
Index: c/src/lib/libbsp/i386/force386/startup/linkcmds
===================================================================
--- c/src/lib/libbsp/i386/force386/startup/linkcmds	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
+++ c/src/lib/libbsp/i386/force386/startup/linkcmds	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
@@ -0,0 +1,44 @@
+/*
+ *  This file contains directives for the GNU linker which are specific
+ *  to the FORCE CPU386 board.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+MEMORY
+        {
+        ram : org = 0x0, l = 1M
+        }
+
+SECTIONS
+{
+        .text 0x0 :
+        {
+        _text_start = . ;
+        *(.text)
+        _etext = ALIGN( 0x10 ) ;
+        }
+        .data ADDR( .text ) + SIZEOF( .text ):
+        {
+        _data_start = . ;
+        *(.data)
+        _edata = ALIGN( 0x10 ) ;
+        }
+        .bss ADDR( .data ) + SIZEOF( .data ):
+        {
+        _bss_start = . ;
+        *(.bss)
+        *(COMMON)
+        end = . ;
+        _end = . ;
+        __end = . ;
+        }
+}
Index: c/src/lib/libbsp/i386/force386/startup/setvec.c
===================================================================
--- c/src/lib/libbsp/i386/force386/startup/setvec.c	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
+++ c/src/lib/libbsp/i386/force386/startup/setvec.c	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
@@ -0,0 +1,59 @@
+/*  set_vector
+ *
+ *  This routine installs an interrupt vector on the Force CPU-386.
+ *
+ *  INPUT:
+ *    handler - interrupt handler entry point
+ *    vector  - vector number
+ *    type    - 0 indicates raw hardware connect
+ *              1 indicates RTEMS interrupt connect
+ *
+ *  RETURNS:
+ *    address of previous interrupt handler
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+
+i386_isr set_vector(                            /* returns old vector */
+  rtems_isr_entry     handler,                  /* isr routine        */
+  rtems_vector_number vector,                   /* vector number      */
+  int                 type                      /* RTEMS or RAW intr  */
+)
+{
+  i386_isr       previous_isr;
+  i386_IDT_slot  idt;
+
+  if ( type )
+    rtems_interrupt_catch( handler, vector, (rtems_isr_entry *) &previous_isr );
+  else {
+    /* get the address of the old handler */
+
+    idt = Interrupt_descriptor_table[ vector ];
+
+    previous_isr = (i386_isr)
+                      ((idt.offset_16_31 << 16) | idt.offset_0_15);
+
+    /* build the IDT entry */
+    idt.offset_0_15      = ((rtems_unsigned32) handler) & 0xffff;
+    idt.segment_selector = get_cs();
+    idt.reserved         = 0x00;
+    idt.p_dpl            = 0x8e;         /* present, ISR */
+    idt.offset_16_31     = ((rtems_unsigned32) handler) >> 16;
+
+    /* install the IDT entry */
+    Interrupt_descriptor_table[ vector ] = idt;
+  }
+  return previous_isr;
+}
+
Index: c/src/lib/libbsp/i386/force386/timer/timer.c
===================================================================
--- c/src/lib/libbsp/i386/force386/timer/timer.c	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
+++ c/src/lib/libbsp/i386/force386/timer/timer.c	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
@@ -0,0 +1,96 @@
+/*  Timer_init()
+ *
+ *  This routine initializes the timer on the FORCE CPU-386 board.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  NOTE: This routine will not work if the optimizer is enabled
+ *        for some compilers.  The multiple writes to the Z8036
+ *        may be optimized away.
+ *
+ *        It is important that the timer start/stop overhead be
+ *        determined when porting or modifying this code.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+
+#include <rtems.h>
+#include <bsp.h>
+
+int Ttimer_val;
+rtems_boolean Timer_driver_Find_average_overhead;
+
+rtems_isr timerisr();
+
+void Timer_initialize()
+{
+
+  (void) set_vector( timerisr, 0x38, 0 );   /* install ISR */
+
+  Ttimer_val = 0;                           /* clear timer ISR count */
+
+  outport_byte( IERA, 0x40 );               /* disable interrupt */
+  outport_byte( TBCR, 0x40 );               /* stop the timer */
+  outport_byte( TBDR, 250 );                /* 250 units */
+
+  outport_byte( TBCR, 0x11 );               /* reset it, delay mode, 4X */
+#if 0
+  outport_byte( TBCR, 0x13 );               /* reset it, delay mode, 16X */
+#endif
+
+  outport_byte( IERA, 0x41 );               /* enable interrupt */
+
+}
+
+#define AVG_OVERHEAD      3  /* It typically takes 3.0 microseconds */
+                             /* (3 ticks) to start/stop the timer. */
+#define LEAST_VALID       4  /* Don't trust a value lower than this */
+
+int Read_timer()
+{
+  register rtems_unsigned32 clicks;
+  register rtems_unsigned32 total;
+
+  outport_byte( TBCR, 0x00 );        /* stop the timer */
+
+  inport_byte( TBDR, clicks );
+
+  total = Ttimer_val + 250 - clicks;
+
+  outport_byte( TBCR, 0x00 );  /* initial value */
+  outport_byte( IERA, 0x40 );  /* disable interrupt */
+
+  /* ??? Is "do not restore old vector" causing problems? */
+
+  if ( Timer_driver_Find_average_overhead == 1 )
+    return total;          /* in one microsecond units */
+
+  else {
+    if ( total < LEAST_VALID )
+      return 0;            /* below timer resolution */
+    return (total - AVG_OVERHEAD);
+  }
+}
+
+rtems_status_code Empty_function( void )
+{
+  return RTEMS_SUCCESSFUL;
+}
+
+void Set_find_average_overhead(
+  rtems_boolean find_flag
+)
+{
+  Timer_driver_Find_average_overhead = find_flag;
+}
Index: c/src/lib/libbsp/i386/force386/timer/timerisr.s
===================================================================
--- c/src/lib/libbsp/i386/force386/timer/timerisr.s	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
+++ c/src/lib/libbsp/i386/force386/timer/timerisr.s	(revision ac7d5ef06a6d6e8d84abbd1f0b82162725f98326)
@@ -0,0 +1,34 @@
+/*  timer_isr()
+ *
+ *  This routine provides the ISR for the Z8036 timer on the MVME136
+ *  board.   The timer is set up to generate an interrupt at maximum
+ *  intervals.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include "asm.h"
+
+        BEGIN_CODE
+
+        EXTERN (Ttimer_val)
+
+        PUBLIC (timerisr)
+SYM (timerisr):
+        addl    $250, SYM (Ttimer_val)   # another 250 microseconds
+        iret
+
+END_CODE
+END
