Changeset abde5688 in rtems


Ignore:
Timestamp:
Sep 19, 2001, 5:40:51 PM (19 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
8f6e5f0d
Parents:
5400f07
Message:

2001-09-19 Eric Norum <eric.norum@…>

  • README: Bring it more in line with reality.
Location:
c/src/lib/libbsp/m68k/gen68360
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/m68k/gen68360/ChangeLog

    r5400f07 rabde5688  
     12001-09-19      Eric Norum <eric.norum@usask.ca>
     2
     3        * README: Bring it more in line with reality.
     4
    152001-05-26      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
    26
  • c/src/lib/libbsp/m68k/gen68360/README

    r5400f07 rabde5688  
    1010# Please send any comments, improvements, or bug reports to:
    1111#       W. Eric Norum
    12 #       Saskatchewan Accelerator Laboratory
    13 #       107 North Road
     12#       Deparment of Electrical Engineering
     13#       53 Campus Driver
    1414#       University of Saskatchewan
    1515#       Saskatoon, Saskatchewan, CANADA
    16 #       S7N 5C6
    17 # eric@skatter.usask.ca
     16#       S7N 5A9
     17# eric.norum@usask.ca
    1818#
    1919
     
    3434#         version works with the Atlas ACE360 card.
    3535#
    36 # Decisions to be made a link-edit time are:
    37 #     - The size of the memory allocator heap.  The default value is
    38 #       64 kbytes.  If the network package is used the heap
    39 #       should be at least 256 kbytes.  If your network is large, or
    40 #       busy, the heap should be even larger.
    41 #       To choose a heap size of 256 kbytes,
    42 #       CFLAGS_LD += -Wl,--defsym -Wl,HeapSize=0x40000
    4336
    4437BSP NAME:           gen68360 or gen68360_040
     
    8780-----------------
    8881clock rate:     25 MHz
    89 bus width:      8-bit PROM, 32-bit DRAM
     82bus width:      8-bit PROM/FLASH, 32-bit DRAM
    9083ROM:            To 1 MByte, 180 nsec (3 wait states), chip select 0
    9184RAM:            4 or 16 MBytes of 60 nsec parity DRAM (1Mx36) to RAS1*/CAS1*
     
    300293                P.O. Box 270352
    301294                Fort Collins, CO 80527-0352
    302 
    303 Interrupt Notes
    304 ===============
    305 clock.c:
    306         Occasional network lockups have been noted when the PIT has a higher
    307 interrupt request level than the CPM.  The SCC1 bit in the CISR is set
    308 even though the SCC1 interrupt handler is not active.  This blocks
    309 interrupts from SCC1 (and all other CPM sources) and locks up the
    310 system.  It has not been determined whether the error is within the
    311 68360 or in the RTEMS interrupt support assembler code.  The solution,
    312 for now, is to set both PIT and CPM interrupt request levels to the same
    313 value (4).
    314 
    315 
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