Changeset a9cc6a84 in rtems


Ignore:
Timestamp:
Jun 1, 2016, 7:50:44 AM (3 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
master
Children:
f807b84
Parents:
6b5df95
git-author:
Sebastian Huber <sebastian.huber@…> (06/01/16 07:50:44)
git-committer:
Sebastian Huber <sebastian.huber@…> (06/01/16 07:53:43)
Message:

smptests/smpatomic01: New test cases

Demonstrate that a read-modify-write atomic operation may be necessary
on some archtitectures to observe the latest value written.

Files:
3 edited

Legend:

Unmodified
Added
Removed
  • cpukit/libmisc/testsupport/testparallel.c

    r6b5df95 ra9cc6a84  
    6969        rtems_interval duration = (*job->init)(ctx, job->arg, active_worker);
    7070
    71         start_worker_stop_timer(ctx, duration);
     71        if (duration > 0) {
     72          start_worker_stop_timer(ctx, duration);
     73        }
    7274      }
    7375
  • testsuites/smptests/smpatomic01/init.c

    r6b5df95 ra9cc6a84  
    11/*
    2  * Copyright (c) 2013-2015 embedded brains GmbH.  All rights reserved.
     2 * Copyright (c) 2013, 2016 embedded brains GmbH.  All rights reserved.
    33 *
    44 *  embedded brains GmbH
     
    2020
    2121#include <rtems/score/atomic.h>
     22#include <rtems/score/smpbarrier.h>
    2223#include <rtems.h>
     24#include <rtems/bsd.h>
    2325#include <rtems/test.h>
    2426#include <limits.h>
     
    2830
    2931const char rtems_test_name[] = "SMPATOMIC 1";
     32
     33#define MS_PER_TICK 10
    3034
    3135#define MASTER_PRIORITY 1
     
    4347  unsigned long second_value;
    4448  Atomic_Flag global_flag;
     49  SMP_barrier_Control barrier;
     50  SMP_barrier_State barrier_state[CPU_COUNT];
     51  sbintime_t load_trigger_time;
     52  sbintime_t load_change_time[CPU_COUNT];
     53  int load_count[CPU_COUNT];
     54  sbintime_t rmw_trigger_time;
     55  sbintime_t rmw_change_time[CPU_COUNT];
     56  int rmw_count[CPU_COUNT];
    4557} smpatomic01_context;
    4658
     
    409421    ctx->second_value
    410422  );
     423}
     424
     425static rtems_interval test_atomic_store_load_rmw_init(
     426  rtems_test_parallel_context *base,
     427  void *arg,
     428  size_t active_workers
     429)
     430{
     431  smpatomic01_context *ctx = (smpatomic01_context *) base;
     432  size_t i;
     433
     434  _Atomic_Init_ulong(&ctx->atomic_value, 0);
     435
     436  _SMP_barrier_Control_initialize(&ctx->barrier);
     437
     438  for (i = 0; i < active_workers; ++i) {
     439    _SMP_barrier_State_initialize(&ctx->barrier_state[i]);
     440  }
     441
     442  return 0;
     443}
     444
     445static sbintime_t now(void)
     446{
     447  struct bintime bt;
     448
     449  rtems_bsd_binuptime(&bt);
     450  return bttosbt(bt);
     451}
     452
     453static void test_atomic_store_load_rmw_body(
     454  rtems_test_parallel_context *base,
     455  void *arg,
     456  size_t active_workers,
     457  size_t worker_index
     458)
     459{
     460  smpatomic01_context *ctx = (smpatomic01_context *) base;
     461  uint32_t cpu_self_index;
     462  sbintime_t t;
     463  int counter;
     464
     465  if (rtems_test_parallel_is_master_worker(worker_index)) {
     466    rtems_status_code sc;
     467
     468    sc = rtems_task_wake_after(1);
     469    rtems_test_assert(sc == RTEMS_SUCCESSFUL);
     470
     471    t = now();
     472    t += (MS_PER_TICK / 2) * SBT_1MS;
     473    ctx->load_trigger_time = t;
     474    t += MS_PER_TICK * SBT_1MS;
     475    ctx->rmw_trigger_time = t;
     476  }
     477
     478  _Atomic_Fence(ATOMIC_ORDER_SEQ_CST);
     479
     480  _SMP_barrier_Wait(
     481    &ctx->barrier,
     482    &ctx->barrier_state[worker_index],
     483    active_workers
     484  );
     485
     486  /*
     487   * Use the physical processor index, to observe timing differences introduced
     488   * by the system topology.
     489   */
     490  cpu_self_index = rtems_get_current_processor();
     491
     492  /* Store release and load acquire test case */
     493
     494  counter = 0;
     495  t = ctx->load_trigger_time;
     496
     497  while (now() < t) {
     498    /* Wait */
     499  }
     500
     501  if (cpu_self_index == 0) {
     502    _Atomic_Store_ulong(&ctx->atomic_value, 1, ATOMIC_ORDER_RELEASE);
     503  } else {
     504    while (_Atomic_Load_ulong(&ctx->atomic_value, ATOMIC_ORDER_ACQUIRE) == 0) {
     505      ++counter;
     506    }
     507  }
     508
     509  ctx->load_change_time[cpu_self_index] = now();
     510  ctx->load_count[cpu_self_index] = counter;
     511
     512  /* Read-modify-write test case */
     513
     514  if (cpu_self_index == 0) {
     515    _Atomic_Store_ulong(&ctx->atomic_value, 0, ATOMIC_ORDER_RELAXED);
     516  }
     517
     518  counter = 0;
     519  t = ctx->rmw_trigger_time;
     520
     521  while (now() < t) {
     522    /* Wait */
     523  }
     524
     525  if (cpu_self_index == 0) {
     526    _Atomic_Store_ulong(&ctx->atomic_value, 1, ATOMIC_ORDER_RELAXED);
     527  } else {
     528    while (
     529      (_Atomic_Fetch_or_ulong(&ctx->atomic_value, 2, ATOMIC_ORDER_RELAXED) & 1)
     530        == 0
     531    ) {
     532      ++counter;
     533    }
     534  }
     535
     536  ctx->rmw_change_time[cpu_self_index] = now();
     537  ctx->rmw_count[cpu_self_index] = counter;
     538}
     539
     540static void test_atomic_store_load_rmw_fini(
     541  rtems_test_parallel_context *base,
     542  void *arg,
     543  size_t active_workers
     544)
     545{
     546  smpatomic01_context *ctx = (smpatomic01_context *) base;
     547  size_t i;
     548  struct bintime bt;
     549  struct timespec ts;
     550
     551  printf("=== atomic store release and load acquire test case ===\n");
     552
     553  for (i = 0; i < active_workers; ++i) {
     554    bt = sbttobt(ctx->load_change_time[i] - ctx->load_trigger_time);
     555    bintime2timespec(&bt, &ts);
     556    printf(
     557      "processor %zu delta %lins, load count %i\n",
     558      i,
     559      ts.tv_nsec,
     560      ctx->load_count[i]
     561    );
     562  }
     563
     564  printf("=== atomic read-modify-write test case ===\n");
     565
     566  for (i = 0; i < active_workers; ++i) {
     567    bt = sbttobt(ctx->rmw_change_time[i] - ctx->rmw_trigger_time);
     568    bintime2timespec(&bt, &ts);
     569    printf(
     570      "processor %zu delta %lins, read-modify-write count %i\n",
     571      i,
     572      ts.tv_nsec,
     573      ctx->rmw_count[i]
     574    );
     575  }
    411576}
    412577
     
    436601    .body = test_atomic_fence_body,
    437602    .fini = test_atomic_fence_fini
    438   },
     603  }, {
     604    .init = test_atomic_store_load_rmw_init,
     605    .body = test_atomic_store_load_rmw_body,
     606    .fini = test_atomic_store_load_rmw_fini
     607  }
    439608};
    440609
     
    472641#define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
    473642
     643#define CONFIGURE_MICROSECONDS_PER_TICK (MS_PER_TICK * 1000)
     644
    474645#define CONFIGURE_SMP_APPLICATION
    475646
  • testsuites/smptests/smpatomic01/smpatomic01.scn

    r6b5df95 ra9cc6a84  
    1 *** TEST SMPATOMIC 1 ***
     1*** BEGIN OF TEST SMPATOMIC 1 ***
    22=== atomic add test case ===
    3 worker 0 value: 16686
    4 worker 1 value: 36405
    5 atomic value: expected = 53091, actual = 53091
     3worker 0 value: 68020
     4worker 1 value: 355745
     5worker 2 value: 341230
     6worker 3 value: 395115
     7worker 4 value: 341233
     8worker 5 value: 352026
     9worker 6 value: 381492
     10worker 7 value: 357940
     11worker 8 value: 422258
     12worker 9 value: 244645
     13worker 10 value: 246474
     14worker 11 value: 197385
     15worker 12 value: 256213
     16worker 13 value: 233617
     17worker 14 value: 234606
     18worker 15 value: 260702
     19worker 16 value: 214706
     20worker 17 value: 86201
     21worker 18 value: 104268
     22worker 19 value: 67940
     23worker 20 value: 68509
     24worker 21 value: 98021
     25worker 22 value: 66668
     26worker 23 value: 87962
     27atomic value: expected = 5482976, actual = 5482976
    628=== atomic flag test case ===
    7 worker 0 value: 5588
    8 worker 1 value: 16019
    9 atomic value: expected = 21607, actual = 21607
     29worker 0 value: 90301
     30worker 1 value: 90507
     31worker 2 value: 91048
     32worker 3 value: 90930
     33worker 4 value: 91129
     34worker 5 value: 90994
     35worker 6 value: 91677
     36worker 7 value: 91086
     37worker 8 value: 90729
     38worker 9 value: 90540
     39worker 10 value: 91358
     40worker 11 value: 90859
     41worker 12 value: 90954
     42worker 13 value: 90816
     43worker 14 value: 91052
     44worker 15 value: 90994
     45worker 16 value: 90961
     46worker 17 value: 89741
     47worker 18 value: 90144
     48worker 19 value: 90270
     49worker 20 value: 90301
     50worker 21 value: 90054
     51worker 22 value: 89782
     52worker 23 value: 90108
     53atomic value: expected = 2176335, actual = 2176335
    1054=== atomic sub test case ===
    11 worker 0 value: 4294950967
    12 worker 1 value: 4294930886
    13 atomic value: expected = 4294914557, actual = 4294914557
     55worker 0 value: 4294821032
     56worker 1 value: 4294618821
     57worker 2 value: 4294631020
     58worker 3 value: 4294597642
     59worker 4 value: 4294626165
     60worker 5 value: 4294629962
     61worker 6 value: 4294601673
     62worker 7 value: 4294668647
     63worker 8 value: 4294687608
     64worker 9 value: 4294691802
     65worker 10 value: 4294770759
     66worker 11 value: 4294700436
     67worker 12 value: 4294715096
     68worker 13 value: 4294716993
     69worker 14 value: 4294708426
     70worker 15 value: 4294725595
     71worker 16 value: 4294732565
     72worker 17 value: 4294893135
     73worker 18 value: 4294857801
     74worker 19 value: 4294892291
     75worker 20 value: 4294874959
     76worker 21 value: 4294839944
     77worker 22 value: 4294874753
     78worker 23 value: 4294875135
     79atomic value: expected = 4289504452, actual = 4289504452
    1480=== atomic compare exchange test case ===
    15 worker 0 value: 2950
    16 worker 1 value: 22456
    17 atomic value: expected = 25406, actual = 25406
     81worker 0 value: 121131
     82worker 1 value: 134839
     83worker 2 value: 139422
     84worker 3 value: 123158
     85worker 4 value: 122908
     86worker 5 value: 134536
     87worker 6 value: 134554
     88worker 7 value: 133142
     89worker 8 value: 129816
     90worker 9 value: 133474
     91worker 10 value: 129722
     92worker 11 value: 140019
     93worker 12 value: 129180
     94worker 13 value: 122164
     95worker 14 value: 135158
     96worker 15 value: 126391
     97worker 16 value: 132336
     98worker 17 value: 123469
     99worker 18 value: 122731
     100worker 19 value: 124443
     101worker 20 value: 125119
     102worker 21 value: 121813
     103worker 22 value: 123291
     104worker 23 value: 121235
     105atomic value: expected = 3084051, actual = 3084051
    18106=== atomic or/and test case ===
    19 worker 0 value: 1
     107worker 0 value: 0
    20108worker 1 value: 0
    21 atomic value: expected = 1, actual = 1
     109worker 2 value: 4
     110worker 3 value: 8
     111worker 4 value: 0
     112worker 5 value: 32
     113worker 6 value: 64
     114worker 7 value: 0
     115worker 8 value: 0
     116worker 9 value: 512
     117worker 10 value: 0
     118worker 11 value: 0
     119worker 12 value: 0
     120worker 13 value: 8192
     121worker 14 value: 16384
     122worker 15 value: 0
     123worker 16 value: 0
     124worker 17 value: 131072
     125worker 18 value: 0
     126worker 19 value: 524288
     127worker 20 value: 1048576
     128worker 21 value: 2097152
     129worker 22 value: 0
     130worker 23 value: 8388608
     131atomic value: expected = 12214892, actual = 12214892
    22132=== atomic fence test case ===
    23 normal value = 10759507, second value = 10759507
     133normal value = 10931635, second value = 10931635
     134=== atomic store release and load acquire test case ===
     135processor 0 delta 1040ns, load count 0
     136processor 1 delta 1573ns, load count 59
     137processor 2 delta 1840ns, load count 21
     138processor 3 delta 1307ns, load count 71
     139processor 4 delta 1440ns, load count 45
     140processor 5 delta 1973ns, load count 0
     141processor 6 delta 1173ns, load count 84
     142processor 7 delta 1707ns, load count 34
     143processor 8 delta 1867ns, load count 39
     144processor 9 delta 1360ns, load count 84
     145processor 10 delta 1227ns, load count 0
     146processor 11 delta 1760ns, load count 51
     147processor 12 delta 1493ns, load count 13
     148processor 13 delta 2000ns, load count 64
     149processor 14 delta 2133ns, load count 77
     150processor 15 delta 1627ns, load count 26
     151processor 16 delta 2240ns, load count 41
     152processor 17 delta 1733ns, load count 0
     153processor 18 delta 2000ns, load count 29
     154processor 19 delta 1467ns, load count 74
     155processor 20 delta 1600ns, load count 16
     156processor 21 delta 1200ns, load count 66
     157processor 22 delta 1867ns, load count 3
     158processor 23 delta 1333ns, load count 53
     159=== atomic read-modify-write test case ===
     160processor 0 delta 1067ns, read-modify-write count 0
     161processor 1 delta 3921ns, read-modify-write count 0
     162processor 2 delta 3067ns, read-modify-write count 0
     163processor 3 delta 1200ns, read-modify-write count 0
     164processor 4 delta 3600ns, read-modify-write count 0
     165processor 5 delta 3334ns, read-modify-write count 0
     166processor 6 delta 1334ns, read-modify-write count 0
     167processor 7 delta 2187ns, read-modify-write count 0
     168processor 8 delta 1147ns, read-modify-write count 0
     169processor 9 delta 3947ns, read-modify-write count 0
     170processor 10 delta 2321ns, read-modify-write count 0
     171processor 11 delta 3734ns, read-modify-write count 0
     172processor 12 delta 2827ns, read-modify-write count 1
     173processor 13 delta 2481ns, read-modify-write count 0
     174processor 14 delta 1254ns, read-modify-write count 0
     175processor 15 delta 2667ns, read-modify-write count 0
     176processor 16 delta 3467ns, read-modify-write count 0
     177processor 17 delta 2054ns, read-modify-write count 0
     178processor 18 delta 1707ns, read-modify-write count 1
     179processor 19 delta 1894ns, read-modify-write count 0
     180processor 20 delta 2934ns, read-modify-write count 0
     181processor 21 delta 1547ns, read-modify-write count 0
     182processor 22 delta 1361ns, read-modify-write count 0
     183processor 23 delta 3200ns, read-modify-write count 0
    24184*** END OF TEST SMPATOMIC 1 ***
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