- Timestamp:
- 05/05/15 13:32:03 (9 years ago)
- Branches:
- 4.11, 5, master
- Children:
- 1c59cad
- Parents:
- 75acd9e
- git-author:
- Alexander Krutwig <alexander.krutwig@…> (05/05/15 13:32:03)
- git-committer:
- Sebastian Huber <sebastian.huber@…> (05/21/15 07:02:51)
- File:
-
- 1 edited
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doc/cpu_supplement/sparc.t
r75acd9e ra9c4f15d 426 426 @end itemize 427 427 428 The floating point status register ( fpsr) specifies428 The floating point status register (FSR) specifies 429 429 the behavior of the floating point unit for rounding, contains 430 430 its condition codes, version specification, and trap information. 431 432 According to the ABI all floating point registers and the floating point status 433 register (FSR) are volatile. Thus the floating point context of a thread is the 434 empty set. The rounding direction is a system global state and must not be 435 modified by threads. 431 436 432 437 A queue of the floating point instructions which have
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