![[RTEMS Logo]](/images/logo.png){kind=logo}
Changeset a982e0c6 in rtems
- Timestamp:
- Oct 18, 2000, 6:24:43 PM (19 years ago)
- Branches:
- 4.10, 4.11, 4.8, 4.9, master
- Children:
- f2442183
- Parents:
- 10c6e903
- Location:
- c/src/lib
- Files:
-
- 2 added
- 13 edited
-
libbsp/powerpc/support/old_exception_processing/Makefile.am (modified) (2 diffs)
-
libbsp/powerpc/support/old_exception_processing/cpu.h (modified) (1 diff)
-
libbsp/powerpc/support/old_exception_processing/cpu_asm.S (modified) (1 diff)
-
libbsp/powerpc/support/old_exception_processing/ppc_offs.h (added)
-
libcpu/powerpc/ChangeLog (modified) (1 diff)
-
libcpu/powerpc/configure.in (modified) (1 diff)
-
libcpu/powerpc/mpc505/Makefile.am (modified) (1 diff)
-
libcpu/powerpc/mpc505/timer/timer.c (modified) (1 diff)
-
libcpu/powerpc/mpc505/vectors/Makefile.am (modified) (1 diff)
-
libcpu/powerpc/mpc505/vectors/vectors.S (modified) (3 diffs)
-
libcpu/powerpc/old-exceptions/cpu_asm.S (modified) (1 diff)
-
libcpu/powerpc/old_exception_processing/Makefile.am (modified) (2 diffs)
-
libcpu/powerpc/old_exception_processing/cpu.h (modified) (1 diff)
-
libcpu/powerpc/old_exception_processing/cpu_asm.S (modified) (1 diff)
-
libcpu/powerpc/old_exception_processing/ppc_offs.h (added)
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libbsp/powerpc/support/old_exception_processing/Makefile.am
r10c6e903 ra982e0c6 10 10 11 11 ROOT_H_FILES = 12 RTEMS_SCORE_H_FILES = cpu.h c_isr.inl 12 RTEMS_SCORE_H_FILES = cpu.h c_isr.inl ppc_offs.h 13 13 noinst_HEADERS = $(ROOT_H_FILES) $(RTEMS_SCORE_H_FILES) 14 14 … … 55 55 UNUSED_FILES = irq_stub.S 56 56 57 EXTRA_DIST = TODO rtems.S $(C_FILES) $(S_FILES) $(UNUSED_FILES) 57 EXTRA_DIST = TODO rtems.S $(C_FILES) $(S_FILES) $(UNUSED_FILES) ppc_offs.h 58 58 59 59 include $(top_srcdir)/../../../../../automake/local.am -
c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu.h
r10c6e903 ra982e0c6 603 603 604 604 SCORE_EXTERN struct { 605 unsigned32 *Nest_level;606 unsigned32 *Disable_level;605 unsigned32 volatile* Nest_level; 606 unsigned32 volatile* Disable_level; 607 607 void *Vector_table; 608 608 void *Stack; -
c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu_asm.S
r10c6e903 ra982e0c6 34 34 35 35 #include <asm.h> 36 37 /* 38 * Offsets for various Contexts 39 */ 40 .set GP_1, 0 41 .set GP_2, (GP_1 + 4) 42 .set GP_13, (GP_2 + 4) 43 .set GP_14, (GP_13 + 4) 44 45 .set GP_15, (GP_14 + 4) 46 .set GP_16, (GP_15 + 4) 47 .set GP_17, (GP_16 + 4) 48 .set GP_18, (GP_17 + 4) 49 50 .set GP_19, (GP_18 + 4) 51 .set GP_20, (GP_19 + 4) 52 .set GP_21, (GP_20 + 4) 53 .set GP_22, (GP_21 + 4) 54 55 .set GP_23, (GP_22 + 4) 56 .set GP_24, (GP_23 + 4) 57 .set GP_25, (GP_24 + 4) 58 .set GP_26, (GP_25 + 4) 59 60 .set GP_27, (GP_26 + 4) 61 .set GP_28, (GP_27 + 4) 62 .set GP_29, (GP_28 + 4) 63 .set GP_30, (GP_29 + 4) 64 65 .set GP_31, (GP_30 + 4) 66 .set GP_CR, (GP_31 + 4) 67 .set GP_PC, (GP_CR + 4) 68 .set GP_MSR, (GP_PC + 4) 69 70 #if (PPC_HAS_DOUBLE == 1) 71 .set FP_0, 0 72 .set FP_1, (FP_0 + 8) 73 .set FP_2, (FP_1 + 8) 74 .set FP_3, (FP_2 + 8) 75 .set FP_4, (FP_3 + 8) 76 .set FP_5, (FP_4 + 8) 77 .set FP_6, (FP_5 + 8) 78 .set FP_7, (FP_6 + 8) 79 .set FP_8, (FP_7 + 8) 80 .set FP_9, (FP_8 + 8) 81 .set FP_10, (FP_9 + 8) 82 .set FP_11, (FP_10 + 8) 83 .set FP_12, (FP_11 + 8) 84 .set FP_13, (FP_12 + 8) 85 .set FP_14, (FP_13 + 8) 86 .set FP_15, (FP_14 + 8) 87 .set FP_16, (FP_15 + 8) 88 .set FP_17, (FP_16 + 8) 89 .set FP_18, (FP_17 + 8) 90 .set FP_19, (FP_18 + 8) 91 .set FP_20, (FP_19 + 8) 92 .set FP_21, (FP_20 + 8) 93 .set FP_22, (FP_21 + 8) 94 .set FP_23, (FP_22 + 8) 95 .set FP_24, (FP_23 + 8) 96 .set FP_25, (FP_24 + 8) 97 .set FP_26, (FP_25 + 8) 98 .set FP_27, (FP_26 + 8) 99 .set FP_28, (FP_27 + 8) 100 .set FP_29, (FP_28 + 8) 101 .set FP_30, (FP_29 + 8) 102 .set FP_31, (FP_30 + 8) 103 .set FP_FPSCR, (FP_31 + 8) 104 #else 105 .set FP_0, 0 106 .set FP_1, (FP_0 + 4) 107 .set FP_2, (FP_1 + 4) 108 .set FP_3, (FP_2 + 4) 109 .set FP_4, (FP_3 + 4) 110 .set FP_5, (FP_4 + 4) 111 .set FP_6, (FP_5 + 4) 112 .set FP_7, (FP_6 + 4) 113 .set FP_8, (FP_7 + 4) 114 .set FP_9, (FP_8 + 4) 115 .set FP_10, (FP_9 + 4) 116 .set FP_11, (FP_10 + 4) 117 .set FP_12, (FP_11 + 4) 118 .set FP_13, (FP_12 + 4) 119 .set FP_14, (FP_13 + 4) 120 .set FP_15, (FP_14 + 4) 121 .set FP_16, (FP_15 + 4) 122 .set FP_17, (FP_16 + 4) 123 .set FP_18, (FP_17 + 4) 124 .set FP_19, (FP_18 + 4) 125 .set FP_20, (FP_19 + 4) 126 .set FP_21, (FP_20 + 4) 127 .set FP_22, (FP_21 + 4) 128 .set FP_23, (FP_22 + 4) 129 .set FP_24, (FP_23 + 4) 130 .set FP_25, (FP_24 + 4) 131 .set FP_26, (FP_25 + 4) 132 .set FP_27, (FP_26 + 4) 133 .set FP_28, (FP_27 + 4) 134 .set FP_29, (FP_28 + 4) 135 .set FP_30, (FP_29 + 4) 136 .set FP_31, (FP_30 + 4) 137 .set FP_FPSCR, (FP_31 + 4) 138 #endif 139 140 .set IP_LINK, 0 141 #if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27) 142 .set IP_0, (IP_LINK + 56) 143 #else 144 .set IP_0, (IP_LINK + 8) 145 #endif 146 .set IP_2, (IP_0 + 4) 147 148 .set IP_3, (IP_2 + 4) 149 .set IP_4, (IP_3 + 4) 150 .set IP_5, (IP_4 + 4) 151 .set IP_6, (IP_5 + 4) 152 153 .set IP_7, (IP_6 + 4) 154 .set IP_8, (IP_7 + 4) 155 .set IP_9, (IP_8 + 4) 156 .set IP_10, (IP_9 + 4) 157 158 .set IP_11, (IP_10 + 4) 159 .set IP_12, (IP_11 + 4) 160 .set IP_13, (IP_12 + 4) 161 .set IP_28, (IP_13 + 4) 162 163 .set IP_29, (IP_28 + 4) 164 .set IP_30, (IP_29 + 4) 165 .set IP_31, (IP_30 + 4) 166 .set IP_CR, (IP_31 + 4) 167 168 .set IP_CTR, (IP_CR + 4) 169 .set IP_XER, (IP_CTR + 4) 170 .set IP_LR, (IP_XER + 4) 171 .set IP_PC, (IP_LR + 4) 172 173 .set IP_MSR, (IP_PC + 4) 174 .set IP_END, (IP_MSR + 16) 175 176 /* _CPU_IRQ_info offsets */ 177 178 /* These must be in this order */ 179 .set Nest_level, 0 180 .set Disable_level, 4 181 .set Vector_table, 8 182 .set Stack, 12 183 #if (PPC_ABI == PPC_ABI_POWEROPEN) 184 .set Dispatch_r2, 16 185 .set Switch_necessary, 20 186 #else 187 .set Default_r2, 16 188 #if (PPC_ABI != PPC_ABI_GCC27) 189 .set Default_r13, 20 190 .set Switch_necessary, 24 191 #else 192 .set Switch_necessary, 20 193 #endif 194 #endif 195 .set Signal, Switch_necessary + 4 196 .set msr_initial, Signal + 4 36 #include "ppc_offs.h" 197 37 198 38 BEGIN_CODE -
c/src/lib/libcpu/powerpc/ChangeLog
r10c6e903 ra982e0c6 1 2000-10-18 Sergei Organov <osv@javad.ru> 2 3 * Added full support for MPC505. 4 * mpc505/ictrl: New directory. 5 * configure.in, mpc505/Makefile.am: Modified to reflect ictrl addition. 6 * mpc505/ictrl/.cvsignore, mpc505/ictrl/Makefile.am, 7 mpc505/ictrl/ictrl.c, mpc505/ictrl/ictrl.h: New files. 8 * mpc505/timer/timer.c: Use <rtems.h>, not "rtems.h". 9 * mpc505/vectors/Makefile.am: alignment exception handler now included. 10 * mpc505/vectors/vectors.S: Now use constants for exception numbers. 11 * old_exception_processing/ppc_offs.h: New file. 12 * old_exception_processing/Makefile.am: Account for ppc_offs.h. 13 * old_exception_processing/cpu.h: Make Nest and Disable levels volatile. 14 * old_exception_processing/cpu_asm.S: Offsets moved to ppc_offs.h. 15 1 16 2000-10-18 Joel Sherrill <joel@OARcorp.com> 2 17 -
c/src/lib/libcpu/powerpc/configure.in
r10c6e903 ra982e0c6 54 54 mpc505/timer/Makefile 55 55 mpc505/vectors/Makefile 56 mpc505/ictrl/Makefile 56 57 mpc8xx/Makefile 57 58 mpc8xx/clock/Makefile -
c/src/lib/libcpu/powerpc/mpc505/Makefile.am
r10c6e903 ra982e0c6 5 5 AUTOMAKE_OPTIONS = foreign 1.4 6 6 7 SUBDIRS = vectors timer7 SUBDIRS = ictrl vectors timer 8 8 9 9 include $(top_srcdir)/../../../../../automake/subdirs.am -
c/src/lib/libcpu/powerpc/mpc505/timer/timer.c
r10c6e903 ra982e0c6 20 20 */ 21 21 22 #include "rtems.h"22 #include <rtems.h> 23 23 24 24 rtems_boolean Timer_driver_Find_average_overhead; -
c/src/lib/libcpu/powerpc/mpc505/vectors/Makefile.am
r10c6e903 ra982e0c6 5 5 AUTOMAKE_OPTIONS = foreign 1.4 6 6 7 VPATH = @srcdir@:@srcdir@/../../ppc403/vectors8 9 ## FIXME10 11 7 PGM = ${ARCH}/vectors.rel 12 8 13 9 ## Assembly sources 14 S_FILES = vectors.S align_h.S10 S_FILES = vectors.S 15 11 16 12 vectors_rel_OBJECTS = $(S_FILES:%.S=${ARCH}/%.o) -
c/src/lib/libcpu/powerpc/mpc505/vectors/vectors.S
r10c6e903 ra982e0c6 21 21 */ 22 22 23 #include "asm.h" 24 #include "ppc_offs.h" 23 #include <asm.h> 24 #include <rtems/score/ppc.h> 25 #include <rtems/score/ppc_offs.h> 25 26 26 27 /* Vector offsets */ 27 .set reset, 0x0100 # PPC_IRQ_ RESET28 .set reset, 0x0100 # PPC_IRQ_SYSTEM_RESET 28 29 .set machine_check, 0x0200 # PPC_IRQ_MCHECK 29 30 .set dsi, 0x0300 # PPC_IRQ_PROTECT 30 31 .set isi, 0x0400 # PPC_IRQ_ISI 31 32 .set external_interrupt, 0x0500 # PPC_IRQ_EXTERNAL 32 .set alignment, 0x0600 # PPC_IRQ_ALIGN 33 .set alignment, 0x0600 # PPC_IRQ_ALIGNMENT 33 34 .set program, 0x0700 # PPC_IRQ_PROGRAM 34 35 .set fp_unavailable, 0x0800 # PPC_IRQ_NOFP 35 .set decrementer, 0x0900 # PPC_IRQ_DEC 36 .set decrementer, 0x0900 # PPC_IRQ_DECREMENTER 36 37 .set system_call, 0x0C00 # PPC_IRQ_SCALL 37 38 .set trace, 0x0D00 # PPC_IRQ_TRACE 38 .set fp_assist, 0x0E00 # PPC_IRQ_FPASSIST39 .set fp_assist, 0x0E00 # PPC_IRQ_FP_ASST 39 40 .set software_emulation, 0x1000 # PPC_IRQ_SOFTEMU 40 41 .set data_bp, 0x1C00 # PPC_IRQ_DATA_BP … … 48 49 #define ABI_ADD 0 49 50 #endif 50 51 .extern led_green 51 52 #define ISR_HANDLER(vector, irq) \ 52 53 .org vector; \ … … 60 61 .globl __vect 61 62 __vect: 62 ISR_HANDLER(reset, PPC_IRQ_ RESET)63 ISR_HANDLER(reset, PPC_IRQ_SYSTEM_RESET) 63 64 ISR_HANDLER(machine_check, PPC_IRQ_MCHECK) 64 65 ISR_HANDLER(dsi, PPC_IRQ_PROTECT) 65 66 ISR_HANDLER(isi, PPC_IRQ_ISI) 66 67 ISR_HANDLER(external_interrupt, PPC_IRQ_EXTERNAL) 67 ISR_HANDLER(alignment, PPC_IRQ_ALIGN )68 ISR_HANDLER(alignment, PPC_IRQ_ALIGNMENT) 68 69 ISR_HANDLER(program, PPC_IRQ_PROGRAM) 69 70 ISR_HANDLER(fp_unavailable, PPC_IRQ_NOFP) 70 ISR_HANDLER(decrementer, PPC_IRQ_DEC )71 ISR_HANDLER(decrementer, PPC_IRQ_DECREMENTER) 71 72 ISR_HANDLER(system_call, PPC_IRQ_SCALL) 72 73 ISR_HANDLER(trace, PPC_IRQ_TRACE) 73 ISR_HANDLER(fp_assist, PPC_IRQ_FP ASSIST)74 ISR_HANDLER(fp_assist, PPC_IRQ_FP_ASST) 74 75 ISR_HANDLER(software_emulation, PPC_IRQ_SOFTEMU) 75 76 ISR_HANDLER(data_bp, PPC_IRQ_DATA_BP) -
c/src/lib/libcpu/powerpc/old-exceptions/cpu_asm.S
r10c6e903 ra982e0c6 34 34 35 35 #include <asm.h> 36 37 /* 38 * Offsets for various Contexts 39 */ 40 .set GP_1, 0 41 .set GP_2, (GP_1 + 4) 42 .set GP_13, (GP_2 + 4) 43 .set GP_14, (GP_13 + 4) 44 45 .set GP_15, (GP_14 + 4) 46 .set GP_16, (GP_15 + 4) 47 .set GP_17, (GP_16 + 4) 48 .set GP_18, (GP_17 + 4) 49 50 .set GP_19, (GP_18 + 4) 51 .set GP_20, (GP_19 + 4) 52 .set GP_21, (GP_20 + 4) 53 .set GP_22, (GP_21 + 4) 54 55 .set GP_23, (GP_22 + 4) 56 .set GP_24, (GP_23 + 4) 57 .set GP_25, (GP_24 + 4) 58 .set GP_26, (GP_25 + 4) 59 60 .set GP_27, (GP_26 + 4) 61 .set GP_28, (GP_27 + 4) 62 .set GP_29, (GP_28 + 4) 63 .set GP_30, (GP_29 + 4) 64 65 .set GP_31, (GP_30 + 4) 66 .set GP_CR, (GP_31 + 4) 67 .set GP_PC, (GP_CR + 4) 68 .set GP_MSR, (GP_PC + 4) 69 70 #if (PPC_HAS_DOUBLE == 1) 71 .set FP_0, 0 72 .set FP_1, (FP_0 + 8) 73 .set FP_2, (FP_1 + 8) 74 .set FP_3, (FP_2 + 8) 75 .set FP_4, (FP_3 + 8) 76 .set FP_5, (FP_4 + 8) 77 .set FP_6, (FP_5 + 8) 78 .set FP_7, (FP_6 + 8) 79 .set FP_8, (FP_7 + 8) 80 .set FP_9, (FP_8 + 8) 81 .set FP_10, (FP_9 + 8) 82 .set FP_11, (FP_10 + 8) 83 .set FP_12, (FP_11 + 8) 84 .set FP_13, (FP_12 + 8) 85 .set FP_14, (FP_13 + 8) 86 .set FP_15, (FP_14 + 8) 87 .set FP_16, (FP_15 + 8) 88 .set FP_17, (FP_16 + 8) 89 .set FP_18, (FP_17 + 8) 90 .set FP_19, (FP_18 + 8) 91 .set FP_20, (FP_19 + 8) 92 .set FP_21, (FP_20 + 8) 93 .set FP_22, (FP_21 + 8) 94 .set FP_23, (FP_22 + 8) 95 .set FP_24, (FP_23 + 8) 96 .set FP_25, (FP_24 + 8) 97 .set FP_26, (FP_25 + 8) 98 .set FP_27, (FP_26 + 8) 99 .set FP_28, (FP_27 + 8) 100 .set FP_29, (FP_28 + 8) 101 .set FP_30, (FP_29 + 8) 102 .set FP_31, (FP_30 + 8) 103 .set FP_FPSCR, (FP_31 + 8) 104 #else 105 .set FP_0, 0 106 .set FP_1, (FP_0 + 4) 107 .set FP_2, (FP_1 + 4) 108 .set FP_3, (FP_2 + 4) 109 .set FP_4, (FP_3 + 4) 110 .set FP_5, (FP_4 + 4) 111 .set FP_6, (FP_5 + 4) 112 .set FP_7, (FP_6 + 4) 113 .set FP_8, (FP_7 + 4) 114 .set FP_9, (FP_8 + 4) 115 .set FP_10, (FP_9 + 4) 116 .set FP_11, (FP_10 + 4) 117 .set FP_12, (FP_11 + 4) 118 .set FP_13, (FP_12 + 4) 119 .set FP_14, (FP_13 + 4) 120 .set FP_15, (FP_14 + 4) 121 .set FP_16, (FP_15 + 4) 122 .set FP_17, (FP_16 + 4) 123 .set FP_18, (FP_17 + 4) 124 .set FP_19, (FP_18 + 4) 125 .set FP_20, (FP_19 + 4) 126 .set FP_21, (FP_20 + 4) 127 .set FP_22, (FP_21 + 4) 128 .set FP_23, (FP_22 + 4) 129 .set FP_24, (FP_23 + 4) 130 .set FP_25, (FP_24 + 4) 131 .set FP_26, (FP_25 + 4) 132 .set FP_27, (FP_26 + 4) 133 .set FP_28, (FP_27 + 4) 134 .set FP_29, (FP_28 + 4) 135 .set FP_30, (FP_29 + 4) 136 .set FP_31, (FP_30 + 4) 137 .set FP_FPSCR, (FP_31 + 4) 138 #endif 139 140 .set IP_LINK, 0 141 #if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27) 142 .set IP_0, (IP_LINK + 56) 143 #else 144 .set IP_0, (IP_LINK + 8) 145 #endif 146 .set IP_2, (IP_0 + 4) 147 148 .set IP_3, (IP_2 + 4) 149 .set IP_4, (IP_3 + 4) 150 .set IP_5, (IP_4 + 4) 151 .set IP_6, (IP_5 + 4) 152 153 .set IP_7, (IP_6 + 4) 154 .set IP_8, (IP_7 + 4) 155 .set IP_9, (IP_8 + 4) 156 .set IP_10, (IP_9 + 4) 157 158 .set IP_11, (IP_10 + 4) 159 .set IP_12, (IP_11 + 4) 160 .set IP_13, (IP_12 + 4) 161 .set IP_28, (IP_13 + 4) 162 163 .set IP_29, (IP_28 + 4) 164 .set IP_30, (IP_29 + 4) 165 .set IP_31, (IP_30 + 4) 166 .set IP_CR, (IP_31 + 4) 167 168 .set IP_CTR, (IP_CR + 4) 169 .set IP_XER, (IP_CTR + 4) 170 .set IP_LR, (IP_XER + 4) 171 .set IP_PC, (IP_LR + 4) 172 173 .set IP_MSR, (IP_PC + 4) 174 .set IP_END, (IP_MSR + 16) 175 176 /* _CPU_IRQ_info offsets */ 177 178 /* These must be in this order */ 179 .set Nest_level, 0 180 .set Disable_level, 4 181 .set Vector_table, 8 182 .set Stack, 12 183 #if (PPC_ABI == PPC_ABI_POWEROPEN) 184 .set Dispatch_r2, 16 185 .set Switch_necessary, 20 186 #else 187 .set Default_r2, 16 188 #if (PPC_ABI != PPC_ABI_GCC27) 189 .set Default_r13, 20 190 .set Switch_necessary, 24 191 #else 192 .set Switch_necessary, 20 193 #endif 194 #endif 195 .set Signal, Switch_necessary + 4 196 .set msr_initial, Signal + 4 36 #include "ppc_offs.h" 197 37 198 38 BEGIN_CODE -
c/src/lib/libcpu/powerpc/old_exception_processing/Makefile.am
r10c6e903 ra982e0c6 10 10 11 11 ROOT_H_FILES = 12 RTEMS_SCORE_H_FILES = cpu.h c_isr.inl 12 RTEMS_SCORE_H_FILES = cpu.h c_isr.inl ppc_offs.h 13 13 noinst_HEADERS = $(ROOT_H_FILES) $(RTEMS_SCORE_H_FILES) 14 14 … … 55 55 UNUSED_FILES = irq_stub.S 56 56 57 EXTRA_DIST = TODO rtems.S $(C_FILES) $(S_FILES) $(UNUSED_FILES) 57 EXTRA_DIST = TODO rtems.S $(C_FILES) $(S_FILES) $(UNUSED_FILES) ppc_offs.h 58 58 59 59 include $(top_srcdir)/../../../../../automake/local.am -
c/src/lib/libcpu/powerpc/old_exception_processing/cpu.h
r10c6e903 ra982e0c6 603 603 604 604 SCORE_EXTERN struct { 605 unsigned32 *Nest_level;606 unsigned32 *Disable_level;605 unsigned32 volatile* Nest_level; 606 unsigned32 volatile* Disable_level; 607 607 void *Vector_table; 608 608 void *Stack; -
c/src/lib/libcpu/powerpc/old_exception_processing/cpu_asm.S
r10c6e903 ra982e0c6 34 34 35 35 #include <asm.h> 36 37 /* 38 * Offsets for various Contexts 39 */ 40 .set GP_1, 0 41 .set GP_2, (GP_1 + 4) 42 .set GP_13, (GP_2 + 4) 43 .set GP_14, (GP_13 + 4) 44 45 .set GP_15, (GP_14 + 4) 46 .set GP_16, (GP_15 + 4) 47 .set GP_17, (GP_16 + 4) 48 .set GP_18, (GP_17 + 4) 49 50 .set GP_19, (GP_18 + 4) 51 .set GP_20, (GP_19 + 4) 52 .set GP_21, (GP_20 + 4) 53 .set GP_22, (GP_21 + 4) 54 55 .set GP_23, (GP_22 + 4) 56 .set GP_24, (GP_23 + 4) 57 .set GP_25, (GP_24 + 4) 58 .set GP_26, (GP_25 + 4) 59 60 .set GP_27, (GP_26 + 4) 61 .set GP_28, (GP_27 + 4) 62 .set GP_29, (GP_28 + 4) 63 .set GP_30, (GP_29 + 4) 64 65 .set GP_31, (GP_30 + 4) 66 .set GP_CR, (GP_31 + 4) 67 .set GP_PC, (GP_CR + 4) 68 .set GP_MSR, (GP_PC + 4) 69 70 #if (PPC_HAS_DOUBLE == 1) 71 .set FP_0, 0 72 .set FP_1, (FP_0 + 8) 73 .set FP_2, (FP_1 + 8) 74 .set FP_3, (FP_2 + 8) 75 .set FP_4, (FP_3 + 8) 76 .set FP_5, (FP_4 + 8) 77 .set FP_6, (FP_5 + 8) 78 .set FP_7, (FP_6 + 8) 79 .set FP_8, (FP_7 + 8) 80 .set FP_9, (FP_8 + 8) 81 .set FP_10, (FP_9 + 8) 82 .set FP_11, (FP_10 + 8) 83 .set FP_12, (FP_11 + 8) 84 .set FP_13, (FP_12 + 8) 85 .set FP_14, (FP_13 + 8) 86 .set FP_15, (FP_14 + 8) 87 .set FP_16, (FP_15 + 8) 88 .set FP_17, (FP_16 + 8) 89 .set FP_18, (FP_17 + 8) 90 .set FP_19, (FP_18 + 8) 91 .set FP_20, (FP_19 + 8) 92 .set FP_21, (FP_20 + 8) 93 .set FP_22, (FP_21 + 8) 94 .set FP_23, (FP_22 + 8) 95 .set FP_24, (FP_23 + 8) 96 .set FP_25, (FP_24 + 8) 97 .set FP_26, (FP_25 + 8) 98 .set FP_27, (FP_26 + 8) 99 .set FP_28, (FP_27 + 8) 100 .set FP_29, (FP_28 + 8) 101 .set FP_30, (FP_29 + 8) 102 .set FP_31, (FP_30 + 8) 103 .set FP_FPSCR, (FP_31 + 8) 104 #else 105 .set FP_0, 0 106 .set FP_1, (FP_0 + 4) 107 .set FP_2, (FP_1 + 4) 108 .set FP_3, (FP_2 + 4) 109 .set FP_4, (FP_3 + 4) 110 .set FP_5, (FP_4 + 4) 111 .set FP_6, (FP_5 + 4) 112 .set FP_7, (FP_6 + 4) 113 .set FP_8, (FP_7 + 4) 114 .set FP_9, (FP_8 + 4) 115 .set FP_10, (FP_9 + 4) 116 .set FP_11, (FP_10 + 4) 117 .set FP_12, (FP_11 + 4) 118 .set FP_13, (FP_12 + 4) 119 .set FP_14, (FP_13 + 4) 120 .set FP_15, (FP_14 + 4) 121 .set FP_16, (FP_15 + 4) 122 .set FP_17, (FP_16 + 4) 123 .set FP_18, (FP_17 + 4) 124 .set FP_19, (FP_18 + 4) 125 .set FP_20, (FP_19 + 4) 126 .set FP_21, (FP_20 + 4) 127 .set FP_22, (FP_21 + 4) 128 .set FP_23, (FP_22 + 4) 129 .set FP_24, (FP_23 + 4) 130 .set FP_25, (FP_24 + 4) 131 .set FP_26, (FP_25 + 4) 132 .set FP_27, (FP_26 + 4) 133 .set FP_28, (FP_27 + 4) 134 .set FP_29, (FP_28 + 4) 135 .set FP_30, (FP_29 + 4) 136 .set FP_31, (FP_30 + 4) 137 .set FP_FPSCR, (FP_31 + 4) 138 #endif 139 140 .set IP_LINK, 0 141 #if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27) 142 .set IP_0, (IP_LINK + 56) 143 #else 144 .set IP_0, (IP_LINK + 8) 145 #endif 146 .set IP_2, (IP_0 + 4) 147 148 .set IP_3, (IP_2 + 4) 149 .set IP_4, (IP_3 + 4) 150 .set IP_5, (IP_4 + 4) 151 .set IP_6, (IP_5 + 4) 152 153 .set IP_7, (IP_6 + 4) 154 .set IP_8, (IP_7 + 4) 155 .set IP_9, (IP_8 + 4) 156 .set IP_10, (IP_9 + 4) 157 158 .set IP_11, (IP_10 + 4) 159 .set IP_12, (IP_11 + 4) 160 .set IP_13, (IP_12 + 4) 161 .set IP_28, (IP_13 + 4) 162 163 .set IP_29, (IP_28 + 4) 164 .set IP_30, (IP_29 + 4) 165 .set IP_31, (IP_30 + 4) 166 .set IP_CR, (IP_31 + 4) 167 168 .set IP_CTR, (IP_CR + 4) 169 .set IP_XER, (IP_CTR + 4) 170 .set IP_LR, (IP_XER + 4) 171 .set IP_PC, (IP_LR + 4) 172 173 .set IP_MSR, (IP_PC + 4) 174 .set IP_END, (IP_MSR + 16) 175 176 /* _CPU_IRQ_info offsets */ 177 178 /* These must be in this order */ 179 .set Nest_level, 0 180 .set Disable_level, 4 181 .set Vector_table, 8 182 .set Stack, 12 183 #if (PPC_ABI == PPC_ABI_POWEROPEN) 184 .set Dispatch_r2, 16 185 .set Switch_necessary, 20 186 #else 187 .set Default_r2, 16 188 #if (PPC_ABI != PPC_ABI_GCC27) 189 .set Default_r13, 20 190 .set Switch_necessary, 24 191 #else 192 .set Switch_necessary, 20 193 #endif 194 #endif 195 .set Signal, Switch_necessary + 4 196 .set msr_initial, Signal + 4 36 #include "ppc_offs.h" 197 37 198 38 BEGIN_CODE
Note: See TracChangeset
for help on using the changeset viewer.
