Changeset a902441a in rtems for c/src/lib/libbsp/m68k/efi332


Ignore:
Timestamp:
Mar 16, 1999, 2:26:50 AM (22 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
1c0a186b
Parents:
6d0e13c
Message:

Patch from John S. Gwynne <jgwynne@…> to correct minor
problems that prevented the 19990302 snapshot from running on
the efi332.

I'm happy to report that rtems-19990302 is running on the efi332
board. I have enclosed a few minor patches below to the efi332 bsp. All
patches are within that library but one. make/custom/efi332.cfg has a
patch to select the right CPU_CFLAGS (at one time -m68332 was a
problem... -mcpu32 or -m68332 work fine now).

Location:
c/src/lib/libbsp/m68k/efi332
Files:
7 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/m68k/efi332/console/console.c

    r6d0e13c ra902441a  
    329329  char *buffer;
    330330  int maximum;
    331   int count = 0;
     331  int count;
    332332 
    333333  rw_args = (rtems_libio_rw_args_t *) arg;
  • c/src/lib/libbsp/m68k/efi332/include/efi332.h

    r6d0e13c ra902441a  
    4444/*
    4545 *  This prototype really should have the noreturn attribute but
    46  *  that causes a warning since it appears that the routine does
    47  *  return.
    48  *
    49  *   void reboot(void) __attribute__ ((noreturn));
     46 *  that causes a warning. Not sure how to fix that.
    5047 */
    51 
    52 void reboot(void);
     48/*   static void reboot(void) __attribute__ ((noreturn)); */
     49static void reboot(void);
     50__inline__ static void reboot() {asm("trap #15");}
    5351
    5452#endif /* _EFI332_H_ */
  • c/src/lib/libbsp/m68k/efi332/start/start.c

    r6d0e13c ra902441a  
    1111m68k_isr_entry vectors[256];
    1212char * const __argv[]= {"main", ""};
    13 char * const __env[]= {""};
     13
     14void  boot_card(int argc, char * const argv[]);
    1415
    1516/*
    1617 *  This prototype really should have the noreturn attribute but
    17  *  that causes a warning since it appears that the routine does
    18  *  return.
    19  *
    20  *   void dumby_start ()  __attribute__ ((noreturn));
     18 *  that causes a warning. Not sure how to fix that.
    2119 */
    22 
     20/* void dumby_start ()  __attribute__ ((noreturn)); */
    2321void dumby_start ();
     22
    2423void  dumby_start() {
    25 void  boot_card();
    2624
    2725  /* We need to by-pass the link instruction since the RAM chip-
     
    3735                  addl   " STACK_SIZE ",%d0;
    3836                  movel  %d0,%sp;
    39                   link %a6, #0"
     37                  movel  %d0,%a6"
    4038                  );
    4139
     
    9290    (((0x080000 >> 8)&0xfff8) | BS_256K ); /* 256k bytes located at 0x80000 */
    9391  *CSBAR2 = (unsigned short int)
    94     (((0x080000 >> 8)&0xfff8) | BS_256K ); /* 256 bytes located at 0x80000 */
     92    (((0x080000 >> 8)&0xfff8) | BS_256K ); /* 256k bytes located at 0x80000 */
    9593  *CSBAR3 = (unsigned short int)         
     94    (((0x0C0000 >> 8)&0xfff8) | BS_256K ); /* 256k bytes located at 0xC0000 */
     95  *CSBAR4 = (unsigned short int)
     96    (((0x0C0000 >> 8)&0xfff8) | BS_256K ); /* 256 bytes located at 0xC0000 */
     97  *CSBAR5 = (unsigned short int)         
    9698    (0xfff8 | BS_64K);                   /* AVEC interrupts */
     99#ifdef EFI332_v040b
     100  *CSBAR6 = (unsigned short int)
     101    (((0x000000 >> 8)&0xfff8) | BS_512K ); /* 512k bytes located at 0x0000 */
     102  *CSBAR8 = (unsigned short int) /* PCMCIA IOCS */
     103    (((0x0c0000 >> 8)&0xfff8) | BS_64K ); /* 64k bytes located at 0xc0000 */
     104  *CSBAR9 = (unsigned short int) /* PCMCIA MEMCS */
     105    (((0x0D0000 >> 8)&0xfff8) | BS_64K ); /* 64k bytes located at 0xd0000 */
     106#else /* EFI332_v040b */
    97107  *CSBAR10 = (unsigned short int)
    98108    (((0x000000 >> 8)&0xfff8) | BS_512K ); /* 512k bytes located at 0x0000 */
     109#endif /* EFI332_v040b */
    99110
    100111  /* Chip-Select Options Registers */
    101112  /*    see section 7 of the SIM Reference Manual */
     113#ifdef FLASHWRITE
    102114  *CSORBT = (unsigned short int)
    103     ( BothBytes | ReadWrite | SyncAS | WaitStates_13 | UserSupSpace );
     115    ( BothBytes | ReadWrite | SyncAS | WaitStates_2 | UserSupSpace );
     116#else /* FLASHWRITE */
     117  *CSORBT = (unsigned short int)
     118    ( BothBytes | ReadOnly | SyncAS | WaitStates_2 | UserSupSpace );
     119#endif /* FLASHWRITE */
    104120  *CSOR0 = (unsigned short int)
    105121    ( BothBytes | ReadOnly | SyncAS | External | UserSupSpace );
     
    109125    ( UpperByte | ReadWrite | SyncAS | FastTerm | UserSupSpace );
    110126  *CSOR3 = (unsigned short int)
     127    ( LowerByte | ReadWrite | SyncAS | FastTerm | UserSupSpace );
     128  *CSOR4 = (unsigned short int)
     129    ( UpperByte | ReadWrite | SyncAS | FastTerm | UserSupSpace );
     130  *CSOR5 = (unsigned short int)
    111131    ( BothBytes | ReadWrite | SyncAS | CPUSpace | IPLevel_any | AVEC );
     132#ifdef EFI332_v040b
     133  *CSOR6 = (unsigned short int)
     134    ( BothBytes | ReadOnly | SyncAS | External | UserSupSpace );
     135  *CSOR8 = (unsigned short int)
     136    ( BothBytes | ReadWrite | SyncAS | External | UserSupSpace );
     137  *CSOR9 = (unsigned short int)
     138    ( BothBytes | ReadWrite | SyncAS | External | UserSupSpace );
     139#else /* EFI332_v040b */
    112140  *CSOR10 = (unsigned short int)
    113141    ( BothBytes | ReadOnly | SyncAS | External | UserSupSpace );
     142#endif /* EFI332_v040b */
    114143
    115144  /* Chip Select Pin Assignment Register 0 */
    116145  /*    see section 7 of the SIM Reference Manual */
    117146  *CSPAR0 = (unsigned short int)(
    118      SAM(DisOut,CS_5,0x3000) |  /* PC2 */
    119      SAM(DisOut,CS_4,0x0c00) |  /* PC1 */
    120      SAM(DisOut,CS_3,0x0300) |  /* AVEC (internally) */
    121      SAM(CS16bit,CS_2,0x00c0)|  /* RAM UDS */
    122      SAM(CS16bit,CS_1,0x0030)|  /* RAM LDS */
     147     SAM(DisOut,CS_5,0x3000) |  /* AVEC (internally) */
     148     SAM(CS16bit,CS_4,0x0c00) | /* RAM UDS, bank2 */
     149     SAM(CS16bit,CS_3,0x0300) | /* RAM LDS, bank2 */
     150     SAM(CS16bit,CS_2,0x00c0)|  /* RAM UDS, bank1 */
     151     SAM(CS16bit,CS_1,0x0030)|  /* RAM LDS, bank1 */
    123152     SAM(CS16bit,CS_0,0x000c)|  /* W/!R */
    124      SAM(CS16bit,CSBOOT,0x0003) /* ROM DS */
     153     SAM(CS16bit,CSBOOT,0x0003) /* ROM CS */
    125154     );
    126155
    127156  /* Chip Select Pin Assignment Register 1 */
    128157  /*    see section 7 of the SIM Reference Manual */
     158#ifdef EFI332_v040b
    129159  *CSPAR1 = (unsigned short int)(
    130      SAM(CS16bit,CS_10,0x300)|  /* ECLK */
     160     SAM(DisOut,CS_10,0x300)|   /* ECLK */
     161     SAM(CS16bit,CS_9,0x0c0) |  /* PCMCIA MEMCS */
     162     SAM(CS16bit,CS_8,0x030) |  /* PCMCIA IOCS */
     163     SAM(DisOut,CS_7,0x00c) |   /* PC4 */
     164     SAM(CS16bit,CS_6,0x003)    /* ROM !OE */
     165     );
     166#else /* EFI332_v040b */
     167  *CSPAR1 = (unsigned short int)(
     168     SAM(CS16bit,CS_10,0x300)|  /* ROM !OE */
    131169     SAM(DisOut,CS_9,0x0c0) |   /* PC6 */
    132170     SAM(DisOut,CS_8,0x030) |   /* PC5 */
     
    134172     SAM(DisOut,CS_6,0x003)     /* PC3 */
    135173     );
     174#endif /* EFI332_v040b */
    136175
    137176  /* Port E and F Data Register */
     
    180219
    181220  /*
    182    * Execute main with arguments argv and environment env
    183    */
    184   /* main(1, __argv, __env); */
    185 
    186   boot_card();
    187 
     221   * Execute main with arguments argc and agrv.
     222   */
     223  boot_card(1,__argv);
    188224  reboot();
     225
    189226}
    190227
    191 void reboot() {asm("trap #15");}
    192 
  • c/src/lib/libbsp/m68k/efi332/start332/start332.c

    r6d0e13c ra902441a  
    1111m68k_isr_entry vectors[256];
    1212char * const __argv[]= {"main", ""};
    13 char * const __env[]= {""};
     13
     14void  boot_card(int argc, char * const argv[]);
    1415
    1516/*
    1617 *  This prototype really should have the noreturn attribute but
    17  *  that causes a warning since it appears that the routine does
    18  *  return.
    19  *
    20  *   void dumby_start ()  __attribute__ ((noreturn));
     18 *  that causes a warning. Not sure how to fix that.
    2119 */
    22 
     20/* void dumby_start ()  __attribute__ ((noreturn)); */
    2321void dumby_start ();
     22
    2423void  dumby_start() {
    25 void  boot_card();
    2624
    2725  /* We need to by-pass the link instruction since the RAM chip-
     
    3735                  addl   " STACK_SIZE ",%d0;
    3836                  movel  %d0,%sp;
    39                   link %a6, #0"
     37                  movel  %d0,%a6"
    4038                  );
    4139
     
    9290    (((0x080000 >> 8)&0xfff8) | BS_256K ); /* 256k bytes located at 0x80000 */
    9391  *CSBAR2 = (unsigned short int)
    94     (((0x080000 >> 8)&0xfff8) | BS_256K ); /* 256 bytes located at 0x80000 */
     92    (((0x080000 >> 8)&0xfff8) | BS_256K ); /* 256k bytes located at 0x80000 */
    9593  *CSBAR3 = (unsigned short int)         
     94    (((0x0C0000 >> 8)&0xfff8) | BS_256K ); /* 256k bytes located at 0xC0000 */
     95  *CSBAR4 = (unsigned short int)
     96    (((0x0C0000 >> 8)&0xfff8) | BS_256K ); /* 256 bytes located at 0xC0000 */
     97  *CSBAR5 = (unsigned short int)         
    9698    (0xfff8 | BS_64K);                   /* AVEC interrupts */
     99#ifdef EFI332_v040b
     100  *CSBAR6 = (unsigned short int)
     101    (((0x000000 >> 8)&0xfff8) | BS_512K ); /* 512k bytes located at 0x0000 */
     102  *CSBAR8 = (unsigned short int) /* PCMCIA IOCS */
     103    (((0x0c0000 >> 8)&0xfff8) | BS_64K ); /* 64k bytes located at 0xc0000 */
     104  *CSBAR9 = (unsigned short int) /* PCMCIA MEMCS */
     105    (((0x0D0000 >> 8)&0xfff8) | BS_64K ); /* 64k bytes located at 0xd0000 */
     106#else /* EFI332_v040b */
    97107  *CSBAR10 = (unsigned short int)
    98108    (((0x000000 >> 8)&0xfff8) | BS_512K ); /* 512k bytes located at 0x0000 */
     109#endif /* EFI332_v040b */
    99110
    100111  /* Chip-Select Options Registers */
    101112  /*    see section 7 of the SIM Reference Manual */
     113#ifdef FLASHWRITE
    102114  *CSORBT = (unsigned short int)
    103     ( BothBytes | ReadWrite | SyncAS | WaitStates_13 | UserSupSpace );
     115    ( BothBytes | ReadWrite | SyncAS | WaitStates_2 | UserSupSpace );
     116#else /* FLASHWRITE */
     117  *CSORBT = (unsigned short int)
     118    ( BothBytes | ReadOnly | SyncAS | WaitStates_2 | UserSupSpace );
     119#endif /* FLASHWRITE */
    104120  *CSOR0 = (unsigned short int)
    105121    ( BothBytes | ReadOnly | SyncAS | External | UserSupSpace );
     
    109125    ( UpperByte | ReadWrite | SyncAS | FastTerm | UserSupSpace );
    110126  *CSOR3 = (unsigned short int)
     127    ( LowerByte | ReadWrite | SyncAS | FastTerm | UserSupSpace );
     128  *CSOR4 = (unsigned short int)
     129    ( UpperByte | ReadWrite | SyncAS | FastTerm | UserSupSpace );
     130  *CSOR5 = (unsigned short int)
    111131    ( BothBytes | ReadWrite | SyncAS | CPUSpace | IPLevel_any | AVEC );
     132#ifdef EFI332_v040b
     133  *CSOR6 = (unsigned short int)
     134    ( BothBytes | ReadOnly | SyncAS | External | UserSupSpace );
     135  *CSOR8 = (unsigned short int)
     136    ( BothBytes | ReadWrite | SyncAS | External | UserSupSpace );
     137  *CSOR9 = (unsigned short int)
     138    ( BothBytes | ReadWrite | SyncAS | External | UserSupSpace );
     139#else /* EFI332_v040b */
    112140  *CSOR10 = (unsigned short int)
    113141    ( BothBytes | ReadOnly | SyncAS | External | UserSupSpace );
     142#endif /* EFI332_v040b */
    114143
    115144  /* Chip Select Pin Assignment Register 0 */
    116145  /*    see section 7 of the SIM Reference Manual */
    117146  *CSPAR0 = (unsigned short int)(
    118      SAM(DisOut,CS_5,0x3000) |  /* PC2 */
    119      SAM(DisOut,CS_4,0x0c00) |  /* PC1 */
    120      SAM(DisOut,CS_3,0x0300) |  /* AVEC (internally) */
    121      SAM(CS16bit,CS_2,0x00c0)|  /* RAM UDS */
    122      SAM(CS16bit,CS_1,0x0030)|  /* RAM LDS */
     147     SAM(DisOut,CS_5,0x3000) |  /* AVEC (internally) */
     148     SAM(CS16bit,CS_4,0x0c00) | /* RAM UDS, bank2 */
     149     SAM(CS16bit,CS_3,0x0300) | /* RAM LDS, bank2 */
     150     SAM(CS16bit,CS_2,0x00c0)|  /* RAM UDS, bank1 */
     151     SAM(CS16bit,CS_1,0x0030)|  /* RAM LDS, bank1 */
    123152     SAM(CS16bit,CS_0,0x000c)|  /* W/!R */
    124      SAM(CS16bit,CSBOOT,0x0003) /* ROM DS */
     153     SAM(CS16bit,CSBOOT,0x0003) /* ROM CS */
    125154     );
    126155
    127156  /* Chip Select Pin Assignment Register 1 */
    128157  /*    see section 7 of the SIM Reference Manual */
     158#ifdef EFI332_v040b
    129159  *CSPAR1 = (unsigned short int)(
    130      SAM(CS16bit,CS_10,0x300)|  /* ECLK */
     160     SAM(DisOut,CS_10,0x300)|   /* ECLK */
     161     SAM(CS16bit,CS_9,0x0c0) |  /* PCMCIA MEMCS */
     162     SAM(CS16bit,CS_8,0x030) |  /* PCMCIA IOCS */
     163     SAM(DisOut,CS_7,0x00c) |   /* PC4 */
     164     SAM(CS16bit,CS_6,0x003)    /* ROM !OE */
     165     );
     166#else /* EFI332_v040b */
     167  *CSPAR1 = (unsigned short int)(
     168     SAM(CS16bit,CS_10,0x300)|  /* ROM !OE */
    131169     SAM(DisOut,CS_9,0x0c0) |   /* PC6 */
    132170     SAM(DisOut,CS_8,0x030) |   /* PC5 */
     
    134172     SAM(DisOut,CS_6,0x003)     /* PC3 */
    135173     );
     174#endif /* EFI332_v040b */
    136175
    137176  /* Port E and F Data Register */
     
    180219
    181220  /*
    182    * Execute main with arguments argv and environment env
    183    */
    184   /* main(1, __argv, __env); */
    185 
    186   boot_card();
    187 
     221   * Execute main with arguments argc and agrv.
     222   */
     223  boot_card(1,__argv);
    188224  reboot();
     225
    189226}
    190227
    191 void reboot() {asm("trap #15");}
    192 
  • c/src/lib/libbsp/m68k/efi332/startup/Makefile.in

    r6d0e13c ra902441a  
    2020H_FILES=
    2121
    22 SRCS=$(C_FILES) $(H_FILES)
    23 OBJS=$(C_O_FILES)
     22# Assembly source names, if any, go here -- minus the .S
     23S_PIECES= except_vect_332_ROM
     24S_FILES=$(S_PIECES:%=%.S)
     25S_O_FILES=$(S_FILES:%.S=${ARCH}/%.o)
     26
     27SRCS=$(C_FILES) $(H_FILES) $(S_FILES)
     28OBJS=$(C_O_FILES) $(S_O_FILES)
    2429
    2530include $(RTEMS_ROOT)/make/custom/$(RTEMS_BSP).cfg
     
    5358all:    ${ARCH} $(SRCS) $(PGM)
    5459        $(INSTALL_CHANGE) $(srcdir)/linkcmds ${PROJECT_RELEASE}/lib
     60        $(INSTALL_CHANGE) $(srcdir)/linkcmds_ROM ${PROJECT_RELEASE}/lib
     61        $(INSTALL_CHANGE) ${ARCH}/except_vect_332_ROM.o ${PROJECT_RELEASE}/lib
    5562
    5663# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
  • c/src/lib/libbsp/m68k/efi332/startup/linkcmds

    r6d0e13c ra902441a  
    3333MEMORY
    3434{
    35   ram     : ORIGIN = 0x80000, LENGTH = 256K
     35  ram     : ORIGIN = 0x80000, LENGTH = 512K
    3636}
    3737
    38 __end_of_ram = 0xc0000;
     38__end_of_ram = 0x100000;
    3939_copy_data_from_rom = 0;
    4040
     
    4949    text_start = .;
    5050    _text_start = .;
     51
    5152    *(.text)
    5253    . = ALIGN (16);
     54
    5355    *(.eh_fram)
    5456    . = ALIGN (16);
     
    6971    *(.shdata)
    7072    _endtext = .;
     73  } > ram
     74  .gcc_exc :
     75  {
     76    *(.gcc_exc)
    7177  } > ram
    7278  .data :
  • c/src/lib/libbsp/m68k/efi332/startup/linkcmds_ROM

    r6d0e13c ra902441a  
    4141{
    4242  rom     : ORIGIN = 0x00000, LENGTH = 256K
    43   ram     : ORIGIN = 0x80000, LENGTH = 256K
     43  ram     : ORIGIN = 0x80000, LENGTH = 512K
    4444}
    4545
    46 __end_of_ram = 0xc0000;
     46__end_of_ram = 0x100000;
    4747_copy_data_from_rom = 1;
    4848
     
    5858    _text_start = .;
    5959    *(.text)
     60    . = ALIGN (16);
     61
     62    *(.eh_fram)
     63    . = ALIGN (16);
     64
    6065    etext = ALIGN(0x10);
    6166    _etext = .;
     
    7479    _endtext = .;
    7580  } > rom
     81  .gcc_exc :
     82  AT ( ADDR(.text) + SIZEOF( .text ) )
     83  {
     84    *(.gcc_exc)
     85  } > ram
    7686  .data :
    77   AT ( ADDR(.text) + SIZEOF( .text ) )
    7887  {
    7988    data_start = .;
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