Changeset a86f3aac in rtems


Ignore:
Timestamp:
Jul 11, 2008, 10:01:37 AM (11 years ago)
Author:
Thomas Doerfler <Thomas.Doerfler@…>
Branches:
4.10, 4.11, 4.9, master
Children:
25a92bc1
Parents:
69effbb4
Message:

adapted powerpc BSPs to new exception code

Location:
c/src/lib/libbsp
Files:
14 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/ChangeLog

    r69effbb4 ra86f3aac  
    1 2008-07-09      Sebastian Huber <sebastian.huber@embedded-brains.de>
    2 
    3         * shared/include/irq-config.h, shared/include/irq-generic.h,
    4         shared/src/irq-generic.c, shared/src/irq-legacy.c: Generic BSP
    5         interrupt handler support.
    6 
    712008-01-16      Ralf Corsepius <ralf.corsepius@rtems.org>
    82
  • c/src/lib/libbsp/powerpc/ChangeLog

    r69effbb4 ra86f3aac  
     12008-07-11      Sebastian Huber <sebastian.huber@embedded-brains.de>
     2
     3        * ep1a/startup/bspstart.c, mvme3100/startup/bspstart.c,
     4        mvme5500/startup/bspstart.c, psim/startup/bspstart.c,
     5        shared/startup/bspstart.c: The usage of SPRG0 as changed.  It is now
     6        used to store the interrupt disable mask.  See bootcard.c and
     7        ppc_exc_initialize() for default initialization.
     8
     9        Update to new exception initialization routine ppc_exc_initialize().
     10        The exception low level code has changed, see libcpu/powerpc/ChangeLog.
     11
     12        * gen5200/startup/bspstart.c, mbx8xx/startup/bspstart.c,
     13        mpc8260ads/startup/bspstart.c, ss555/startup/bspstart.c,
     14        virtex/startup/bspstart.c: The usage of SPRG0 as changed.  It is now
     15        used to store the interrupt disable mask.  See bootcard.c for default
     16        initialization.
     17
    1182008-07-10      Till Straumann <strauman@slac.stanford.edu>
    219
  • c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c

    r69effbb4 ra86f3aac  
    1414 *  $Id$
    1515 */
     16
     17#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
    1618
    1719#include <string.h>
     
    4648uint32_t bsp_clicks_per_usec;
    4749
    48 SPR_RW(SPRG0)
    4950SPR_RW(SPRG1)
    5051
     
    328329{
    329330  unsigned char *stack;
    330   register uint32_t  intrStack;
    331   register uint32_t *intrStackPtr;
     331  uint32_t intrStackStart;
     332  uint32_t intrStackSize;
    332333  unsigned char *work_space_start;
    333334  ppc_cpu_id_t myCpu;
     
    374375
    375376  /*
    376    * Initialize the interrupt related settings
    377    * SPRG1 = software managed IRQ stack
    378    *
    379    * This could be done latter (e.g in IRQ_INIT) but it helps to understand
    380    * some settings below...
    381    */
    382   intrStack = ((uint32_t) __rtems_end) +
    383     INIT_STACK_SIZE + rtems_configuration_get_interrupt_stack_size() -
    384     PPC_MINIMUM_STACK_FRAME_SIZE;
    385 
    386   /* make sure it's properly aligned */
    387   intrStack &= ~(CPU_STACK_ALIGNMENT-1);
    388 
    389   /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
    390   intrStackPtr = (uint32_t*) intrStack;
    391   *intrStackPtr = 0;
    392 
    393   _write_SPRG1((unsigned int)intrStack);
    394 
    395   /* signal them that we have fixed PR288 - eventually, this should go away */
    396   _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
    397 
    398   /*
    399    * Initialize default raw exception hanlders. See vectors/vectors_init.c
    400    */
    401   initialize_exceptions();
     377   * Initialize the interrupt related settings.
     378   */
     379  intrStackStart = (uint32_t) __rtems_end + INIT_STACK_SIZE;
     380  intrStackSize = rtems_configuration_get_interrupt_stack_size();
     381
     382  /*
     383   * Initialize default raw exception hanlders.
     384   */
     385  ppc_exc_initialize(
     386    PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
     387    intrStackStart,
     388    intrStackSize
     389  );
    402390
    403391  /*
  • c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c

    r69effbb4 ra86f3aac  
    9595/***********************************************************************/
    9696
     97#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
     98
    9799#include <bsp.h>
    98100
     
    114116#endif
    115117
    116 SPR_RW(SPRG0)
    117118SPR_RW(SPRG1)
    118119
     
    253254
    254255  _write_SPRG1((unsigned int)intrStack);
    255 
    256   /* Signal them that this BSP has fixed PR288 - eventually, this should go away */
    257   _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
    258256
    259257 bsp_clicks_per_usec    = (IPB_CLOCK/1000000);
  • c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c

    r69effbb4 ra86f3aac  
    1818 *  $Id$
    1919 */
     20
     21#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
    2022
    2123#include <string.h>
     
    3032#include <rtems/powerpc/powerpc.h>
    3133
    32 SPR_RW(SPRG0)
    3334SPR_RW(SPRG1)
    3435
     
    164165  intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE);
    165166  _write_SPRG1((unsigned int)intrStack);
    166   /* signal them that we have fixed PR288 - eventually, this should go away */
    167   _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
    168167
    169168  /*
  • c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c

    r69effbb4 ra86f3aac  
    3636 */
    3737
     38#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
     39
    3840#include <bsp.h>
    3941
     
    5456#include <string.h>
    5557
    56 SPR_RW(SPRG0)
    5758SPR_RW(SPRG1)
    5859
     
    221222  intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE);
    222223  _write_SPRG1((unsigned int)intrStack);
    223   /* signal that we have fixed PR288 - eventually, this should go away */
    224   _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
    225224
    226225/*
  • c/src/lib/libbsp/powerpc/mvme3100/startup/bspstart.c

    r69effbb4 ra86f3aac  
    2020 */
    2121
     22#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
     23
    2224#include <string.h>
    2325#include <stdlib.h>
     
    5254extern void                      BSP_vme_config();
    5355
    54 SPR_RW(SPRG0)
    5556SPR_RW(SPRG1)
    5657
     
    239240{
    240241unsigned char       *stack;
    241 register uint32_t   intrStack;
    242 register uint32_t   *intrStackPtr;
     242uint32_t            intrStackStart;
     243uint32_t            intrStackSize;
    243244unsigned char       *work_space_start;
    244245char                *chpt;
     
    287288
    288289        /*
    289          * Initialize the interrupt related settings
    290          * SPRG1 = software managed IRQ stack
    291          *
    292          * This could be done later (e.g in IRQ_INIT) but it helps to understand
    293          * some settings below...
    294          */
    295         BSP_heap_start = ((uint32_t) __rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE;
    296 
    297         /* reserve space for the marker/tag frame */
    298         intrStack      = BSP_heap_start - PPC_MINIMUM_STACK_FRAME_SIZE;
    299 
    300         /* make sure it's properly aligned */
    301         intrStack     &= ~(CPU_STACK_ALIGNMENT-1);
    302 
    303         /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
    304         intrStackPtr   = (uint32_t*) intrStack;
    305         *intrStackPtr  = 0;
    306 
    307         _write_SPRG1(intrStack);
    308 
    309         /* signal them that we have fixed PR288 - eventually, this should go away */
    310         _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
    311 
    312         /*
    313          * Initialize default raw exception handlers. See vectors/vectors_init.c
    314          */
    315         initialize_exceptions();
     290         * Initialize the interrupt related settings.
     291         */
     292        intrStackStart = (uint32_t) __rtems_end + INIT_STACK_SIZE;
     293        intrStackSize = INTR_STACK_SIZE;
     294        BSP_heap_start = intrStackStart + intrStackSize;
     295
     296        /*
     297         * Initialize default raw exception handlers.
     298         */
     299        ppc_exc_initialize(
     300                PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
     301                intrStackStart,
     302                intrStackSize
     303        );
    316304
    317305        printk("CPU 0x%x - rev 0x%x\n", myCpu, myCpuRevision);
     
    320308        printk("Additionnal boot options are %s\n", BSP_commandline_string);
    321309        printk("Initial system stack at %x\n",      stack);
    322         printk("Software IRQ stack at %x\n",        intrStack);
     310        printk("Software IRQ stack starts at %x with size %u\n", intrStackStart, intrStackSize);
    323311#endif
    324312
     
    419407
    420408        /*
    421          *  Somehow doing the above seems to clobber SPRG0 on the mvme2100.  It
    422          *  is probably a not so subtle hint that you do not want to use PPCBug
    423          *  once RTEMS is up and running.  Anyway, we still needs to indicate
    424          *  that we have fixed PR288.  Eventually, this should go away.
    425          */
    426         _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
    427 #endif
     409         * Somehow doing the above seems to clobber SPRG0 on the mvme2100.  The
     410         * interrupt disable mask is stored in SPRG0. Is this a problem?
     411         */
     412        ppc_interrupt_set_disable_mask( PPC_INTERRUPT_DISABLE_MASK_DEFAULT);
     413
     414#endif
     415
     416/* See above */
     417#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
    428418
    429419        if ( (chpt = strstr(BSP_commandline_string,"MEMSZ=")) ) {
  • c/src/lib/libbsp/powerpc/mvme5500/startup/bspstart.c

    r69effbb4 ra86f3aac  
    2424 *  $Id$
    2525 */
     26
     27#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
    2628
    2729#include <string.h>
     
    7577uint32_t bsp_clicks_per_usec;
    7678
    77 SPR_RW(SPRG0)
    7879SPR_RW(SPRG1)
    7980
     
    250251  unsigned l3cr;
    251252#endif
    252   register uint32_t  intrStack;
    253   register uint32_t *intrStackPtr;
     253  uint32_t intrStackStart;
     254  uint32_t intrStackSize;
    254255  unsigned char *work_space_start;
    255256  ppc_cpu_id_t myCpu;
     
    303304
    304305  /*
    305    * Initialize the interrupt related settings
    306    * SPRG0 = interrupt nesting level count
    307    * SPRG1 = software managed IRQ stack
    308    *
    309    * This could be done latter (e.g in IRQ_INIT) but it helps to understand
    310    * some settings below...
    311    */
    312   BSP_heap_start = ((uint32_t) __rtems_end) + INIT_STACK_SIZE +
    313     rtems_configuration_get_interrupt_stack_size();
    314   intrStack = BSP_heap_start - PPC_MINIMUM_STACK_FRAME_SIZE;
    315 
    316   /* make sure it's properly aligned */
    317   intrStack &= ~(CPU_STACK_ALIGNMENT-1);
    318 
    319   /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
    320   intrStackPtr = (uint32_t*) intrStack;
    321   *intrStackPtr = 0;
    322 
    323   _write_SPRG1(intrStack);
    324 
    325   _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
    326 
    327   /*
    328    * Initialize default raw exception hanlders. See vectors/vectors_init.c
    329    */
    330   initialize_exceptions();
     306   * Initialize the interrupt related settings.
     307   */
     308  intrStackStart = (uint32_t) __rtems_end + INIT_STACK_SIZE;
     309  intrStackSize = rtems_configuration_get_interrupt_stack_size();
     310  BSP_heap_start = intrStackStart + intrStackSize;
     311
     312  /*
     313   * Initialize default raw exception handlers.
     314   */
     315  ppc_exc_initialize(
     316    PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
     317    intrStackStart,
     318    intrStackSize
     319  );
    331320
    332321  /*
  • c/src/lib/libbsp/powerpc/psim/startup/bspstart.c

    r69effbb4 ra86f3aac  
    1515 */
    1616
     17#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
     18
    1719#include <string.h>
    1820#include <fcntl.h>
     
    2830#include <libcpu/spr.h>
    2931
    30 SPR_RW(SPRG0)
    3132SPR_RW(SPRG1)
    32 
    33 void  initialize_exceptions(void);
    3433
    3534/*  On psim, each click of the decrementer register corresponds
     
    9493{
    9594  extern unsigned long __rtems_end[];
    96   register uint32_t  intrStack;
    97   register uint32_t *intrStackPtr;
     95  uint32_t intrStackStart;
     96  uint32_t intrStackSize;
    9897
    9998  /*
     
    116115
    117116  /*
    118    * Initialize the interrupt related settings
    119    * SPRG1 = software managed IRQ stack
    120    *
    121    * This could be done latter (e.g in IRQ_INIT) but it helps to understand
    122    * some settings below...
     117   * Initialize the interrupt related settings.
    123118   */
    124   intrStack = ((uint32_t) __rtems_end) + INIT_STACK_SIZE +
    125     rtems_configuration_get_interrupt_stack_size() -
    126     PPC_MINIMUM_STACK_FRAME_SIZE;
    127 
    128   /* make sure it's properly aligned */
    129   intrStack &= ~(CPU_STACK_ALIGNMENT-1);
    130 
    131   /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
    132   intrStackPtr = (uint32_t*) intrStack;
    133   *intrStackPtr = 0;
    134 
    135   _write_SPRG1(intrStack);
    136 
    137   /* signal them that we have fixed PR288 - eventually, this should go away */
    138   _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
     119  intrStackStart = (uint32_t) __rtems_end + INIT_STACK_SIZE;
     120  intrStackSize = rtems_configuration_get_interrupt_stack_size();
    139121
    140122  /*
    141    * Initialize default raw exception handlers. See vectors/vectors_init.c
     123   * Initialize default raw exception handlers.
    142124   */
    143   initialize_exceptions();
     125  ppc_exc_initialize(
     126    PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
     127    intrStackStart,
     128    intrStackSize
     129  );
    144130
    145131  /*
  • c/src/lib/libbsp/powerpc/shared/startup/bspstart.c

    r69effbb4 ra86f3aac  
    1818 */
    1919
     20#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
     21
    2022#include <string.h>
    2123
     
    4749extern void                     BSP_vme_config();
    4850
    49 SPR_RW(SPRG0)
    5051SPR_RW(SPRG1)
    5152
     
    150151  unsigned l2cr;
    151152#endif
    152   register uint32_t  intrStack;
    153   register uint32_t *intrStackPtr;
     153  uint32_t intrStackStart;
     154  uint32_t intrStackSize;
    154155  unsigned char *work_space_start;
    155156  ppc_cpu_id_t myCpu;
     
    227228
    228229  /*
    229    * Initialize the interrupt related settings
    230    * SPRG1 = software managed IRQ stack
    231    *
    232    * This could be done later (e.g in IRQ_INIT) but it helps to understand
    233    * some settings below...
    234    */
    235   BSP_heap_start = ((uint32_t) __rtems_end) +
    236     INIT_STACK_SIZE + rtems_configuration_get_interrupt_stack_size();
    237 
    238   /* reserve space for the marker/tag frame */
    239   intrStack      = BSP_heap_start - PPC_MINIMUM_STACK_FRAME_SIZE;
    240 
    241   /* make sure it's properly aligned */
    242   intrStack &= ~(CPU_STACK_ALIGNMENT-1);
    243 
    244   /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
    245   intrStackPtr = (uint32_t*) intrStack;
    246   *intrStackPtr = 0;
    247 
    248   _write_SPRG1(intrStack);
    249 
    250   /* signal them that we have fixed PR288 - eventually, this should go away */
    251   _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
    252 
    253   /*
    254    * Initialize default raw exception handlers. See vectors/vectors_init.c
    255    */
    256   initialize_exceptions();
     230   * Initialize the interrupt related settings.
     231   */
     232  intrStackStart = (uint32_t) __rtems_end + INIT_STACK_SIZE;
     233  intrStackSize = rtems_configuration_get_interrupt_stack_size();
     234  BSP_heap_start = intrStackStart + intrStackSize;
     235
     236  /*
     237   * Initialize default raw exception handlers.
     238   */
     239  ppc_exc_initialize(
     240    PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
     241    intrStackStart,
     242    intrStackSize
     243  );
    257244
    258245  select_console(CONSOLE_LOG);
     
    286273  printk("Additionnal boot options are %s\n", loaderParam);
    287274  printk("Initial system stack at %x\n",stack);
    288   printk("Software IRQ stack at %x\n",intrStack);
     275  printk("Software IRQ stack starts at %x with size %u\n", intrStackStart, intrStackSize);
    289276  printk("-----------------------------------------\n");
    290277#endif
     
    331318
    332319  /*
    333    *  Somehow doing the above seems to clobber SPRG0 on the mvme2100.  It
    334    *  is probably a not so subtle hint that you do not want to use PPCBug
    335    *  once RTEMS is up and running.  Anyway, we still needs to indicate
    336    *  that we have fixed PR288.  Eventually, this should go away.
    337    */
    338   _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
    339 #endif
     320   * Somehow doing the above seems to clobber SPRG0 on the mvme2100.  The
     321   * interrupt disable mask is stored in SPRG0. Is this a problem?
     322   */
     323  ppc_interrupt_set_disable_mask( PPC_INTERRUPT_DISABLE_MASK_DEFAULT);
     324
     325#endif
     326
     327/* See above */
     328#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
    340329
    341330  BSP_mem_size            = residualCopy.TotalMemory;
  • c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c

    r69effbb4 ra86f3aac  
    2424 */
    2525
     26#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
     27
    2628#include <string.h>
    2729
     
    3739#include <bsp.h>
    3840
    39 SPR_RW(SPRG0)
    4041SPR_RW(SPRG1)
    4142
     
    144145  intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE);
    145146  _write_SPRG1((unsigned int)intrStack);
    146   /* signal them that we have fixed PR288 - eventually, this should go away */
    147   _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
    148147
    149148  /*
  • c/src/lib/libbsp/powerpc/virtex/startup/bspstart.c

    r69effbb4 ra86f3aac  
    5656 *  $Id$
    5757 */
     58
     59#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
     60
    5861#include <string.h>
    5962#include <fcntl.h>
     
    6871#include <rtems/powerpc/powerpc.h>
    6972
    70 SPR_RW(SPRG0)
    7173SPR_RW(SPRG1)
    7274
     
    187189  intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE);
    188190  _write_SPRG1((unsigned int)intrStack);
    189   /* signal them that we have fixed PR288 - eventually, this should go away */
    190   _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
    191 
    192191
    193192  /*
  • c/src/lib/libbsp/shared/ChangeLog

    r69effbb4 ra86f3aac  
     12008-07-10      Sebastian Huber <sebastian.huber@embedded-brains.de>
     2
     3        * bootcard.c: Special case for PowerPC: The interrupt disable
     4        mask is stored in SPRG0.  It must be valid before we can use
     5        rtems_interrupt_disable().
     6
     72008-07-09      Sebastian Huber <sebastian.huber@embedded-brains.de>
     8
     9        * include/irq-config.h, include/irq-generic.h,
     10        src/irq-generic.c, src/irq-legacy.c: Generic BSP interrupt handler
     11        support.
     12
    1132008-06-04      Joel Sherrill <joel.sherrill@OARcorp.com>
    214
  • c/src/lib/libbsp/shared/bootcard.c

    r69effbb4 ra86f3aac  
    4444 */
    4545
    46 #include <bsp.h>
     46#include <stddef.h>
     47#include <stdint.h>
     48
     49#include <rtems.h>
    4750
    4851/*
     
    118121
    119122  /*
     123   * Special case for PowerPC: The interrupt disable mask is stored in SPRG0.
     124   * It must be valid before we can use rtems_interrupt_disable().
     125   */
     126  #ifdef PPC_INTERRUPT_DISABLE_MASK_DEFAULT
     127    ppc_interrupt_set_disable_mask( PPC_INTERRUPT_DISABLE_MASK_DEFAULT);
     128  #endif /* PPC_INTERRUPT_DISABLE_MASK_DEFAULT */
     129
     130  /*
    120131   *  Make sure interrupts are disabled.
    121132   */
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