Timestamp:
10/22/19 10:20:05 (5 years ago)
Author:
Pragnesh Patel <pragnesh.patel@…>
Branches:
5, master
Children:
d4b92da2
Parents:
32c9b83
git-author:
Pragnesh Patel <pragnesh.patel@…> (10/22/19 10:20:05)
git-committer:
Sebastian Huber <sebastian.huber@…> (10/23/19 06:11:50)
Message:

riscv: add freedom E310 Arty A7 bsp

Added support for Sifive Freedom FE310 soc on Arty A7 FPGA board.
Update #3785.

Signed-off-by: Pragnesh Patel <pragnesh.patel@…>

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