Changeset a6f70e1 in rtems


Ignore:
Timestamp:
Dec 21, 2018, 6:14:42 AM (5 months ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
master
Children:
5e0ab02
Parents:
ba85655
git-author:
Sebastian Huber <sebastian.huber@…> (12/21/18 06:14:42)
git-committer:
Sebastian Huber <sebastian.huber@…> (12/21/18 09:32:34)
Message:

bsps: Remove superfluous comments in cacheimpl.h

Remove superfluous blank lines.

Update #3667.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • bsps/shared/cache/cacheimpl.h

    rba85655 ra6f70e1  
    9292}
    9393
    94 
    9594/*
    9695 * This function is responsible for performing a data cache invalidate.
     
    9897 * perform the invalidations.
    9998 */
    100 
    10199void
    102100rtems_cache_invalidate_multiple_data_lines( const void * d_addr, size_t n_bytes )
     
    128126}
    129127
    130 
    131128/*
    132129 * This function is responsible for performing a data cache flush.
     
    144141}
    145142
    146 
    147143/*
    148144 * This function is responsible for performing a data cache
     
    161157}
    162158
    163 
    164159/*
    165160 * This function returns the data cache granularity.
     
    175170}
    176171
    177 
    178172size_t
    179173rtems_cache_get_data_cache_size( uint32_t level )
     
    198192}
    199193
    200 
    201 /*
    202  * This function unfreezes the instruction cache.
    203  */
    204194void rtems_cache_unfreeze_data( void )
    205195{
     
    209199}
    210200
    211 
    212 /* Turn on the data cache. */
    213201void
    214202rtems_cache_enable_data( void )
     
    219207}
    220208
    221 
    222 /* Turn off the data cache. */
    223209void
    224210rtems_cache_disable_data( void )
     
    228214#endif
    229215}
    230 
    231 
    232216
    233217/*
     
    263247 * and then perform the invalidations.
    264248 */
    265 
    266249#if defined(CPU_INSTRUCTION_CACHE_ALIGNMENT) \
    267250  && !defined(CPU_CACHE_SUPPORT_PROVIDES_RANGE_FUNCTIONS)
     
    310293}
    311294
    312 
    313295/*
    314296 * This function is responsible for performing an instruction cache
     
    327309}
    328310
    329 
    330311/*
    331312 * This function returns the instruction cache granularity.
     
    341322}
    342323
    343 
    344324size_t
    345325rtems_cache_get_instruction_cache_size( uint32_t level )
     
    352332}
    353333
    354 
    355334/*
    356335 * This function freezes the instruction cache; cache lines
     
    365344}
    366345
    367 
    368 /*
    369  * This function unfreezes the instruction cache.
    370  */
    371346void rtems_cache_unfreeze_instruction( void )
    372347{
     
    376351}
    377352
    378 
    379 /* Turn on the instruction cache. */
    380353void
    381354rtems_cache_enable_instruction( void )
     
    386359}
    387360
    388 
    389 /* Turn off the instruction cache. */
    390361void
    391362rtems_cache_disable_instruction( void )
     
    427398 * when code is changed.
    428399 */
    429 void
    430 rtems_cache_instruction_sync_after_code_change( const void * code_addr, size_t n_bytes )
     400void rtems_cache_instruction_sync_after_code_change(
     401  const void *code_addr,
     402  size_t      n_bytes
     403)
    431404{
    432405#if defined(CPU_CACHE_SUPPORT_PROVIDES_INSTRUCTION_SYNC_FUNCTION)
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