Changeset a597984 in rtems


Ignore:
Timestamp:
Jul 31, 2017, 11:34:46 AM (2 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
master
Children:
65ee42c
Parents:
2d0a805
git-author:
Sebastian Huber <sebastian.huber@…> (07/31/17 11:34:46)
git-committer:
Sebastian Huber <sebastian.huber@…> (07/31/17 11:43:38)
Message:

powerpc: Add register defines

Update #3082.
Update #3085.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • cpukit/score/cpu/powerpc/rtems/powerpc/registers.h

    r2d0a805 ra597984  
    356356#define BOOKE_DVC1     318   /* Data Value Compare 1                      */
    357357#define BOOKE_DVC2     319   /* Data Value Compare 2                      */
     358#define BOOKE_GSRR0    378   /* Guest Save/Restore Register 0             */
     359#define BOOKE_GSRR1    379   /* Guest Save/Restore Register 1             */
     360#define BOOKE_GEPR     380   /* Guest External Proxy Register             */
     361#define BOOKE_GDEAR    381   /* Guest Data Exception Address Register     */
     362#define BOOKE_GPIR     382   /* Guest Processor ID Register               */
     363#define BOOKE_GESR     383   /* Guest Exception Syndrome Register         */
    358364#define BOOKE_IVOR0    400   /* Interrupt Vector Offset Register 0        */
    359365#define BOOKE_IVOR1    401   /* Interrupt Vector Offset Register 1        */
     
    372378#define BOOKE_IVOR14   414   /* Interrupt Vector Offset Register 14       */
    373379#define BOOKE_IVOR15   415   /* Interrupt Vector Offset Register 15       */
     380#define BOOKE_IVOR42   436   /* Interrupt Vector Offset Register 42       */
     381#define BOOKE_IVOR32   528   /* Interrupt Vector Offset Register 32       */
     382#define BOOKE_IVOR33   529   /* Interrupt Vector Offset Register 33       */
     383#define BOOKE_IVOR34   530   /* Interrupt Vector Offset Register 34       */
     384#define BOOKE_IVOR35   531   /* Interrupt Vector Offset Register 35       */
     385#define BOOKE_IVOR36   532   /* Interrupt Vector Offset Register 36       */
     386#define BOOKE_IVOR37   533   /* Interrupt Vector Offset Register 37       */
     387#define BOOKE_IVOR38   432   /* Interrupt Vector Offset Register 38       */
     388#define BOOKE_IVOR39   433   /* Interrupt Vector Offset Register 39       */
     389#define BOOKE_IVOR40   434   /* Interrupt Vector Offset Register 40       */
     390#define BOOKE_IVOR41   435   /* Interrupt Vector Offset Register 41       */
     391#define BOOKE_GIVOR2   440   /* Guest Interrupt Vector Offset Register 2  */
     392#define BOOKE_GIVOR3   441   /* Guest Interrupt Vector Offset Register 3  */
     393#define BOOKE_GIVOR4   442   /* Guest Interrupt Vector Offset Register 4  */
     394#define BOOKE_GIVOR8   443   /* Guest Interrupt Vector Offset Register 8  */
     395#define BOOKE_GIVOR13  444   /* Guest Interrupt Vector Offset Register 13 */
     396#define BOOKE_GIVOR14  445   /* Guest Interrupt Vector Offset Register 14 */
     397#define BOOKE_GIVPR    446   /* Guest Interrupt Vector Prefix Register    */
    374398#define BOOKE_MCSRR0   570   /* Machine Check Save/Restore Register 0     */
    375399#define BOOKE_MCSRR1   571   /* Machine Check Save/Restore Register 1     */
    376400#define BOOKE_MCSR     572   /* Machine Check Status Register             */
     401#define BOOKE_DSRR0    574   /* Debug Save/Restore Register 0             */
     402#define BOOKE_DSRR1    575   /* Debug Save/Restore Register 1             */
    377403
    378404#define PPC440_INV0    880   /* Instruction Cache Normal Victim 0         */
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