Changeset a3f5b6b in rtems
- Timestamp:
- 05/28/00 20:14:45 (23 years ago)
- Children:
- 75061954
- Parents:
- 63cf252f
- Location:
- c/src/exec/score/cpu
- Files:
-
- 11 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/exec/score/cpu/a29k/rtems/score/a29k.h
r63cf252f ra3f5b6b 29 29 */ 30 30 31 #if defined(a29205) 31 #if defined(rtems_multilib) 32 /* 33 * Figure out all CPU Model Feature Flags based upon compiler 34 * predefines. 35 */ 36 37 #define CPU_MODEL_NAME "rtems_multilib" 38 #define A29K_HAS_FPU 0 39 40 #elif defined(a29205) 32 41 33 42 #define CPU_MODEL_NAME "a29205" -
c/src/exec/score/cpu/hppa1.1/rtems/score/hppa.h
r63cf252f ra3f5b6b 36 36 */ 37 37 38 #if defined(hppa7100) 38 #if defined(rtems_multilib) 39 /* 40 * Figure out all CPU Model Feature Flags based upon compiler 41 * predefines. 42 */ 43 44 #define CPU_MODEL_NAME "rtems_multilib" 45 46 #elif defined(hppa7100) 39 47 40 48 #define CPU_MODEL_NAME "hppa 7100" -
c/src/exec/score/cpu/i386/rtems/score/i386.h
r63cf252f ra3f5b6b 47 47 */ 48 48 49 #if defined(i386_fp) 49 #if defined(rtems_multilib) 50 /* 51 * Figure out all CPU Model Feature Flags based upon compiler 52 * predefines. 53 */ 54 55 #define CPU_MODEL_NAME "rtems_multilib" 56 #define I386_HAS_FPU 0 57 #define I386_HAS_BSWAP 0 58 59 #elif defined(i386_fp) 50 60 51 61 #define CPU_MODEL_NAME "i386 with i387" -
c/src/exec/score/cpu/i960/rtems/score/i960.h
r63cf252f ra3f5b6b 34 34 */ 35 35 36 #if defined(__i960CA__) || defined(__i960_CA__) || defined(__i960CA) 36 #if defined(rtems_multilib) 37 /* 38 * Figure out all CPU Model Feature Flags based upon compiler 39 * predefines. 40 */ 41 42 #define CPU_MODEL_NAME "rtems_multilib" 43 #define I960_HAS_FPU 0 44 #define I960_CPU_ALIGNMENT 4 45 #define I960_SOFT_RESET_COMMAND 0x30000 46 47 #elif defined(__i960CA__) || defined(__i960_CA__) || defined(__i960CA) 37 48 38 49 #define CPU_MODEL_NAME "i960ca" -
c/src/exec/score/cpu/m68k/rtems/score/m68k.h
r63cf252f ra3f5b6b 78 78 * Eventually it would be nice to evaluate doing a lot of this section 79 79 * by having each model specify which core it uses and then go from there. 80 */ 81 82 /* 83 * Figure out all CPU Model Feature Flags based upon compiler 84 * predefines. Notice the only exception to this is that 85 * gcc does not distinguish between CPU32 and CPU32+. This 86 * feature selection logic is setup such that if RTEMS__mcpu32p__ 87 * is defined, then CPU32+ rules are used. Otherwise, the safe 88 * but less efficient CPU32 rules are used for the CPU32+. 80 89 */ 81 90 -
c/src/exec/score/cpu/mips64orion/rtems/score/mips64orion.h
r63cf252f ra3f5b6b 45 45 */ 46 46 47 #if defined(R4650) 47 #if defined(rtems_multilib) 48 /* 49 * Figure out all CPU Model Feature Flags based upon compiler 50 * predefines. 51 */ 52 53 #define CPU_MODEL_NAME "rtems_multilib" 54 #define MIPS64ORION_HAS_FPU 1 55 56 #elif defined(R4650) 48 57 49 58 #define CPU_MODEL_NAME "R4650" -
c/src/exec/score/cpu/no_cpu/rtems/score/no_cpu.h
r63cf252f ra3f5b6b 35 35 */ 36 36 37 #if defined(no_cpu) 37 #if defined(rtems_multilib) 38 /* 39 * Figure out all CPU Model Feature Flags based upon compiler 40 * predefines. 41 */ 42 43 #define CPU_MODEL_NAME "rtems_multilib" 44 #define NOCPU_HAS_FPU 1 45 46 #elif defined(no_cpu) 38 47 39 48 #define CPU_MODEL_NAME "no_cpu_model" -
c/src/exec/score/cpu/powerpc/shared/ppc.h
r63cf252f ra3f5b6b 95 95 #define PPC_LOW_POWER_MODE_STANDARD 1 96 96 97 #if defined(ppc403) 97 #if defined(rtems_multilib) 98 /* 99 * Figure out all CPU Model Feature Flags based upon compiler 100 * predefines. 101 */ 102 103 #define CPU_MODEL_NAME "rtems_multilib" 104 #define PPC_ALIGNMENT 4 105 #define PPC_CACHE_ALIGNMENT 16 106 #define PPC_HAS_RFCI 1 107 #define PPC_HAS_FPU 0 108 #define PPC_USE_MULTIPLE 1 109 #define PPC_I_CACHE 2048 110 #define PPC_D_CACHE 1024 111 #define PPC_DEBUG_MODEL PPC_DEBUG_MODEL_STANDARD 112 #define PPC_HAS_EXCEPTION_PREFIX 0 113 #define PPC_HAS_EVPR 0 114 #define PPC_INTERRUPT_MAX 16 115 #define PPC_LOW_POWER_MODE PPC_LOW_POWER_MODE_STANDARD 116 #define PPC_HAS_DOUBLE 0 117 118 #elif defined(ppc403) 98 119 /* 99 120 * IBM 403 -
c/src/exec/score/cpu/sh/rtems/score/sh.h
r63cf252f ra3f5b6b 40 40 */ 41 41 42 #if defined(sh7032) 42 #if defined(rtems_multilib) 43 /* 44 * Figure out all CPU Model Feature Flags based upon compiler 45 * predefines. 46 */ 47 48 #define CPU_MODEL_NAME "rtems_multilib" 49 #define SH_HAS_FPU 0 50 #define SH_HAS_SEPARATE_STACKS 1 51 52 #elif defined(sh7032) 43 53 #define CPU_MODEL_NAME "SH7032" 44 54 #define SH_HAS_FPU 0 -
c/src/exec/score/cpu/sparc/rtems/score/sparc.h
r63cf252f ra3f5b6b 55 55 */ 56 56 57 #if defined(erc32) 57 #if defined(rtems_multilib) 58 /* 59 * Figure out all CPU Model Feature Flags based upon compiler 60 * predefines. 61 */ 62 63 #define CPU_MODEL_NAME "rtems_multilib" 64 #define SPARC_HAS_FPU 1 65 #define SPARC_HAS_BITSCAN 0 66 #define SPARC_NUMBER_OF_REGISTER_WINDOWS 8 67 #define SPARC_HAS_LOW_POWER_MODE 1 68 69 #elif defined(erc32) 58 70 59 71 #define CPU_MODEL_NAME "erc32" -
c/src/exec/score/cpu/unix/rtems/score/unix.h
r63cf252f ra3f5b6b 30 30 */ 31 31 32 #if defined(hpux) 32 #if defined(rtems_multilib) 33 /* 34 * Figure out all CPU Model Feature Flags based upon compiler 35 * predefines. 36 */ 37 38 #define CPU_MODEL_NAME "rtems_multilib" 39 40 #elif defined(hpux) 33 41 34 42 #define CPU_MODEL_NAME "HP-UX"
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