Changeset a3ae5896 in rtems


Ignore:
Timestamp:
Dec 2, 2007, 8:46:00 PM (13 years ago)
Author:
Till Straumann <strauman@…>
Branches:
4.10, 4.11, 4.9, master
Children:
d7a2009a
Parents:
f278329
Message:

2007-12-02 Till Straumann <strauman@…>

  • shared/openpic/openpic.c, shared/openpic/openpic.h:
  • eliminated conditional compilation (#ifdef mpc8240) The difference in register-layout between the EPIC and the std. openPIC is handled by an offset parameter which can be set at run-time (initialization) with a new routine 'openpic_set_src_offset()'.
  • allow BSP to define symbol BSP_OPEN_PIC_BIG_ENDIAN which builds the driver for big-endian register access (mpc8540).
  • openpic_disable_irq() now returns the old state so that it can be restored later.
Location:
c/src/lib/libbsp/powerpc
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/ChangeLog

    rf278329 ra3ae5896  
     12007-12-02      Till Straumann <strauman@slac.stanford.edu>
     2        * shared/openpic/openpic.c, shared/openpic/openpic.h:
     3        - eliminated conditional compilation (#ifdef mpc8240)
     4          The difference in register-layout between the EPIC
     5          and the std. openPIC is handled by an offset parameter
     6          which can be set at run-time (initialization) with
     7          a new routine 'openpic_set_src_offset()'.
     8        - allow BSP to define symbol BSP_OPEN_PIC_BIG_ENDIAN
     9          which builds the driver for big-endian register access
     10          (mpc8540).
     11        - openpic_disable_irq() now returns the old state so
     12          that it can be restored later.
     13
    1142007-12-01      Till Straumann <strauman@slac.stanford.edu>
    215
  • c/src/lib/libbsp/powerpc/shared/openpic/openpic.c

    rf278329 ra3ae5896  
    4040static unsigned int NumSources;
    4141
    42 #if defined(mpc8240) || defined(mpc8245)
    4342static unsigned int openpic_eoi_delay = 0;
    44 #endif
     43static          int openpic_src_offst = 0;
     44#define SOURCE(irq)     Source[ (irq) + openpic_src_offst ]
    4545
    4646    /*
     
    9494    unsigned int val;
    9595
     96#ifdef BSP_OPEN_PIC_BIG_ENDIAN
     97        val = in_be32(addr);
     98#else
    9699    val = in_le32(addr);
     100#endif
    97101#ifdef REGISTER_DEBUG
    98102    printk("openpic_read(0x%08x) = 0x%08x\n", (unsigned int)addr, val);
     
    106110    printk("openpic_write(0x%08x, 0x%08x)\n", (unsigned int)addr, val);
    107111#endif
    108     out_le32(addr, val);
     112#ifdef BSP_OPEN_PIC_BIG_ENDIAN
     113    out_be32(addr, val);
     114#else
     115        out_le32(addr, val);
     116#endif
    109117}
    110118
     
    322330{
    323331    check_arg_cpu(cpu);
    324 #if defined(mpc8240) || defined(mpc8245)
    325332    if ( openpic_eoi_delay )
    326333        rtems_bsp_delay_in_bus_cycles(openpic_eoi_delay);
    327 #endif
    328334    openpic_write(&OpenPIC->THIS_CPU.EOI, 0);
    329335}
    330336
    331 #if defined(mpc8240) || defined(mpc8245)
    332 void openpic_set_eoi_delay(unsigned tb_cycles)
    333 {
     337unsigned openpic_set_eoi_delay(unsigned tb_cycles)
     338{
     339unsigned rval = openpic_eoi_delay;
    334340    openpic_eoi_delay = tb_cycles;
    335 }
    336 #endif
     341        return rval;
     342}
     343
     344int openpic_set_src_offst(int offset)
     345{
     346int rval = openpic_src_offst;
     347    openpic_src_offst = offset;
     348        return rval;
     349}
    337350
    338351    /*
     
    453466    check_arg_irq(irq);
    454467        rtems_interrupt_disable(flags);
    455     openpic_clearfield(&OpenPIC->Source[irq].Vector_Priority, OPENPIC_MASK);
     468    openpic_clearfield(&OpenPIC->SOURCE(irq).Vector_Priority, OPENPIC_MASK);
    456469        rtems_interrupt_enable(flags);
    457470}
    458471
    459 void openpic_disable_irq(unsigned int irq)
    460 {
     472int openpic_disable_irq(unsigned int irq)
     473{
     474int           rval;
    461475unsigned long flags;
    462476    check_arg_irq(irq);
     477        if ( irq < 0 || irq >=NumSources )
     478                return -1;
    463479        rtems_interrupt_disable(flags);
    464     openpic_setfield(&OpenPIC->Source[irq].Vector_Priority, OPENPIC_MASK);
     480        rval = openpic_readfield(&OpenPIC->SOURCE(irq).Vector_Priority, OPENPIC_MASK) ? 0 : 1;
     481    openpic_setfield(&OpenPIC->SOURCE(irq).Vector_Priority, OPENPIC_MASK);
    465482        rtems_interrupt_enable(flags);
     483        return rval;
    466484}
    467485
     
    486504    check_arg_pri(pri);
    487505    check_arg_vec(vec);
    488     openpic_safe_writefield(&OpenPIC->Source[irq].Vector_Priority,
     506    openpic_safe_writefield(&OpenPIC->SOURCE(irq).Vector_Priority,
    489507                            OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK |
    490508                            OPENPIC_SENSE_POLARITY | OPENPIC_SENSE_LEVEL,
     
    501519{
    502520    check_arg_irq(irq);
    503     openpic_write(&OpenPIC->Source[irq].Destination, cpumask);
     521    openpic_write(&OpenPIC->SOURCE(irq).Destination, cpumask);
    504522}
    505523
     
    510528{
    511529    check_arg_irq(irq);
    512         return openpic_readfield(&OpenPIC->Source[irq].Vector_Priority,
     530        return openpic_readfield(&OpenPIC->SOURCE(irq).Vector_Priority,
    513531                                                         OPENPIC_PRIORITY_MASK) >> OPENPIC_PRIORITY_SHIFT;
    514532}
     
    521539        rtems_interrupt_disable(flags);
    522540        openpic_writefield(
    523                                         &OpenPIC->Source[irq].Vector_Priority,
     541                                        &OpenPIC->SOURCE(irq).Vector_Priority,
    524542                                        OPENPIC_PRIORITY_MASK,
    525543                                        pri << OPENPIC_PRIORITY_SHIFT);
     
    535553{
    536554    check_arg_irq(irq);
    537     openpic_safe_writefield(&OpenPIC->Source[irq].Vector_Priority,
     555    openpic_safe_writefield(&OpenPIC->SOURCE(irq).Vector_Priority,
    538556                            OPENPIC_SENSE_LEVEL,
    539557                            (sense ? OPENPIC_SENSE_LEVEL : 0));
  • c/src/lib/libbsp/powerpc/shared/openpic/openpic.h

    rf278329 ra3ae5896  
    4141     *  OpenPIC supports up to 2048 interrupt sources and up to 32 processors
    4242     */
    43 
    44 #if defined(mpc8240) || defined(mpc8245)
    45 #define OPENPIC_MAX_SOURCES    (2048 - 16)
    46 /* If the BSP uses the serial interrupt mode / 'multiplexer' then
    47  * EOI must be delayed by at least 16 SRAM_CLK cycles to avoid
    48  * spurious interrupts.
    49  * It is the BSP's responsibility to set up an appropriate delay
    50  * (in timebase-clock cycles) at init time.
    51  */
    52 extern void openpic_set_eoi_delay(unsigned tb_cycles);
    53 #else
    5443#define OPENPIC_MAX_SOURCES     2048
    55 #endif
    5644#define OPENPIC_MAX_PROCESSORS  32
    5745
     
    163151    OpenPIC_Timer Timer[OPENPIC_NUM_TIMERS];
    164152    char Pad1[0xee00];
    165 #if defined(mpc8240) || defined(mpc8245)
    166     char Pad2[0x0200];
    167 #endif 
    168153} OpenPIC_Global;
    169154
     
    306291     *  OpenPIC Operations
    307292     */
     293
     294/*
     295 * Handle EPIC differences. Unfortunately, I don't know of an easy
     296 * way to tell an EPIC from a normal PIC at run-time. Therefore,
     297 * the BSP must enable a few quirks if it knows that an EPIC is being
     298 * used:
     299 *  - If the BSP uses the serial interrupt mode / 'multiplexer' then
     300 *    EOI must be delayed by at least 16 SRAM_CLK cycles to avoid
     301 *    spurious interrupts.
     302 *    It is the BSP's responsibility to set up an appropriate delay
     303 *    (in timebase-clock cycles) at init time using
     304 *    'openpic_set_eoi_delay()'. This is ONLY necessary when using
     305 *    an EPIC in serial mode.
     306 *  - The EPIC sources start at an offset of 16 in the register
     307 *    map, i.e., on an EPIC you'd say Sources[ x + 16 ] where
     308 *    on a PIC you would say Sources[ x ].
     309 *    Again, the BSP can set an offset that is used by the
     310 *    calls dealing with 'Interrupt Sources'
     311 *      openpic_enable_irq()
     312 *      openpic_disable_irq()
     313 *      openpic_initirq()
     314 *      openpic_mapirq()
     315 *      openpic_set_sense()
     316 *      openpic_get_source_priority()
     317 *      openpic_set_source_priority()
     318 *
     319 * The routines 'openpic_set_eoi_delay()' and 'openpic_set_src_offst()'
     320 * return the respective previous values of the affected parameters.
     321 *
     322 * NOTE: openpic_set_src_offst() MUST be called PRIOR to openpic_init()
     323 */
     324extern unsigned openpic_set_eoi_delay(unsigned tb_cycles);
     325extern      int openpic_set_src_offst(int offset);
     326
    308327
    309328/* Global Operations */
     
    330349/* Interrupt Sources */
    331350extern void openpic_enable_irq(unsigned int irq);
    332 extern void openpic_disable_irq(unsigned int irq);
     351extern int openpic_disable_irq(unsigned int irq);
    333352extern void openpic_initirq(unsigned int irq, unsigned int pri, unsigned int vector, int polarity,
    334353                            int is_level);
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