Changeset a355e3ea in rtems


Ignore:
Timestamp:
May 22, 2001, 11:07:09 PM (20 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
2e7ed911
Parents:
e2040ba
Message:

2001-05-22 Greg Menke <gregory.menke@…>

  • Assisted in design and debug by Joel Sherrill <joel@…>.
  • clock/clockdrv.c, console/conscfg.c: Corrected.
  • include/bsp.h: Support for tm27 and addition of CPU_CLOCK_RATE.
  • startup/bspstart.c: Properly set initial status register and pending interrupts.
  • timer/timer.c: Works now.
Location:
c/src/lib/libbsp/mips/genmongoosev
Files:
6 edited

Legend:

Unmodified
Added
Removed

  • c/src/lib/libbsp/mips/genmongoosev/ChangeLog

    re2040ba ra355e3ea  
     12001-05-22      Greg Menke <gregory.menke@gsfc.nasa.gov>
     2
     3        * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>.
     4        * clock/clockdrv.c, console/conscfg.c: Corrected.
     5        * include/bsp.h: Support for tm27 and addition of CPU_CLOCK_RATE.
     6        * startup/bspstart.c: Properly set initial status register and
     7        pending interrupts.
     8        * timer/timer.c: Works now.
     9
    1102001-05-10      Ralf Corsepius  <corsepiu@faw.uni-ulm.de>
    211

  • c/src/lib/libbsp/mips/genmongoosev/clock/clockdrv.c

    re2040ba ra355e3ea  
    2424#endif
    2525
     26
     27
    2628/* reset Timeout (TO) bit */
     29
    2730#define Clock_driver_support_at_tick() \
    28   MONGOOSEV_WRITE_REGISTER( \
    29     CLOCK_BASE, \
    30     MONGOOSEV_TIMER_CONTROL_REGISTER, \
    31     (MONGOOSEV_TIMER_CONTROL_COUNTER_ENABLE | \
    32      MONGOOSEV_TIMER_CONTROL_INTERRUPT_ENABLE) \
    33   );
     31  do { \
     32    MONGOOSEV_WRITE_REGISTER( CLOCK_BASE, MONGOOSEV_TIMER_CONTROL_REGISTER, \
     33         (MONGOOSEV_TIMER_CONTROL_COUNTER_ENABLE | MONGOOSEV_TIMER_CONTROL_INTERRUPT_ENABLE)); \
     34  } while(0)
     35
    3436
    3537#define Clock_driver_support_install_isr( _new, _old ) \
    … …  
    3941
    4042
    41 extern int ClockRate;
    42 
    43 #define CLICKS (((unsigned32) &ClockRate) / 1000000 )
    4443#define Clock_driver_support_initialize_hardware() \
    45   do { \
    46     unsigned32 _clicks; \
    47     _clicks = CLICKS * rtems_configuration_get_microseconds_per_tick(); \
    48     MONGOOSEV_WRITE_REGISTER( \
    49       CLOCK_BASE, \
    50       MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER, \
    51       _clicks \
    52     ); \
     44   do { \
     45    unsigned32 _clicks = CPU_CLOCK_RATE_MHZ * rtems_configuration_get_microseconds_per_tick(); \
     46    MONGOOSEV_WRITE_REGISTER( CLOCK_BASE, MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER, _clicks ); \
    5347    Clock_driver_support_at_tick(); \
    54   } while(0)
     48   } while(0)
    5549
    5650#define Clock_driver_support_shutdown_hardware() \

  • c/src/lib/libbsp/mips/genmongoosev/console/conscfg.c

    re2040ba ra355e3ea  
    1919#include <libchip/mg5uart.h>
    2020
    21 #if (CONSOLE_USE_INTERRUPTS)
     21/* #define CONSOLE_USE_INTERRUPTS */
     22
     23#ifdef CONSOLE_USE_INTERRUPTS
    2224#define MG5UART_FUNCTIONS &mg5uart_fns
    2325#else
    … …  
    2527#endif
    2628
    27 extern int ClockRate;
    28 #define CLOCK_RATE (unsigned32) &ClockRate
    2929
    3030console_tbl     Console_Port_Tbl[] = {
    … …  
    9292BSP_output_char_function_type           BSP_output_char = GENMG5_output_char;
    9393BSP_polling_getchar_function_type       BSP_poll_char = NULL;
    94    
    95 

  • c/src/lib/libbsp/mips/genmongoosev/include/bsp.h

    re2040ba ra355e3ea  
    2727#include <libcpu/mongoose-v.h>
    2828
     29
     30#ifndef CPU_CLOCK_RATE
     31#define CLOCK_RATE      12000000
     32#endif
     33
     34#define CPU_CLOCK_RATE_HZ       CLOCK_RATE
     35#define CPU_CLOCK_RATE_MHZ      (CLOCK_RATE/1000000)
     36
     37
     38/*
     39 * Useful defines set here so we can avoid duplicating them all over
     40 * creation.
     41 *
     42 */
     43
     44
     45
     46/*
     47 * assertSoftwareInt defined in vectorisrs.c the prototype is here so
     48 * userspace code can get to it directly.
     49 *  */
     50
     51extern void assertSoftwareInterrupt(unsigned32);
     52
     53
     54
     55
     56
    2957/*
    3058 *  Define the time limits for RTEMS Test Suite test durations.
    … …  
    4573 */
    4674
     75
     76#define CLOCK_VECTOR    MONGOOSEV_IRQ_TIMER1
     77
     78
    4779#define MUST_WAIT_FOR_INTERRUPT 1
    4880
    49 #if 0
     81#if 1
     82
    5083#define Install_tm27_vector( handler ) \
    51     (void) set_vector( handler, MONGOOSEV_IRQ_SOFTWARE_1, 1 ); \
     84    (void) set_vector( handler, MONGOOSEV_IRQ_SOFTWARE_1, 1 );
    5285
    53 #define Cause_tm27_intr() \
    54     asm volatile ( "syscall 0x01" : : );
    5586
    56 #define CLOCK_VECTOR MONGOOSEV_IRQ_TMR0
     87
     88#define Cause_tm27_intr()   assertSoftwareInterrupt(0);
    5789
    5890#define Clear_tm27_intr() 
     91#define Lower_tm27_intr()
    5992
    60 #define Lower_tm27_intr()
    6193#else
     94
    6295#define Install_tm27_vector( handler ) \
    63     (void) set_vector( handler, MONGOOSEV_IRQ_TMR0, 1 ); \
     96    (void) set_vector( handler, MONGOOSEV_IRQ_TIMER1, 1 );
    6497
    6598#define Cause_tm27_intr() \
    … …  
    69102
    70103#define Clear_tm27_intr()
    71 
    72104#define Lower_tm27_intr()
    73105

  • c/src/lib/libbsp/mips/genmongoosev/startup/bspstart.c

    re2040ba ra355e3ea  
    2121#include <rtems/libcsupport.h>
    2222#include <libcpu/mongoose-v.h>
     23
     24
    2325
    2426/*
    … …  
    5860void bsp_pretasking_hook(void)
    5961{
    60     extern int   HeapBase;
    61     extern int   HeapSize;
     62    extern int HeapBase;
     63    extern int HeapSize;
    6264    void         *heapStart = &HeapBase;
    6365    unsigned long heapSize = (unsigned long)&HeapSize;
     66    unsigned long ramSpace;
    6467
    6568    bsp_libc_init(heapStart, (unsigned32) heapSize, 0);
    … …  
    6871    rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
    6972#endif
     73
    7074}
    71  
     75
     76
     77
    7278/*
    7379 *  bsp_start
    … …  
    8086  extern int _end;
    8187  extern int WorkspaceBase;
    82   extern int _RamSize, _RamBase;
    83   int ram_left;
    8488
    85   ram_left = (unsigned32) &_RamSize -
    86              (unsigned32)&WorkspaceBase - (unsigned32) &_RamBase;
     89  /* Configure Number of Register Caches */
    8790
    8891  Cpu_table.pretasking_hook = bsp_pretasking_hook;  /* init libc, etc. */
    … …  
    9093  Cpu_table.interrupt_stack_size = 4096;
    9194
    92   if ( BSP_Configuration.work_space_size >  ram_left )
    93     _sys_exit( 1 );
     95  /* HACK -- tied to value linkcmds */
     96  if ( BSP_Configuration.work_space_size >(4096*1024) )
     97   _sys_exit( 1 );
    9498
    9599  BSP_Configuration.work_space_start = (void *) &WorkspaceBase;
    96100
    97   /* Clear all pending peripheral interrupts and mask them. */
    98    
    99   MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_FUNCTION_INTERRUPT_CAUSE_REGISTER, 0 );
     101  MONGOOSEV_WRITE( MONGOOSEV_WATCHDOG, 0xA0 );
     102
     103  /* reset the config register & clear any pending peripheral interrupts */
     104  MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_COMMAND_REGISTER, 0 );
     105  MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_COMMAND_REGISTER, MONGOOSEV_UART_CMD_RESET_BOTH_PORTS );
     106  MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_COMMAND_REGISTER, 0 );
     107
     108  /* reset both timers */
     109  MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER1_BASE, MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER, 0xffffffff );
     110  MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER1_BASE, MONGOOSEV_TIMER_CONTROL_REGISTER, 0);
     111
     112  MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER2_BASE, MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER, 0xffffffff );
     113  MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER2_BASE, MONGOOSEV_TIMER_CONTROL_REGISTER, 0);
     114
    100115  MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_FUNCTION_INTERRUPT_MASK_REGISTER, 0 );
     116  MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_STATUS_REGISTER, 0xffffffff );
    101117
    102   /*
    103    *  Enable coprocessors.
    104    *  Disable external interrupts.
    105    *  Enable software interrupts.
    106    */
     118  /* clear any writable bits in the cause register */
     119  mips_set_cause( 0 );
    107120
    108   mips_set_sr( (SR_CU0 | SR_CU1 | SR_IBIT1 | SR_IBIT2) );
     121  /*all interrupts unmasked but globally off.  depend on the IRC to take care of things */
     122  mips_set_sr( (SR_CU0 | SR_CU1 | 0xff00) );
    109123
    110124  mips_install_isr_entries();
    111125}
     126
     127
     128void clear_cache( void *address, size_t n )
     129{
     130}
     131
     132/* Structure filled in by get_mem_info.  Only the size field is
     133   actually used (to clear bss), so the others aren't even filled in.  */
     134
     135struct s_mem
     136{
     137  unsigned int size;
     138  unsigned int icsize;
     139  unsigned int dcsize;
     140};
     141
     142
     143void
     144get_mem_info (mem)
     145     struct s_mem *mem;
     146{
     147  mem->size = 0x1000000;        /* XXX figure out something here */
     148}
     149

  • c/src/lib/libbsp/mips/genmongoosev/timer/timer.c

    re2040ba ra355e3ea  
    3838   */
    3939
    40   MONGOOSEV_WRITE_REGISTER(
    41     TIMER_BASE,
    42     MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER,
    43     0xffffffff
    44   );
    45   MONGOOSEV_WRITE_REGISTER(
    46     TIMER_BASE,
    47     MONGOOSEV_TIMER_CONTROL_REGISTER,
    48     MONGOOSEV_TIMER_CONTROL_COUNTER_ENABLE
    49   );
     40   MONGOOSEV_WRITE_REGISTER( TIMER_BASE, MONGOOSEV_TIMER_CONTROL_REGISTER, 0);
     41
     42   MONGOOSEV_WRITE_REGISTER( TIMER_BASE,
     43                             MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER,
     44                             0xffffffff );
     45
     46   MONGOOSEV_WRITE_REGISTER( TIMER_BASE,
     47                             MONGOOSEV_TIMER_CONTROL_REGISTER,
     48                             MONGOOSEV_TIMER_CONTROL_COUNTER_ENABLE );
     49
    5050}
    5151
    5252#define AVG_OVERHEAD      0  /* It typically takes N instructions */
    5353                             /*     to start/stop the timer. */
     54
    5455#define LEAST_VALID       1  /* Don't trust a value lower than this */
    5556                             /* mongoose-v can count cycles. :) */
    … …  
    6263  rtems_unsigned32  tcr;
    6364
    64   clicks = MONGOOSEV_READ_REGISTER(
    65     TIMER_BASE,
    66     MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER
    67   );
     65  clicks = MONGOOSEV_READ_REGISTER( TIMER_BASE,
     66                                    MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER );
    6867  total = 0xffffffff - clicks;
    6968
    7069  tcr = MONGOOSEV_READ_REGISTER( TIMER_BASE, MONGOOSEV_TIMER_CONTROL_REGISTER );
     70
     71  MONGOOSEV_WRITE_REGISTER( TIMER_BASE,
     72                            MONGOOSEV_TIMER_CONTROL_REGISTER,
     73                            0 );
     74
    7175  if ( tcr & MONGOOSEV_TIMER_CONTROL_TIMEOUT )
    7276    printk( "MG5 timer overran\n" );
    … …  
    7882    return 0;            /* below timer resolution */
    7983
    80   return total - AVG_OVERHEAD;
     84  return (total - AVG_OVERHEAD) / CPU_CLOCK_RATE_MHZ;
    8185}
    8286
    … …  
    9296  Timer_driver_Find_average_overhead = find_flag;
    9397}
     98
     99
     100/* eof */
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