Changeset a191b28 in rtems

Timestamp:

05/14/02 17:54:22 (21 years ago)

Author:

Joel Sherrill <joel.sherrill@…>

Branches:

4.10, 4.11, 4.8, 4.9, 5, master

Children:

c7286d94

Parents:

830e5f7

Message:

2001-05-14 Till Straumann <strauman@…>

• bootloader/Makefile.am, console/Makefile.am, pci/Makefile.am: Per PR215 address the following issues:
  • _IO_BASE, _ISA_MEM_BASE and PCI_DRAM_OFFSET are no longer defined by libcpu (powerpc/shared/include/io.h) but by the BSP (who is the only one to know the values)
  • the affected BSP (shared/motorola) headers have been fixed in a separate "libbsp/powerpc/shared" patch.
  • the DEC 21140 driver (libchip/network/dec21140.c) has been fixed to use PCI_DRAM_OFFSET instead of PREP_PCI_DRAM_OFFSET. and PCI_MEM_BASE instead of PREP_ISA_MEM_BASE. PCI_MEM_BASE is to be defined by the BSP who is using this driver.
  • the DEC driver also has been fixed to use the newer rtems_bsp_delay_in_bus_cycles() instead of the obsolete delay_in_bus_cycles().

File:

• c/src/libchip/network/dec21140.c (modified) (6 diffs)

c/src/libchip/network/dec21140.c

@@ -186 +186 @@
 
 #if defined(__PPC)
-#define phys_to_bus(address) ((unsigned int)((address)) + PREP_PCI_DRAM_OFFSET)
-#define bus_to_phys(address) ((unsigned int)((address)) - PREP_PCI_DRAM_OFFSET)
+#define phys_to_bus(address) ((unsigned int)((address)) + PCI_DRAM_OFFSET)
+#define bus_to_phys(address) ((unsigned int)((address)) - PCI_DRAM_OFFSET)
 #define CPU_CACHE_ALIGNMENT_FOR_BUFFER PPC_CACHE_ALIGNMENT
 #else
@@ -193 +193 @@
 #define phys_to_bus(address) ((unsigned int) ((address)))
 #define bus_to_phys(address) ((unsigned int) ((address)))
-#define delay_in_bus_cycles(cycle) Wait_X_ms( cycle/100 )
+#define rtems_bsp_delay_in_bus_cycles(cycle) Wait_X_ms( cycle/100 )
 #define CPU_CACHE_ALIGNMENT_FOR_BUFFER PG_SIZE
 
@@ -332 +332 @@
                 short dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
                 st_le32(ioaddr, EE_ENB | dataval);
-                delay_in_bus_cycles(200);
+                rtems_bsp_delay_in_bus_cycles(200);
                 st_le32(ioaddr, EE_ENB | dataval | EE_SHIFT_CLK);
-                delay_in_bus_cycles(200);
+                rtems_bsp_delay_in_bus_cycles(200);
                 st_le32(ioaddr, EE_ENB | dataval); /* Finish EEPROM a clock tick. */
-                delay_in_bus_cycles(200);
+                rtems_bsp_delay_in_bus_cycles(200);
         }
         st_le32(ioaddr, EE_ENB);
@@ -342 +342 @@
         for (i = 16; i > 0; i--) {
                 st_le32(ioaddr, EE_ENB | EE_SHIFT_CLK);
-                delay_in_bus_cycles(200);
+                rtems_bsp_delay_in_bus_cycles(200);
                 retval = (retval << 1) | ((ld_le32(ioaddr) & EE_DATA_READ) ? 1 : 0);
                 st_le32(ioaddr, EE_ENB);
-                delay_in_bus_cycles(200);
+                rtems_bsp_delay_in_bus_cycles(200);
         }
 
@@ -374 +374 @@
   st_le32( (tbase+memCSR6), CSR6_INIT);  
   st_le32( (tbase+memCSR0), RESET_CHIP);  
-  delay_in_bus_cycles(200);
+  rtems_bsp_delay_in_bus_cycles(200);
 
   /*
@@ -894 +894 @@
 
         tmp = (unsigned int)(lvalue & (unsigned int)(~MEM_MASK)) 
-          + (unsigned int)PREP_ISA_MEM_BASE;
+          + (unsigned int)PCI_MEM_BASE;
         sc->base = (unsigned int *)(tmp);