Changeset 9fd4f5c5 in rtems


Ignore:
Timestamp:
Jan 3, 2001, 4:35:08 PM (21 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
fe7acdcf
Parents:
ac00434
Message:

2001-01-03 Joel Sherrill <joel@…>

  • rtems/score/cpu.h: Added _CPU_Initialize_vectors().
  • cpu_asm.S: Eliminated warning for duplicate definition of EXTERN.
Files:
6 edited

Legend:

Unmodified
Added
Removed
  • c/src/exec/score/cpu/mips/ChangeLog

    rac00434 r9fd4f5c5  
     12001-01-03      Joel Sherrill <joel@OARcorp.com>
     2
     3        * rtems/score/cpu.h: Added _CPU_Initialize_vectors().
     4        * cpu_asm.S: Eliminated warning for duplicate definition of EXTERN.
     5
    162000-12-19      Joel Sherrill <joel@OARcorp.com>
    27
  • c/src/exec/score/cpu/mips/cpu_asm.S

    rac00434 r9fd4f5c5  
    5858
    5959#ifdef __GNUC__
    60 #define EXTERN(x,size) .extern x,size
     60#define ASM_EXTERN(x,size) .extern x,size
    6161#else
    62 #define EXTERN(x,size)
     62#define ASM_EXTERN(x,size)
    6363#endif
    6464
     
    457457#endif
    458458
    459 EXTERN(_ISR_Nest_level, SZ_INT)
    460 EXTERN(_Thread_Dispatch_disable_level,SZ_INT)
    461 EXTERN(_Context_Switch_necessary,SZ_INT)
    462 EXTERN(_ISR_Signals_to_thread_executing,SZ_INT)
     459ASM_EXTERN(_ISR_Nest_level, SZ_INT)
     460ASM_EXTERN(_Thread_Dispatch_disable_level,SZ_INT)
     461ASM_EXTERN(_Context_Switch_necessary,SZ_INT)
     462ASM_EXTERN(_ISR_Signals_to_thread_executing,SZ_INT)
    463463.extern _Thread_Dispatch
    464464.extern _ISR_Vector_table
  • c/src/exec/score/cpu/mips/rtems/score/cpu.h

    rac00434 r9fd4f5c5  
    583583#define CPU_STACK_ALIGNMENT        CPU_ALIGNMENT
    584584
    585 /* ISR handler macros */
     585/*
     586 *  ISR handler macros
     587 */
     588
     589/*
     590 *  Support routine to initialize the RTEMS vector table after it is allocated.
     591 */
     592
     593#define _CPU_Initialize_vectors()
    586594
    587595/*
  • cpukit/score/cpu/mips/ChangeLog

    rac00434 r9fd4f5c5  
     12001-01-03      Joel Sherrill <joel@OARcorp.com>
     2
     3        * rtems/score/cpu.h: Added _CPU_Initialize_vectors().
     4        * cpu_asm.S: Eliminated warning for duplicate definition of EXTERN.
     5
    162000-12-19      Joel Sherrill <joel@OARcorp.com>
    27
  • cpukit/score/cpu/mips/cpu_asm.S

    rac00434 r9fd4f5c5  
    5858
    5959#ifdef __GNUC__
    60 #define EXTERN(x,size) .extern x,size
     60#define ASM_EXTERN(x,size) .extern x,size
    6161#else
    62 #define EXTERN(x,size)
     62#define ASM_EXTERN(x,size)
    6363#endif
    6464
     
    457457#endif
    458458
    459 EXTERN(_ISR_Nest_level, SZ_INT)
    460 EXTERN(_Thread_Dispatch_disable_level,SZ_INT)
    461 EXTERN(_Context_Switch_necessary,SZ_INT)
    462 EXTERN(_ISR_Signals_to_thread_executing,SZ_INT)
     459ASM_EXTERN(_ISR_Nest_level, SZ_INT)
     460ASM_EXTERN(_Thread_Dispatch_disable_level,SZ_INT)
     461ASM_EXTERN(_Context_Switch_necessary,SZ_INT)
     462ASM_EXTERN(_ISR_Signals_to_thread_executing,SZ_INT)
    463463.extern _Thread_Dispatch
    464464.extern _ISR_Vector_table
  • cpukit/score/cpu/mips/rtems/score/cpu.h

    rac00434 r9fd4f5c5  
    583583#define CPU_STACK_ALIGNMENT        CPU_ALIGNMENT
    584584
    585 /* ISR handler macros */
     585/*
     586 *  ISR handler macros
     587 */
     588
     589/*
     590 *  Support routine to initialize the RTEMS vector table after it is allocated.
     591 */
     592
     593#define _CPU_Initialize_vectors()
    586594
    587595/*
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