Changeset 9c1dc8c in rtems


Ignore:
Timestamp:
01/12/01 13:36:30 (22 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
d2959b2
Parents:
d9f6165
Message:

2001-01-12 Joel Sherrill <joel@…>

  • rtems/score/mips.h (mips_get_sr, mips_set_sr): Corrected register constraints from "general" to "register".
Files:
4 edited

Legend:

Unmodified
Added
Removed
  • c/src/exec/score/cpu/mips/ChangeLog

    rd9f6165 r9c1dc8c  
     12001-01-12      Joel Sherrill <joel@OARcorp.com>
     2
     3        * rtems/score/mips.h (mips_get_sr, mips_set_sr): Corrected
     4        register constraints from "general" to "register".
     5
    162001-01-09      Joel Sherrill <joel@OARcorp.com>
    27
  • c/src/exec/score/cpu/mips/rtems/score/mips.h

    rd9f6165 r9c1dc8c  
    7878#define mips_get_sr( _x ) \
    7979  do { \
    80     asm volatile( "mfc0 %0, $12; nop" : "=g" (_x) : ); \
     80    asm volatile( "mfc0 %0, $12; nop" : "=r" (_x) : ); \
    8181  } while (0)
    8282
    8383#define mips_set_sr( _x ) \
    8484  do { \
    85     unsigned int __x = (_x); \
     85    register unsigned int __x = (_x); \
    8686    asm volatile( "mtc0 %0, $12; nop" : : "r" (__x) ); \
    8787  } while (0)
  • cpukit/score/cpu/mips/ChangeLog

    rd9f6165 r9c1dc8c  
     12001-01-12      Joel Sherrill <joel@OARcorp.com>
     2
     3        * rtems/score/mips.h (mips_get_sr, mips_set_sr): Corrected
     4        register constraints from "general" to "register".
     5
    162001-01-09      Joel Sherrill <joel@OARcorp.com>
    27
  • cpukit/score/cpu/mips/rtems/score/mips.h

    rd9f6165 r9c1dc8c  
    7878#define mips_get_sr( _x ) \
    7979  do { \
    80     asm volatile( "mfc0 %0, $12; nop" : "=g" (_x) : ); \
     80    asm volatile( "mfc0 %0, $12; nop" : "=r" (_x) : ); \
    8181  } while (0)
    8282
    8383#define mips_set_sr( _x ) \
    8484  do { \
    85     unsigned int __x = (_x); \
     85    register unsigned int __x = (_x); \
    8686    asm volatile( "mtc0 %0, $12; nop" : : "r" (__x) ); \
    8787  } while (0)
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