Changeset 9bfb3c6 in rtems


Ignore:
Timestamp:
Jul 28, 2009, 7:29:44 PM (10 years ago)
Author:
Eric Norum <WENorum@…>
Branches:
4.9
Children:
ac1d1bc4
Parents:
80e9324
Message:

PR 1420/bsps
Turn on buffered writes to DRAM. As Device Errata SECF124 notes this may cause
double writes, but that's not really a big problem and benchmarking tests have
shown that buffered writes do gain some performance.

Location:
c/src/lib/libbsp/m68k/uC5282
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/m68k/uC5282/ChangeLog

    r80e9324 r9bfb3c6  
     12009-07-28  Eric Norum <norume@aps.anl.gov>
     2
     3   PR 1420/bsps
     4   * startup/bspstart.c: Turn on buffered writes to DRAM. As Device Errata
     5      SECF124 notes this may cause double writes, but that's not really a big
     6      problem and benchmarking tests have shown that buffered writes do gain
     7      some performance.
     8
    192009-06-02      Eric Norum <norume@aps.anl.gov>
    210
  • c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c

    r80e9324 r9bfb3c6  
    279279  /*
    280280   * Cache SDRAM
     281   * Enable buffered writes
     282   * As Device Errata SECF124 notes this may cause double writes,
     283   * but that's not really a big problem and benchmarking tests have
     284   * shown that buffered writes do gain some performance.
    281285   */
    282286  mcf5282_acr0_mode = MCF5XXX_ACR_AB((uint32_t)_RamBase)     |
    283287                      MCF5XXX_ACR_AM((uint32_t)_RamSize-1)   |
    284288                      MCF5XXX_ACR_EN                         |
    285                       MCF5XXX_ACR_SM_IGNORE;
     289                      MCF5XXX_ACR_SM_IGNORE                  |
     290                      MCF5XXX_ACR_BWE;
    286291  m68k_set_acr0(mcf5282_acr0_mode);
    287292
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