Changeset 9bd7b3b1 in rtems


Ignore:
Timestamp:
May 20, 2014, 3:45:07 PM (5 years ago)
Author:
Daniel Hellstrom <daniel@…>
Branches:
4.11, master
Children:
5e92a40a
Parents:
ce4a7ae
git-author:
Daniel Hellstrom <daniel@…> (05/20/14 15:45:07)
git-committer:
Daniel Hellstrom <daniel@…> (10/06/14 11:19:18)
Message:

SPARC: Fatal_halt use source and exit codes

The Fatal_halt handler now have two options, either halt
as before or enter system error state to return to
debugger or simulator. The exit-code is now also
propagated to the debugger which is very useful for
testing.

The CPU_Fatal_halt handler was split up into two, since
the only the LEON3 support the CPU power down.

The LEON3 halt now uses the power-down instruction to save
CPU power. This doesn't stop a potential watch-dog timer
from expiring.

Files:
2 added
7 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/sparc/erc32/Makefile.am

    rce4a7ae r9bd7b3b1  
    4747libbsp_a_SOURCES += ../../sparc/shared/startup/early_malloc.c
    4848libbsp_a_SOURCES += ../../sparc/shared/startup/bsp_fatal_exit.c
     49libbsp_a_SOURCES += ../../sparc/shared/startup/bsp_fatal_halt.c
    4950# ISR Handler
    5051libbsp_a_SOURCES += ../../sparc/shared/cpu.c
  • c/src/lib/libbsp/sparc/erc32/configure.ac

    rce4a7ae r9bd7b3b1  
    4444 initialization not used on real ERC32 hardware.])
    4545
     46RTEMS_BSPOPTS_SET([BSP_POWER_DOWN_AT_FATAL_HALT],[*],[])
     47RTEMS_BSPOPTS_HELP([BSP_POWER_DOWN_AT_FATAL_HALT],
     48[If defined, CPU is spinning on fatal exit. Otherwise generate system
     49 error which will hand over to debugger, simulator, etc.])
     50
    4651RTEMS_BSP_CLEANUP_OPTIONS(0,1,1)
    4752
  • c/src/lib/libbsp/sparc/leon2/Makefile.am

    rce4a7ae r9bd7b3b1  
    6262libbsp_a_SOURCES += ../../sparc/shared/startup/early_malloc.c
    6363libbsp_a_SOURCES += ../../sparc/shared/startup/bsp_fatal_exit.c
     64libbsp_a_SOURCES += ../../sparc/shared/startup/bsp_fatal_halt.c
    6465
    6566# ISR Handler
  • c/src/lib/libbsp/sparc/leon2/configure.ac

    rce4a7ae r9bd7b3b1  
    3737 the wall time required to execute the RTEMS test suites.])
    3838
     39RTEMS_BSPOPTS_SET([BSP_POWER_DOWN_AT_FATAL_HALT],[*],[])
     40RTEMS_BSPOPTS_HELP([BSP_POWER_DOWN_AT_FATAL_HALT],
     41[If defined, CPU is spinning on fatal exit. Otherwise generate system
     42 error which will hand over to debugger, simulator, etc.])
     43
    3944RTEMS_BSP_CLEANUP_OPTIONS(0, 1, 1)
    4045
  • c/src/lib/libbsp/sparc/leon3/Makefile.am

    rce4a7ae r9bd7b3b1  
    4343libbsp_a_SOURCES += startup/cpucounter.c
    4444libbsp_a_SOURCES += ../../sparc/shared/startup/bsp_fatal_exit.c
     45libbsp_a_SOURCES += startup/bsp_fatal_halt.c
    4546
    4647# ISR Handler
  • c/src/lib/libbsp/sparc/leon3/configure.ac

    rce4a7ae r9bd7b3b1  
    3939 determining the CPU core number in an SMP configuration.])
    4040
     41RTEMS_BSPOPTS_SET([BSP_POWER_DOWN_AT_FATAL_HALT],[*],[])
     42RTEMS_BSPOPTS_HELP([BSP_POWER_DOWN_AT_FATAL_HALT],
     43[If defined, CPU is powered down on fatal exit. Otherwise generate system
     44 error which will hand over to debugger, simulator, etc.])
     45
    4146RTEMS_BSP_CLEANUP_OPTIONS(0, 1, 1)
    4247RTEMS_BSP_LINKCMDS
  • cpukit/score/cpu/sparc/rtems/score/cpu.h

    rce4a7ae r9bd7b3b1  
    10811081 * halts/stops the CPU.
    10821082 */
    1083 #define _CPU_Fatal_halt( _source, _error ) \
    1084   do { \
    1085     uint32_t   level; \
    1086     \
    1087     level = sparc_disable_interrupts(); \
    1088     __asm__ volatile ( "mov  %0, %%g1 " : "=r" (level) : "0" (level) ); \
    1089     while (1); /* loop forever */ \
    1090   } while (0)
     1083extern void _CPU_Fatal_halt(uint32_t source, uint32_t error)
     1084  RTEMS_COMPILER_NO_RETURN_ATTRIBUTE;
    10911085
    10921086/* end of Fatal Error manager macros */
Note: See TracChangeset for help on using the changeset viewer.