Changeset 9b5af6a in rtems


Ignore:
Timestamp:
Apr 8, 2020, 11:19:51 AM (7 months ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
master
Children:
69690f6
Parents:
9b3b33d
git-author:
Sebastian Huber <sebastian.huber@…> (04/08/20 11:19:51)
git-committer:
Sebastian Huber <sebastian.huber@…> (07/05/20 10:56:01)
Message:

bsps/powerpc: Fix tlbie instruction usage

GCC 10 no longer passes -many to the assembler. This enables more
checks in the assembler.

The 0 in the tlbie instruction is the L operand which selects a 4KiB
page size.

Location:
bsps/powerpc
Files:
8 edited

Legend:

Unmodified
Added
Removed
  • bsps/powerpc/gen5200/start/start.S

    r9b3b33d r9b5af6a  
    776776
    777777TLB_init_loop:
    778         tlbie   r29
     778        tlbie   r29, 0
    779779        tlbsync
    780780        addi    r29, r29, 0x1000
  • bsps/powerpc/gen83xx/start/cpuinit.c

    r9b3b33d r9b5af6a  
    134134  /* Clear TLBs */
    135135  for (i = 0;i < 32;i++) {
    136     __asm__ volatile( "tlbie %0\n" : : "r" (i << (31 - 19)));
     136    __asm__ volatile( "tlbie %0, 0\n" : : "r" (i << (31 - 19)));
    137137  }
    138138}
  • bsps/powerpc/include/libcpu/mmu.h

    r9b3b33d r9b5af6a  
    166166static inline void _tlbie(unsigned long va)
    167167{
    168         asm volatile ("tlbie %0" : : "r"(va));
     168        asm volatile ("tlbie %0, 0" : : "r"(va));
    169169}
    170170
  • bsps/powerpc/motorola_powerpc/bootloader/head.S

    r9b3b33d r9b5af6a  
    384384        lis     r11,0x1000
    3853851:      addic.  r11,r11,-0x1000
    386         tlbie   r11
     386        tlbie   r11, 0
    387387        bnl     1b
    388388/* tlbsync is not implemented on 601, so use sync which seems to be a superset
  • bsps/powerpc/motorola_powerpc/bootloader/mm.c

    r9b3b33d r9b5af6a  
    200200                          | ((hte[i].key<<22)&0x0fc00000);
    201201                        hte[i].key=0;
    202                         asm volatile("sync; tlbie %0; sync" : : "r" (flushva));
     202                        asm volatile("sync; tlbie %0, 0; sync" : : "r" (flushva));
    203203                found:
    204204                        hte[i].rpn = rpn;
     
    584584                        if (va>=virtmap->base && va<=virtmap->end) {
    585585                                p[i].key=0;
    586                                 asm volatile("sync; tlbie %0; sync" : :
     586                                asm volatile("sync; tlbie %0, 0; sync" : :
    587587                                             "r" (va));
    588588                        }
  • bsps/powerpc/mvme5500/start/start.S

    r9b3b33d r9b5af6a  
    194194        lis     r20, 0x1000
    1951951:      addic.  r20, r20, -0x1000
    196         tlbie   r20
     196        tlbie   r20, 0
    197197        bgt     1b
    198198        sync
  • bsps/powerpc/shared/mmu/pte121.c

    r9b3b33d r9b5af6a  
    123123 * On the 750 and 7400, there are 128 two way I and D TLBs,
    124124 * indexed by EA[14:19]. Hence calling
    125  *   tlbie rx
     125 *   tlbie rx, 0
    126126 * where rx scans 0x00000, 0x01000, 0x02000, ... 0x3f000
    127  * is sufficient to do the job
     127 * is sufficient to do the job. The 0 in the tlbie instruction is the L operand
     128 * which selects a 4KiB page size.
    128129 */
    129130#define NUM_TLB_PER_WAY 64      /* 750 and 7400 have 128 two way TLBs */
     
    641642    "   lis             %[tmp2], %[ea_range]@h\n"
    642643    "2: addic.  %[tmp2], %[tmp2], -%[pg_sz]\n"    /* address the next one (decrementing) */
    643     "   tlbie   %[tmp2]\n"             /* invalidate & repeat */
     644    "   tlbie   %[tmp2], 0\n"             /* invalidate & repeat */
    644645    "   bgt             2b\n"
    645646    "   eieio   \n"
     
    873874  do_dssall ();
    874875  __asm__ volatile ("   sync            \n\t"
    875                 "       tlbie %0        \n\t"
     876                "       tlbie %0, 0     \n\t"
    876877                "       eieio           \n\t"
    877878                "       tlbsync         \n\t"
     
    961962  if (pp >= 0)
    962963    pte->pp = pp;
    963   __asm__ volatile ("tlbie %0; eieio"::"r" (ea):"memory");
     964  __asm__ volatile ("tlbie %0, 0; eieio"::"r" (ea):"memory");
    964965  pte->v = 1;
    965966  __asm__ volatile ("tlbsync; sync":::"memory");
  • bsps/powerpc/shared/start/start.S

    r9b3b33d r9b5af6a  
    193193        lis     r20, 0x1000
    1941941:      addic.  r20, r20, -0x1000
    195         tlbie   r20
     195        tlbie   r20, 0
    196196        bgt     1b
    197197        sync
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