Changeset 9951cee in rtems


Ignore:
Timestamp:
Feb 15, 2021, 3:05:10 PM (4 months ago)
Author:
Kinsey Moore <kinsey.moore@…>
Branches:
master
Children:
a27ba3f
Parents:
9d77c0f4
git-author:
Kinsey Moore <kinsey.moore@…> (02/15/21 15:05:10)
git-committer:
Joel Sherrill <joel@…> (03/05/21 14:43:15)
Message:

bsps/aarch64: RTEMS_DEBUG stack alignment faults

Run with stack alignment faults enabled under RTEMS_DEBUG to catch any
stack misalignments early. This makes it easier to track them down
should they ever occur.

Files:
2 edited

Legend:

Unmodified
Added
Removed
  • bsps/aarch64/shared/start/start.S

    r9d77c0f4 r9951cee  
    9191#endif
    9292
     93        /* Initialize SCTLR_EL1 */
     94        mov x0, XZR
     95#if defined(RTEMS_DEBUG)
     96        /* Enable Stack alignment checking */
     97        orr x0, x0, #(1<<3)
     98#endif
     99        msr SCTLR_EL1, x0
     100
    93101#ifdef RTEMS_SMP
    94102        /* Read MPIDR and get current processor index */
  • cpukit/score/cpu/aarch64/aarch64-exception-default.S

    r9d77c0f4 r9951cee  
    7777 * misaligned.
    7878 */
    79         .macro  JUMP_HANDLER
     79        .macro  JUMP_HANDLER_SHORT
    8080/* Mask to use in BIC, lower 7 bits */
    8181        mov x0, #0x7f
     
    114114        nop
    115115        nop
     116        .endm
     117
     118        .macro  JUMP_HANDLER
     119        JUMP_HANDLER_SHORT
    116120        nop
    117121        .endm
     
    183187 */
    184188curr_el_spx_sync:
     189        msr SCTLR_EL1, XZR
    185190        stp x0, lr,     [sp, #-0x10]!   /* Push x0,lr on to the stack */
    186191        bl curr_el_spx_sync_get_pc      /* Get current execution address */
    187192curr_el_spx_sync_get_pc:                /* The current PC is now in LR */
    188         JUMP_HANDLER
     193/* Use short jump handler since this has an extra instruction to clear SCTLR */
     194        JUMP_HANDLER_SHORT
    189195        JUMP_TARGET_SPx
    190196.balign 0x80
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