Changeset 98c95d1 in rtems


Ignore:
Timestamp:
Jan 5, 2021, 9:53:35 AM (3 months ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
master
Children:
e324f82
Parents:
9523887
git-author:
Sebastian Huber <sebastian.huber@…> (01/05/21 09:53:35)
git-committer:
Sebastian Huber <sebastian.huber@…> (02/01/21 05:26:18)
Message:

nios2: Fix ISR dispatch variants

The thread dispatch disabled level moved to _Per_CPU_Information some
time ago.

Location:
cpukit/score/cpu/nios2
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • cpukit/score/cpu/nios2/nios2-eic-il-low-level.S

    r9523887 r98c95d1  
    4242
    4343        .extern _Per_CPU_Information
    44         .extern _Thread_Dispatch_disable_level
    4544        .extern _Nios2_Thread_dispatch_disabled
    4645        .extern _Nios2_ISR_Status_interrupts_disabled
     
    5150
    5251        /* Load thread dispatch disable level */
    53         ldw     r16, %gprel(_Thread_Dispatch_disable_level)(gp)
     52        ldw     r16, %gprel(_Per_CPU_Information + PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL)(gp)
    5453
    5554        /* Load high level handler address and argument */
     
    5958        /* Increment and store thread dispatch disable level */
    6059        addi    r9, r16, 1
    61         stw     r9, %gprel(_Thread_Dispatch_disable_level)(gp)
     60        stw     r9, %gprel(_Per_CPU_Information + PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL)(gp)
    6261
    6362        /* Call high level handler with argument */
     
    8281         * we are in the thread dispatch helper.
    8382         */
    84         stw     r16, %gprel(_Thread_Dispatch_disable_level)(gp)
     83        stw     r16, %gprel(_Per_CPU_Information + PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL)(gp)
    8584
    8685        /* Is thread dispatch allowed? */
  • cpukit/score/cpu/nios2/nios2-eic-rsie-low-level.S

    r9523887 r98c95d1  
    4141
    4242        .extern _Per_CPU_Information
    43         .extern _Thread_Dispatch_disable_level
    4443
    4544        .globl  _Nios2_ISR_Dispatch_with_shadow_preemptive
     
    8281        /* Increment ISR nest level and thread dispatch disable level */
    8382        ldw     r9, %gprel(_Per_CPU_Information + PER_CPU_ISR_NEST_LEVEL)(gp)
    84         ldw     r10, %gprel(_Thread_Dispatch_disable_level)(gp)
     83        ldw     r10, %gprel(_Per_CPU_Information + PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL)(gp)
    8584        addi    r11, r9, 1
    8685        addi    r10, r10, 1
    8786        stw     r11, %gprel(_Per_CPU_Information + PER_CPU_ISR_NEST_LEVEL)(gp)
    88         stw     r10, %gprel(_Thread_Dispatch_disable_level)(gp)
     87        stw     r10, %gprel(_Per_CPU_Information + PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL)(gp)
    8988
    9089        /* Switch to interrupt stack if necessary */
     
    115114        /* Decrement ISR nest level and thread dispatch disable level */
    116115        ldw     r9, %gprel(_Per_CPU_Information + PER_CPU_ISR_NEST_LEVEL)(gp)
    117         ldw     r10, %gprel(_Thread_Dispatch_disable_level)(gp)
     116        ldw     r10, %gprel(_Per_CPU_Information + PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL)(gp)
    118117        subi    r9, r9, 1
    119118        subi    r10, r10, 1
    120119        stw     r9, %gprel(_Per_CPU_Information + PER_CPU_ISR_NEST_LEVEL)(gp)
    121         stw     r10, %gprel(_Thread_Dispatch_disable_level)(gp)
     120        stw     r10, %gprel(_Per_CPU_Information + PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL)(gp)
    122121
    123122        /*
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